unit-1 · lhkh izdkj ds mkvk dei;wvj jftlvj e ck;ujh dkm e gh jgrs ga d;kfda jftlvj f¶yi ¶yki...

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DIGITAL COMPUTER - 1- COPYRIGHT CORNELL INFORMATICS PVT LTD

SYLLABUS FOR BCA COURSE FOR BATCH(2004-2007)

DIGITAL ORGANIZATION UNIT-1=A Data Types And Number System,Binary Number System,Octal & Hexa-Decimal Number System,1’s & 2’s Compliment,Binary Fixed-Point Representation,Airthmetic Operation On Binary Number’s,Overflow & Underflow,Floating Point Representation,Codes ASCII,EBCDIC Codes,Gray Codes And Excess-3 Codes & BCD,Error Correction And Correcting Codes UNIT-2=B Logic Gates AND,OR,NOT Gates And Their Truth Table,Universal gates NOR,NAND,XOR Gates,Boolean Algebra,Basic Boolean law’s,Demorgan Theoram’s,MAP Simplification,Minimization Technique,KMAP And Sum Of Product Or Product Of Sum UNIT-3=C Combinational & Sequential Circuit,Half Adder & Full Adder Or Full Substractor,Flip-Flop-RS&JK&T&D Flip-Flop,Shift Register,Ram And Rom,Multiplexer And Demultiplexer,Encoder And Decoder,Idea About Arithmetic Circuits,Program Control And Instruction Sequencing UNIT-4=D I/O Interface,Properties Of Simple I/O Devices And Their Controller, Isolated Versus Memory Mapped I/O,Modes Of Data Transfer,Synchronous & Asynchronous Data Transfer,Handshaking,Asynchronous Serial Transfer,I/O Processor UNIT-5=E Auxiliary Memory,Megnetic Drum,Disk & Tape,Semi-Conductor Memories Memory hierarchy,Associative Memory,Virtual memory,Address Space & Memory Space,Address Mapping,Page table & Page Replacement,Cache Memory,Hit Ratio,Mapping Tachniques,Writing Into cache

UNIT-1

Data Types of Number System:-



fMftVy dEI;wVj esa ck;ujh dksM ;k eseksjh ;qfuV es tkudkjh bdV~Bh gksrh gS ;k fQj izkslslj jftLVj esA jftLVj ;k rks MkVk ladfyr djrs gSA ;k fQj fu;a=k.k lac/kh tkudkjh AvkSj ;gh fu;a=k.k lac/kh tkudkfj;k¡ ,d fcV es gksrh gS ;k fQj fcV~l ds lewg esA MkVk ds :i esa ;k rks vad gksrs gSA ;k fQj ck;ujh dksM esa vU; tkudkfj;k¡AjftLVj esa tks MkVk Vkbi ladfyr gksrs gS og fuEu gSA 1- vad tks xf.kr fd fdzz;kvksa ds dke es vkrs gSA 2- MkVk izkslsflax esa iz;qDr v{kjA 3- vU; fo'ks"k fpUg tks fofHkUu mn~ns'; fd iqfrZ gsrq fu/kkZfjr fd;s tkrs gSA lHkh izdkj ds MkVk dEI;wVj jftLVj esa ck;ujh dksM esa gh jgrs gSA D;ksfda jftLVj f¶yi ¶yki i|fr ls fufeZr gksrs gSA tks dsoy 1 vkSj 0 dks gh xzg.k dj ldrs gSA ck;ujh dksM bUgh nksuksa vadksa ds esy ls curs gSA Number System:- uacj flLVe es vk/kkj ij ‘R’ fMftV fd ?kkr jgrh gSA vr% uacj flLVe fdl la[;k esa iznf'kZr dj jgk gSA ;g tkuus ds fy;s gj vk/kkj fMftV ij nh xbZ ‘R’ ?kkr ls xq.kk djuk i<rk gSA ;k fQj mu lc vk/kkjksa ds okfLrfod vadksa dks tksMk tkrk gSA lkekU;r%tks MkVk dEI;wVj es laxzfgr gksrk gSA mls ,d fo'ksÔ flLVe fd enn ls fo'ksÔ fpUgksa ds }kjk n'kkZ;k tkrk gSA ;s fo'ks"kÔ fpUg]uacj]ySVj ;k fo'ksÔ fpUg dqN Hkh gks ldrs gSa tks dksM ds :i esa gksrs gSA uacj flLVe dks ge nks Hkkxksa esa ckV ldrs gSA 1.Non- positional system 2.Positional number system 1.Non-positional:- igys yksx Counting djus ds fy;s Finger dh lgk;rk ysrs Fks ysfdu tc Finger ls i;kZIr Counting ugh dj ikrs Fks rc ;g yksx Stone ;k Stick dk iz;ksx Value dks Indicate djus ds fy;s djrs Fks vkSj bl izdkj dh x.kuk Non-positional Number System dks Denote djrh gSA ;s flLVe cgqr izkjaHk ds flLVe FksA bldk mi;ksx x.kuk o vU; dk;ksZa ds fy;s fd;k tkrk FkkA ;s flLVe tksM+ dk mi;ksx djrs FksA ;s flLVe fdlh fpUg fd fLFkfr ij fuHkZj ugh djrs FksA ftlls bu ij vad xf.krh; x.kuk;sa cgqr dfBu gks tkrh Fkh blh dkj.k iksft'kuy uacj flLVe dk pyu izkjaHk gqvkA

2. positional number system:- bl rjg ds uacj flLVe esa fpUgksa dk fo'ksÔ lewg mi;ksx djrs gSAftUgs ge Digit dgrs gSA tks dksbZ Hkh eku dks iznf'kZr dj ldrh gSA D;ksafd izR;sd fpUg fd uacj esa fLFkfr ds vk/kkj ij ,d vf}fr; la[;k gksrh gSA iksft'kuy uacj flLVe dk fl}kar fuEu ckrksa ij fuHkZj djrk gSAizR;sd Digit dh Value dk fu/kkZj.k rhu izdkj ls fad;k tkrk gSA 1-ml Number es Digit dh Position 2-ml Number es System dk Base

1 2 3 4 5 6 7



3-Digit dk okLrfod eku 1-vk/kkj o ?kkr 2- iksft'kuy

dqN eq[; Number System uhps fn;s x;s gSA 1.Decimal Number System 2.Binary Number System 3.Octal Number System 4.Hexa-Decimal Number System 1. Decimal Number System : ;g lcls igyk izpfyr vadxf.krh; Number System gSAtks iwjs fo'o es mi;ksx fd;k tkrk gSA;g System cgqr gh /khjs&/khjs o Lor%gh fodflr gqvk gS bls fdlh laxBu ;k Task Force us ugh cuk;kAbl System es nl fo'ks"k fpUg : 0,1,2,3,4,5,6,7,8,9 gksrs gS]tks Digit dgykrs gSA;g Number System "Base 10" dgykrk gSAD;ksfd bles dqy 10 vad gksrs gSA

2.Binary Number System:- "BI" dk vFkZ gksrk gS nksAbles flQZ nks gh fpUg~ gksrs gS]0 vkSj 1A vkSj flQZ bu fpUgksa dk mi;ksx djds ge fdlh Hkh l[;ka dks iznf'kZr dj ldrs gSA ;g csl 2 Hkh dgykrk gSA vf/kdk'kar% fMftVy midj.k o dEI;wVlZ bl ck;ujh flLVe dk mi;ksx viuh lwpukvksa dks iznf'kZr djus ds fy, djrs gSA D;ksafd vis{kkd'r ;g vf/kd ljy gksrk gSA fad ,slk bysDVªksfud lfdZV cuk;s tks flQZ nks dafM'ku on vkSj off dks iSnk djrk gS ABinary Digit dk 'kCn la{ksi Bit gksrk gS

BASE (RADIX)

POWER



3.Octal Number System:- bl Number System dks Hkh Computer Area es mi;ksx fd;k tkrk gS rFkk ;g System Decimal ds cgqr utnhd gksrk gSAbles flQZ vkB vad 0]1]2]3]4]5]6]7]8]9 gksrs gSA ;g Number System "Base 8" dgykrk gSA

Hexa-Decimal Number System:- ;g Number System Computer ds Area es cgqr mi;ksx fd;k tkrk gSA bles 16 fpUg~ gksrs gSAtSls 0]1]2]3]4]5]6]7]8]9 vkSj A,B,C,D,E,F rFkk ;s 16 fpUg~ fdlh Hkh izdkj dh la[;k dks iznf'Zkr djus ds fy;s mi;ksx fd;s tkrs gSA ;g Number System "Base 16" dgykrk gSA Hexa-Decimal , Alphabets A To F rd dk mi;ksx djrk gSAftudh Decimal Value 10 to 15 ds chp gksrh gSA

NUMBER SYSTEM CONVERSION blds vanj ge ,slh Process 'kkfey djrs gS]ftlds }kjk ,d Number System dks nwljs Number System es Convert fd;k tkrk gSA (A)Binary to Decimal (B)Octal To Decimal (C)Hexa To Decimal (D)Decimal To Binary (E)Decimal To Octal (F)Decimal To Hexa

POSITIONAL VALUE CONCEPT IN OCAL SYSTEM



(G)Octal To Binary (H)Binary To Octal (I)Hexa To Binary (J)Binary to Hexa (A)Binary to Decimal:- ck;ujh ls Msfley esa ges fn;k x;k iz'u ck;ujh uacj esa gksrk gSA ftls ges Msfley es cnyuk gksrk gSA bles ge fn, x, lkjs uacj dks fxudj ,d de djuk gksxk vFkkZr ges Right ls Left dh vkSj 0 ls Counting djuh gksxhAvkSj fQj fn, x, izR;sd ck;ujh vad ls 2 dk xq.kk ,oa nh xbZ iksft'ku dk vk/kkj fd x.kuk ds i'pkr mu lHkh dk ;ksx djuk gksrk gSA (1)Conversion For Integer value(iwa.kkZd eku ds fy;s):- Question :- 111012 = ?10 Solution :-

=(1X24)+(1X23)+(1X22)+(0X21)+(1X20) =(1X16)+(1X8)+(1X4)+(0X2)+(1) =16+8+4+0+1 =2910 Answer. (B)Conversion For Real value(fHkUukRed la[;k ds fy;s ifjorZu) Question :- 0.11012 = ?10 Solution :-

=(1X2-1)+(1X2-2)+(0X2-3)+(1X2-4) =(1X1/2)+(1X1/22)+(0X1/23)+(1X1/24) =(1/2)+(1/4)+(0)+(1/16) =(0.5)+(.25)+(0)+(0.0625) =0.812510 Answer. (C)Conversion Of Integer & Real Values(iw.kkZdaa rFkk fHkUukRed) Question : 10111.110012=?10

=(1X24)+(0X23)+(1X22)+(1X21)+(1X20)+(1X2-1)+(1X2-2)+(0X2-3)+(0X2-4)+(1X2-5) =(1X16)+(0X8)+(1X4)+(1X2)+(1X1)+(1X1/2)+(1X1/4)+(0X1/8)+(0X1/16)+(1X1/32) =16+0+4+2+1+0.5+0.25+0+0+0.03125 =(23)+(0.78125) =23.7812510

N0=1

111012=2910

N0=1

0.11012=0.812510

10111.110012=23.7812510



Answer:- (B)Octal To Decimal:- ;g 8 dk lwpd gSA ftles ge csl dk lwpd 8 ekurs gSA (A)Conversion Of Integer Value :- Question : 34158=?10 Solution :

= (3X83)+(4X82)+(1X81)+(5X80) = (3X512)+(4X64)+(1X8)+(5X1) = 1536+256+8+5 = 1805 Answer (B)Conversion Of Real Value :- Question :- 0.3428=?10

Solution :-

=(3X8-1)+(4X8-2)+(2X8-3) =(3X1/8)+(4X1/82)+(2X1/83) =(3X0.125)+(4X1/64)+(2X1/512) =(0.375)+(1/16)+(1/256) =(0.375)+(0.0625)+(0.00390625) =0.4414062510 Answer. (C)Conversion Of Integer & Real values :- Question :- 516.248=?10 Solution :-

= (5X82)+(1X81)+(6X80)+(2X8-1)+(4X8-2) = (5X64)+(1X8)+(6X1)+(2X1/8)+(4X1/64) = 320+8+6+(1/4)+(1/16) = 334+(0.25)+(0.0625) = 334+0.3125 = 334.312510 Answer. (C)Hexa To Decimal:- ,slk ifjoZru ftles fn, x, uacj dk mlds LFkkuh; eku ls xq.kk gksrk gSA vkSj ftldk csl 16 ekuk tkrk gSA (1)Conversion Of Integer Value :- Question :- 4B616=?10

N0=1

34158=180510

0.3428=0.4414062510

516.248=334.312510



Solution :-

= (4X162)+(BX161)+(6X160) = (4X256)+(11X16)+(6X1) = (1024)+(176)+(6) = 120610 Answer (B)Conversion of real value :- Question :- 0.A4816=?10 Solution :-

= (AX16-1)+(4X16-2)+(8X16-3) = (10X1/16)+(4X1/256)+(8X1/4096) = (0.625)+(0.015625)+(0.001953125) = 0.64257812510 Answer. (C)Conversion Of Integer & Real Value :- Question :- 3AC.BE16=?10 Solution :-

= (3X162)+(AX161)+(CX160)+(BX16-1)+(EX16-2) = (3X256)+(10X16)+(12X1)+(11X1/16)+(14X1/256) = (768)+(160)+(12)+(11/16)+(14/256) = 940+(0.7421875) = 940.742187510 Answer. (D)Decimal to Binary:- (A)Conversion Of integer Value :- Msfley ls ck;ujh esa gedks Msfley ikbaV 2 vkSj ck;ujh fcUnq 0 vkSj 1 gksrs gSA bles ge nks ls Hkkx nsdj fdlh Hkh uacj dk ck;ujh Kkr dj ldrs gSA vkSj tks mRrj izkIr gksxk og uhps ls Åij fd vksj fy[kk tk;sxkA 100

4B616=120610

0.A4816=0.64257812510

3AC.BE16=940.742187510



mRrj = 1100100 Cross Checking Of Answer :- 1100100

1X26+1X25+0X24+0X23+1X22+0X21+0X20 =64+32+0+0+4+0+0=100 (B)Conversion Of Real Value :- ;gkWa fn;s x;s Decimal Number ds n'keyo ds ckn okyh la[;k dks nks ls xq.kk fd;k tkrk gSA fQj izkIr mRrj dks nqckjk nks Hkkxks es rksM+k tkrk gSA (1)n'keyo ds igys okyk Hkkx (2)n'keyo ds ckn okyk Hkkx Integer And real Hkkx dk vad Binary Number ds ,d Number dh rjg ekuk tkrk gSAvkSj 'ks"k n'keyo Hkkx ij iqu%izfd;k gksrh gS vkSj ;g Process rc rd pyrh jgrh gS tc rd fd n'keyo okyk Hkkx 'kwU; ds cjkcj u gks tk;sA;g Integer mRrj ykud ds fy;s Top To Bottom tek;s tkrs gSA Question :- 0.312510=?2 Solution :-

Answer. Cross checking of Answer :- Question :- 0.01012=?10

0.312510=0.01012



Solution :-

= (0X2-1)+(1X2-2)+(0X2-3)+(1X2-4) = (0X1/2)+(1X1/4)+(0X1/8)+(1X1/16) = (0)+(1/4)+(0)+(1/16) = 0+0.25+0+0.0625 = 0.312510 Answer (E)DECIMAL TO OCTAL :- (A)Conversion of Integer Value :- ;g 8 dk lwpd gSA ftles ge Hkh csl dk lwpd 8 ekurs gSA tSls (100)8

mRrj =144 Cross Checking Of Answer :- Question :- 3738=?10 Solution :-

= (3X82)+(7X81)+(3X80) = (192)+(56)+(3) = 25110 Answer (B)Conversion of real Value :- ;gkWa fn;s x;s Decimal Number ds n'keyo ds ckn okyh la[;k dks 8 ls xq.kk fd;k tkrk gSA fQj izkIr mRrj dks nks Hkkxks es rksM+k tkrk gSA (1)Integer (2)Fraction Integer And real Hkkx dk vad Binary Number ds ,d Number dh rjg ekuk tkrk gSAvkSj 'ks"k n'keyo Hkkx ij iqu%izfd;k gksrh gS vkSj ;g Process rc rd pyrh jgrh gS tc rd fd n'keyo okyk Hkkx 'kwU; ds cjkcj u gks tk;sA;g Integer mRrj ykus ds fy;s Top To Bottom tek;s tkrs gSA Question :- 0.562510 Solution :-

0.01012=0.312510

3738=25110



Cross Checking For Answer :-

Question :- 0.448=?10 Solution :-

= (4X8-1)+(4X8-2) = (4X1/8)+(4X1/64) = (1/2)+(1/16) = (0.5)+(0.0625) = 0.562510 Answer (F)Decimal To Hexadecimal :- (A)Conversion of Integer Value :- ;gkWa nh xbZ Msfley uacj dks 16 ls Hkkx fn;k tkrk gSA rFkk tks 'ks"kQy cprk gSAmls gsDl ds cjkcj ekurs gSA bu 'ks"kQy ds Number’s dks Reverse Oreder es Bottom to top tkrs gSA 100

Answer=6 4 Cross Checking For Answer :- 64

6X161+4X160 =96+4 =100 (B)Conversion Of Real Value :- ;gkWa nh xbZ Msfley uacj ds n'keyo okys Hkkx dks 16 ls xq.kk fd;k tkrk gSAizkIr mRrj dks fQj ls nks Hkkxks es rksM+k tkrk gS (1)Integer

Answer

0.562510=0.448

0.448=0.562510



(2)Fraction Integer dks gsDl vad dh rjg ekuk tkrk gSAvkSj cps gq;s fHkUukRed eku dks iqu% fiNyh Process ls xqtjuk iM+rk gS vkSj ;g Process rc rd pyrh jgrh gS tc rd fd fHkUu eku 'kqU; u gks tk;sA lHkh Integer mRrj ykus ds fy;s Top To Bottom dze es tek;s tkrs gSA Question :- 0.070312510=?16 Solution :-

Answer. Cross Checking For answer :- Question :- 0.1216=?10

=(1X1/16)+(2X1/256) =(0.0625)+(0.0078125) =0.070312510 Answer

(G)Octal To Binary :- Octal To Binary And Binary To Octal es Convert djus ls igys lHkh Octal Value dk Binary ds Equal Value dk eku irk gksuk pkfg;sA vkSj ;g eku uhps nh xbZ Table ds }kjk ;kn j[ks tk ldrs gSA Decimal Binary 0 1 2 3 4 5 6 7

0 1 10 11 100 101 110 111

0.070312510=0.1216

0.1216=0.070312510



Octal ds ikl vf/kdre eku 7 gksrk gSA vkSj bl lkr uacj dks n'kkZus ds fy;s Binary dh rhu fcV dh vko';drk gksrh gSA blfy, Octal Table , Binary ds rhu fMftV dks ysdj rS;kj dh xbZ gSA Decimal Binary 0 1 2 3 4 5 6 7

000 001 010 011 100 101 110 111

Question :- 3528=?2 Solution :-

=0111010102 Answer :- Question :- 752.318=?2 Solution :-

Answer =(725.318=111010101.0110012) (H)BINARY TO OCTAL :- ;g Octal To Binary Conversion dh fcYdqy foifjr izfd;k gSAOctal Digit izkIr djus ds fy, Binary dh rhu&rhu fcV dk Group ,d Octal Number dks izkIr djus ds fy, rS;kj fd;k tkrk gSAizR;sd Group ,deepa Octal Number dks n'kkZrk gSA Case 1: tc fn, gq;s fcV dks iwjh rjg 3 ls Hkkx fn;k tk lds]rc 3 fcV dk xqzi cukrs gS]tks fd Integer ds fy, Right Side ls rFkk Real Value ds fy, Left Side ls cuk;k tkrk gSA Question :- 1011102=?8 Solution :-

3528=0111010102

OR

3528=111010102



Answer :- 1011102=568 Case 2: Tkc nh xbZ fcVl~ dh la[;k 3 ls iwjh rjg ls foHkkftr u gks rc & (A)tc fn;k gqvk Number flQZ Integer gks %& tc fn;k x;k Binary Number Integer gks rFkk mlds ikl Decimal Point u gks rc xqzi cukuk Right Side ls 'kq: djrs gSAStarting dh rhu Binary Bit ls feydj Octal dk igyk Digit curk gSAvkSj fQj mu rhu dks NksM+dj vxyh rhu fcV ls nwljk fMftV curk gSAbl izdkj vkxs ds uacj curs gSAvkSj rc rd curs gS]tc rd fd var es ,d ;k nks fcV u jg tk;s]vkSj xzqi cuuk laHko u gksArc ge vko';drkuqlkj 'kwU; yxkdj rhu dk xzqi cukrs gS vkSj bl izdkj ifjorZu dh izfd;k iwjh djrs gSA Question :- 100100012=?8 Solution :-

=2218 Answer:- 100100012=2218 Question :- 10100012=?8 Solution :-

Answer:- 1010002=1218 (B)tc fn;k gqvk Number flQZ Real gks %& tc fn;k x;k Binary Number Real gks rc xqzi cukuk Left Side ls 'kq: djrs gSAStarting dh rhu Bit ls feydj Octal dk igyk Digit curk gSAvkSj fQj mu rhu dks NksM+dj vxyh rhu fcV ls nwljk fMftV curk gSAbl izdkj vkxs ds uacj curs gSAvkSj rc rd curs gS]tc rd fd var es ,d ;k nks fcV u jg tk;s]vkSj xzqi cuuk laHko u gksArc ge vko';drkuqlkj 'kwU; yxkdj rhu dk xzqi cukrs gS vkSj bl izdkj ifjorZu dh izfd;kiwjh djrs gSA Question :- 0.001011102=?8 Solution :-

Answer :- 0.001011102=0.1348 Question :- 0.11101012=?8 Solution :-



Answer :- 0.11101012=0.7248 (I)Hexa To Binary :- Hexa To binary And Binary To Hexa Conversion ds fy;s lcls igys ;g tkuuk t:jh gS fd gsDl dh izR;sd fMftV ls lzacf/kr ckbujh eku D;k gSA ;g eku uhps fn;s Vsfcy ls ;kn j[ks tk ldrs gSA Decimal Binary 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

0 1 10 11 100 101 110 111 1000 1001 1010 1011 1100 1101 1110 1111

D;ksfd gsDl es vf/kdre eku 15 15 gS vkSj bk uacj ds fy;s ckbujh dh 4 fcV dh vko';drk gksrh gS blfy, gsDl Vsfcy dks Binary dh pkj fcV ysdj rS;kj fd;k x;k gSA Decimal Binary 0 1 2 3 4 5 6 7 8 9 A B C D E F

0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111

Question :- 432916=?2



Solution :-

Answer :- 432916=1000011001010012 Question :- 3B5.A816=?2 Solution :-

Answer :- 3B5.A816=1110110101.101012 (J)Binary To Hexa :- ;gWak Hexa To Binary Conversion dh fcYdqy foifjr izfd;k gSAbles Binary dh pkj fcV dk Group cukdj Hexa Digit izkIr dh tkrh gSA Case 1: tc fn, gq;s fcV dks iwjh rjg 4 ls Hkkx fn;k tk lds]rc Integer ds fy;s Right Side ls 4 fcV dk xqzi cukrs gS]vkSj okLrfod eku(Real Value) ds fy;s Left Side ls cuk;k tkrk gSA Question :- 1101100110012=?16 Solution :-

Answer :- 1101100110012=D9916 Question :- 10001110.010111002=?16 Solution :-

Answer :- 10001110.010111002=8E.5C16 Case 2: Tkc nh xbZ fcVl~ dh la[;k 4 ls iwjh rjg ls foHkkftr u gks rc & (A)tc fn;k gqvk Number flQZ Integer gks %& tc fn;k x;k Binary Number Integer gks vkSj mles dksbZ Real Value u gkss rc xqzi cukuk Right Side ls 'kq: djrs gSAvkSj 4&4 fcV dh xqzfiax cukbZ tkrh gSA izFke pkj dh xzqfiax ls igyk Hexa Digit rFkk vxys pkj ls nwljk Hexa Digit curk gSAbl izdkj ;g Process pyrh jgrh gS]tc rd fd var es ,d ;k nks ;k rhu fcV u jg tk;sArc vko';drkuqlkj Left Side 'kwU; yxkdj pkj fcV dk xzqi cukrs gS vkSj mlls lacf/kr Hexa Digit fy[krs gSAbl izdkj ifjorZu dh ;g izfd;k iwjh djrs gSA Question :- 101001111112=?16 Solution :-



Answer :- 101001111112=53F16 Question :- 11101101012=?16 Solution :-

Answer :- 11101101012=3B516 Question :- 111112=?16 Solution :-

Answer :- 111112=1F16 (B) tc fn;k gqvk Number flQZ Real gks %& tc fn;k x;k Binary Number Real gks rc xqzi cukuk Left Side ls 'kq: djrs gSAftles pkj fcV dks ysdj Grouping Process Start gksrh gSA igyh pkj fcV ls Hexa dk igyk Digit o vxys pkj ls nwljk Hexa Digit A vkSj bl izdkj ;g Process rc rd pyrh jgrh gSAtc rd fd var es ,d ;k nks ;k rhu fcV 'ks"k u jg tk;s]vkSj xzqi cuuk laHko u gksArc ge vko';drkuqlkj Right vkSj 'kwU; yxkdj pkj dk xzqi cukrs gS vkSj bl izdkj ifjorZu dh izfd;k iwjh djrs gSA Question :- 0.11010112=?16 Solution :-

Answer :- 0.11010112=?16

Question :- 0.10101111112=?16 Solution :-

Answer :- 0.10101111112=?16 Question :- 0.100012=?16



Solution :-

Answer :- 0.100012=0.8816 Complement:- fMftVy dEI;qVj esa dkaWfIyesaV fof/k dk iz;ksx ?kVkus fd izfdz;k dks ljy cukuk gksrk gSA rFkk rkfZdZd lax.kukvksa fd lqfo/kk ds fy, fd;k tkrk gSA gekjs le{k nks izdkj ds dkafIyesaV miyC/k gksrs gSA ftls izR;sd dk Base R gksrk gSA 1) r complement 2)r-1 complement ck;ujh flLVe esa dkafIyesaV dks 2 dk dkafIyesaV ,d n'keyo i)fr es 10 dk dkafIyesaV 9 ekuk tkrk gSA (1)r Compilment :- fn;s x, Positive Number N esa Base r es Integral Part n Digit gSAN dk r Compliment dks ge Formula dk mi;ksx djds Kkr djrs gSAtgkWa N=0 A mnkgj.k ds fy, 10’s Compliment dk Answer 47480 gSA ftles ge bl Answer dh izkfIr fuEu izdkj ls djsxsa tgkWa ij n=5 ekuk x;k gSA (52520)10=47480 105-52520=47480 n=5 Radix R dk vFkZ n'keyo i)fr es 10 ekuk tkrk gS bl ij n dh ?kkr ds }kjk ewy la[;kk dks iznf'Zkr fd;k tkrk gSAekuk fd Rn ftles n=3 ekus rks bldk vFkZ (r3-1)-N (103-1)-N (1000-1)-N 999-N ;fn N=537 gS rks bl la[;k ds 9’s Compliment 462 gksxkA 1’s complement:- ck;ujh flLVe esa r=2 vkSj r-1=1 gksrk gSA bl izdkj fdlh la[;k dk 1’s dkafIyesaV dk vFkZ gS 2n-1A 2n-1 ,d ck;ujh la[;k gSA tks ,d ds dkafIyesaV ds }kjk iznf'kZr fd tkrh gSAbls ge fuEu izdkj ls Hkh le> ldrs gSA 2n-1=1 ;fn n=3 gSA rks 23=8A ;g 8 Msfley uacj ekuk tk,xkA ftls ck;ujh esa cnyuk gksxkA

Rn-N



ck;ujh flLVe esa ,d dk dkafIyesaV izkIr djus ds fy, nh xbZ ck;ujh la[;k ds gj vad esa ls ,d dks ?kVk;k tkrk gSA ?kVkus dh fof/k esa ,d dsk ÓqU; vkSj ÓwU; dsk ,d ekuk tkrk gSA tks uacj geus ifjofrZr fd;k Fkk ml uacj dk dkafIyesaV fuEu gksxkA 1000 dk Compliment = 0111 Opreation On 1’s Compliment :- 1’s Compliment fdlh nh xbZ Binary la[;k ds izR;sd fcV dks mYVk djus ij tks Binary la[;k izkIr gksrh gSAmls igyh dk 1’s Compliment dgrs gSA Example :- 1 0 1 0 Solution :- 0 1 0 1 (1’s Compliment) 10’s complements:- bldk lw= gSA rn-N gSA tgkWa ij N=0 gSA vFkkZr r-1 ds dkafIyesaV esa ;fn 1 tksM fn;k tk, rks nh xbZ la[;k dk 10’s dkafIyesaV Kkr gks tkrk gSAbldk Formula fuEu gSA rn-N=[(rn-1)-N]+1 tgkWa ij r=100,n=3,N=0 gSA [(1003-1)-0]+1 [(1000000-1)-0]+1 999999+1 vc ;fn 10’s ds Compliment es ls ge 53720 /kVk ns rks ges lgh 10’s Compliment izkIr gksxkAtks fd 946280 gksxkA;fn bl Compliment es 1 dks u tksM+s rks Hkh bldk Answer 10’s Compliment es gh izkIr gksxkA 2’s Compliment :- ck;ujh flLVe esa 2’s dk dkafIyesaV dk vFkZ gSA ,d ds dkafIyesaV esa 1 vkSj tksMuk vkSj bls two dkafIyesaV Hkh dgrs gSA;fn (10110)2=01001(1’s complements) fudys x, uacj esa vFkkZr 01001 esa 1 dks tksMuk iMsxkA 01001 = 101010 ;gk 1 ds dkafIyesaV ds Answer esa 1 tksMdj nh xbZ ck;ujh l[a;k dk dkafIyesaV Kkr fd;k x;k gSA Operation On 2’s Compliment :- fdlh la[;k ds 1’s Compliment dks 1 ls c<+kus ij 2’s Compliment izkIr gksrk gSA 2’s Compliment=1’s Compliment+1 Example :- 0 0 0 1 (1’s Compliment) Solution :- 0 0 0 1 + 1 Answer :- 0 0 1 0 (2’s Compliment) Example :- 1 1 1 0 Solution :- 0 0 0 1 (1’s Compliment) Answer :- 0 0 1 0 (2’s Compliment) Example :- 61 Solution :-



1’s Compliment= 0 0 0 0 1 0 2’S Compliment= 0 0 0 0 1 0 + 1 0 0 0 0 1 1(2’s Compliment) 2’s Compliment fudkyus dh Direct Method :- bl fof/k es nh xbZ Binary Number dks lh/ks gkFk dh rjQ ls Start djksAlkjs 'kwU; ,ao izFke 1 dks oSls gh mrkj yksAblds i'kpkr~ lHkh fcV dks mYVk dj nksA Example :- 1 1 1 0 <- Start Answer :- 0 0 1 0 => 2’s Compliment Example :- 1 0 0 0 0 Answer :- 1 0 0 0 0 2’s Compliment Note:-2’s Compliment dh lh/kh fof/k es ge lh/ks rjQ ls First Coloumn dks gh Convert djrs gSAvkSj vxj igys Coloumn es gh 1 izkIr gksrk gSArks vkxs okyh lHkh fcV ifjofrZr gksxhAvkSj vxj igys Coloumn es 0 vkSj nwljs Coloumn es 1 gks rks Convert ugh djrs gSAvxj iwjs Question es tc rd dh 1 u fey tk, rc rd 0 gh Answer fy[ksxsA Example :- 1 0 1 0 1 0 0 0 Answer :- 0 1 0 1 1 0 0 0 Example :- 1 1 1 1 1 Answer :- 0 0 0 0 1 Example :- 1 0 1 0 Answer :- 0 1 1 0 9’s Complements :- fdlh nh xbZ n'keyo la[;k ds izR;sd vad dks 9 es ls ?kVkus ij ubZ n'keyo la[;k izkIr gksrh gSAmls igyh dk 9’s Compliment dgrs gSA mnkgj.kLo:i 235 ds izR;sd vad dks 9 es ls ?kVkus ij 764 izkIr gksrk gSAvr% ge dg ldrs gS fd 235 dk 9’s Compliment 764 gksxkA 10’s complements:- 9’s Compliment dks 1 ls c<+kus ij 10’s Compliment izkIr gksrk gSAbls fuEu lw= ls vkSj vklkuh ls Kkr dj ldrs gSA 10’s Compliment=9’s Compliment+1 fdlh Hkh la[;k dk 10’s Compliment Kkr djus ds fy, ges 9’s Compliment fudkyuk gksxkAfQj mles 1 tksM+k tk;sxkA 9’s Compliment= 99 42 --------------- 57



10’s Compliment= 57+1 = 58 Note:-9’s Compliment rFkk 10’s Compliment dk mi;ksx nks n'keyo la[;k dks ?kVkus es Hkh fd;k tkrk gSA 10’s Compliment es ?kVkus dh fof/k %& Ex. 35 -14 9’s Compliment= 99 -14 ------------- 85 vc & dh txg $ fy[ksxs vkSj lkFk gh lkFk 14 ds LFkku ij mldk 10’s Compliment fy[ksxs tks fd fuEu gksxkA 10’s Compliment=85+1=86 35 +86 ---------------- 121 var es tks gkfly vk jgk gS ml gkfly dks ges NksM+uk gksxkA vr% ges gkfly ;g crkrk gS fd Answer Positive gSAvr%ges izkIr gksxkA Note:-dHkh&dHkh tksM+ ds var es gkfly ugh vkrk gS blls ;g irk pyrk gS fd Answer Negative gS vkSj ;g Real Answer dk 10’s Compliment gSAvkSj ge ges'kk fn;s x;s Question es uhps okys Hkkx ;k _.kkRed Hkkx dks 10’s Compliment es Convert djrs gSA 39 99 -85 -85 ------------ -----------(9’s Compliment) 14 14 + 1 = 15 (10’s Compliment) 39 +15 -------------- 54 ;gkWa var es dksbZ gkfly ugh vk;k gS vr%Answer Negative ;k 10’s Compliment es gSAvkSj okLrfod Answer dks izkIr djus ds fy;s 54 dks fQj ls 10’s Compliment (-) Sign ydsj Use djuk gksxkA 9’s Compliment 99 -54 ------------ 45 => 45+1=46(10’s Compliment) Answer:- Question :- 36 - 23 Solution :- 9’s Compliment 99 -23 ------------ 76 => 76+1=77(10’s Compliment) 36

35-14=21

39-85=-46



10’s Compliment 77 -------------- 113 Answer:- Question :- 47 - 69 Solution :- 9’s Compliment 99 -69 ------------ 30 => 30+1=31(10’s Compliment) 47 10’s Compliment 31 -------------- 78 Answer:- Binary Fixed Point Representation :- fy[kuk gSA Binary Arithmetic:- Binary Number es dsoy 0 vkSj 1 gksrs gSAvr%;g lh[kus ds fy;s ljy gksrs gSAizR;sd Number 0 Or 1ds Combination ls feydj curk gSArFkk Arithmetic Operation ds ckn mRrj Hkh 0 vkSj 1 ds :Ik es jgrk gSA (1)Binary Addition:- Binary Addition ,Decimal Addition ds leku gh gksrk gSABinary Number ds ;ksx es fuEu fu;eks dk ikyu gksrk gSA 0 + 0 = 0 0 + 1 = 1 1 + 0 = 1 1 + 1 = 0(lkFk gh 1 dsjh ds :i es vxys Coloumn es tqM+rk gS) Binary Arithmetic es 1 lcls cM+k vad gksrk gS rFkk fdlh 1 ls cM+h tksM+ ds fy;s ,d vad dsjh gksrk gSA Example :- (2)Binary Subtraction :- Binary Subtraction ds fy, fuEufyf[kr fu;eks dk ikyu gksrk gSA 0 - 0 = 0 1 - 0 = 1 1 - 1 = 0

36-23=13

47-69=78

Binary Decimal 011 3 +10 +2 ---------- -------- 101 5

Binary Decimal 1111-----Carry 10011 19 1101 13 --------- -------- 100000 32



0 - 1 = 1(lkFkgh vxys Coloumn ls ,d ckjks(Barrow) ysxs) dsoy vfUre fLfFkr es t:jh gS fd m/kkj fy;k tk, tc 0 es ls 1 ?kVkuk gksA?kVkus ds fy, nwljh fof?k Hkh gS ftles tksM+ ds }kjk ?kVk;k tkrk gSArFkk bldk uke Compliment Method gSA uEcjks ds chp vUrj vkSj csl dks nth Power ls c<+kus ds ckn ,d ?kVkus dks gh Compliment dgrs gSA Example :- Find Compliment Of (25)10 Pqkfd Number es nks vad gSAvkSj bldk Base 10 gSA vr% (Base)n-1= 102-1=99 vc 99-25=74 ;fn ge A es ls B dks ?kVkuk pkgrs gS]rks ml fLfFkr es Compliment Method ds }kjk ?kVkus ds fy, fuEu Step gksxhA 1-nksuks Fields dh Size dks ckWa;h vkSj ls 'kwU; yxkdj cjkcj djukA 2-B dk Compliment izkIr djukA 3-bls A es tksM+ukA 4-vc ;fn dsjh 1 gS rks mls izkIr mRrj es tksM+ukA ;fn dksbZ Carry ugh gS ]rks tksM+ dk Recompliment izkIr djuk rFkk blds mRrj ds (-)Sign yxkukA Example :-(35)10 dks (18)10 es ls ?kVkbZ;s]Compliment Method ds vuqlkjA Step 1: 35 Or 18 lkbZt es cjkcj gSA Step 2: Compliment Of (35)10 =102-1-35 =99-35 =(64)10 Step 3: 18 +64 =82 Step 4: ;gkW dksbZ Carry ugh gSA tksM+ dk Recompliment izkIr dj]fpUg~ yxkbZ;s rFkk Result izkIr djsA Answer :- 99 - 82 = -17 bl mRrj dh lkg;rk ls fuEu izdkj izekf.kr fd;k tk ldrk gSA18&35=-17 Example :- 1101 es ls 101 ?kVk;sA Step 1:- 0101 A Field 1101 B Field Step 2:- B dk Field dk 2’s Compliment ysus ij ]ge izkIr djrs gSA 1’s Compliment 1101 0010 +1 ------------

Binary Decimal 101 5 011 -2 ---------- -------- 10 2

Binary Decimal 10011 19 1101 -13 --------- -------- 00110 6



0011 Step 3:- Field A es Step 2 dk Result tksM+us ij]ge izkIr djrs gSA 0 1 0 1 0 0 1 1 ---------------------------------------------- 1 0 0 0 Step 4:- Step 3 ds Result ds vkdkj dk bl fLfFkr es Orignal dks Recompliment djus vkSj (-) Sign djus ij -1000 gksxkA (3)Binary Multiplication :- Binary System es xq.kk djus ds fu;e lkeU; Decimal ds xq.kk djus ds vuqlkj gh gSA Binary Multiplication djus dh Table bl izdkj gSA 0 X 0 = 0 0 X 1 = 0 1 X 0 = 0 1 X 1 = 1 ;g vko';d gS fd Multiplicand dks Copy djsa];fn Multiplier dh fMftV 1 gS rFkk lHkh 0’s dks Copy djs ;fn Multiplier dh fMftV 0 gSA Example :- 1 0 1 X 1 0 --------------------------- 0 0 0 Partial Product 1 0 1 + Partial Product ----------------------------- Answer:- 1 0 1 0 Partial Product Example :- 1 0 1 0 X 1 0 0 1 ---------------------------------- 1 0 1 0 0 0 0 0 + 0 0 0 0 + + 1 0 1 0 + + + -------------------------------------------- Answer :- 1 0 1 1 0 1 0 Example :- 1 1 1 1 X 1 1 ---------------------------- 1 1 1 1 1 1 1 1 + ---------------------------------- Answer :- 1 0 1 1 0 1 Example :- 1 0 1 0 X 1 0 0 1 ---------------------------- 1 0 1 0 0 0 0 0 + 0 0 0 0 + +



1 0 1 0 + + + ------------------------------------------------- Answer:- 1 0 1 1 0 1 0 Example :- 1 1 1 1 X 1 1 -------------------- 1 1 1 1 1 1 1 1 + ------------------------------------ Answer:- 1 0 1 1 0 1 (4)Binary Division :- Binary Division, Decimal Division ds leku gksrk gSAftl izdkj Decimal Division es 'kwU; ls Division dk dksbZ eryc ugh gSAmlh izdkj Binary Division dks lEiw.kZ Table fuEukuqlkj gSA 0 / 1 = 0 1 / 1 = 1 Rules :- (1)Dividend ds cka;h vkSj ls izkjaHk djsA (2),d ds ckn ,d ?kVko djs]tc rd Divisior Dividend es ?kVrk tkrk gSA (3);fn ?kVko laHko gS rks 1 la[;k D;w'ksaV(Quotient) es j[ks rFkk Divisior dks Dividend es ls ?kVk;sA (4);fn ?kVko laHko ugh gS (Dividend vf/kd gS Remainder ls),0 dks D;w'ksaV(Quotient) es j[ksA (5)mlds i'kpkr~ ckn okyh Digit dks Remainder es tksM+sAmlds ckn fQj Process dks nksgjkWa,A Example :-

Overflow And underflow :- n Digit dh tc nks la[;kvks dks tksM+k tk;s rc bldk mRrj n+1 Digit gks rks dgk tkrk gS fd Digit dk Overflow gks x;k gSAOverflow Digital Computer dh leL;k gksrh gS D;ksfd bles Bit ds :i es Digit ,d fu'kfpr la[;k es gksrs gS rFkk n+1 Digit mles laxzfgr ugh fd;s tk ldrs gSA mnkgj.k ds fy;s +80,+80 ;g nks Binary Number gSAbudk ;ksx 160 gksrk gS 8 fcV Register es +127 ls ysdj -128 rd ds Binary vad lekfgr fd;s tk



ldrs gSAysfdu nksuks vadks dk ;ksx 160 gSAtks +127 ls vf/kd gSAvr%;gkWa Overflow dh fLfFkr fufeZr gks xbZ gSAtSls %& 0 1 0 1 0 0 0 0 = 80 0 1 0 1 0 0 0 0 = 80 --------------------------------------------------------------------------------- 1 0 1 0 0 0 0 0 = 160 dqN fu;e ds vk/kkj ij ge vkSj vklkuh ls Overflow And Underflow dh fLfFkr dks n'kkZ ldrs gSA (1)tc nks Unsign vad tksM+s tkrs gS rks Overflow vafre Carry Over ds :i es igpku es vkrk gSA (2);fn ,d la[;k /kukRed vkSj nwljh la[;kk _.kkRed gks vkSj mudk ;ksx fd;k tk, rks lkeU;r%Overflow dh fLfFkr ugh vkrh gSAD;ksfd mRrj mDr la[;kvks ls NksVk gksrk gSA (3)Overflow lkeU;r%ogkW gksrk gS tgWak nksuks vad /kukRed ;k _.kkRed gksA Floating Point Representation :- fHkUukRed la[;k ds nks Hkkx gksrs gSA (1)Mantissa (2)Exponent Mantissa es Fix Point Number gksrk gSAvkSj Exponent es n'keyo fpUg~ dh Position Li"B dh tkrh gSAvFkkZr Digital Computer es Floating Point dks Represent djus ds fy;s okLrfod Value dks fu/kkZfjr djuk gksrk gSAvxj dgh ij n’keyo es Value nh gks vkSj ge mls Real fLfFkr es ykuk pkgrs gS rks mls ge Exponent vkSj Fraction ds }kjk okfil yk ldrs gSA mnk- ds fy, 1234-567 ;g ,d Floating Point Number gSAftles Fraction 0.1234567 gSAvkSj Exponent +04 gSA Exponent ;g ladsr nsrk gS fd n'keyo ds okLrfod fLfFkr ds nkfguh vkSj fdruh Digit gSAvFkkZr ge bls fuEu izdkj ls Hkh fy[k ldrs gSA 0.1234567 X 10+4 = 1234.567 bls Formula ds :i es Hkh fy[kk tk ldrk gSA m X re tgkWa ij m dk vFkZ dk vFkZ gksrk gSA Mantissa,r dk vFkZ gksrk gS Radix vkSj e ;gWak Exponent dks n'kkZrh gSA bldks Hkh ge fuEu fu;e ds vk/kkj ij le> ldrs gSA (1)Fix Point Mantissa fHkUukRed Hkh gks ldrk gS vkSj iw.kkZad HkhA mnkgj.kLo:i +56.78 ;gkWa n'keyo vad Floating Point es gSAvFkkZr bles fHkUu Hkh gS vkSj Exponent HkhA (2)+0.5678 Fraction,+02 Exponent gSA (3)+02 Exponent ;g iznf'kZr djrk gS fd Fraction es n'keyo Point dh fLfFkr nkfgus vkSj ls nwljs vad ds ckn gSA CODES:- tc ge Computer es Data dks Store djrs gS rks og 1 vkSj 0 es Store gksrk gSA ysfdu Computer gekjs }kjk Enter fd;s x, Data dks ugh igpkurk gSA og igys Data dks Code es Convert djrk gS fQj og Code ds ek/;e ls 0]1 es ifjofZrZr gksrk gSA Code rhu izdkj ds gksrs gSA ge tkurs gS fd dksbZ Hkh Data pkgs og Numeric ;k Alphabetic gks , Binary Number 0 vkSj 1 ds :i es Computer Memories es Store gksrk gSA;gkWa ij dqN eq[; Binary Coading System dk mi;ksx fd;k x;k gS og fuEufyf[kr gSA (1)ASCII (2)EBCDIC (3)BCD ASCII(American Standard Code For Information Interchange):-



Lcls izpfyr o lcls T;knk mi;ksx es vkus okyk dksM Ascii gSAComputer’s o lkg;d midj.k ,d Standard Set dk mi;ksx djrs gSAftldh enn ls ls lwpukvks dk vknku&iznku fd;k tk ldsAD;ksfd fdlh ,d midj.k ds }kjk Hksth x;h lwpukWa, fdlh vU; midj.k ds Lohdkj djds le>h tkrh gS]blfy, ,d Standard Code dk gksuk vko';d gSAvr%;g midj.k izR;sd v{kj ds fy, ,d fo'ks"k dksM+ dk mi;ksx djrs gSAtks fd Ascii es gksrk gSAAscii Code dks nks izdkj ls ckWaVk tk ldrk gSA (1)Standard ASCII or ASCII-7 Code (2)Extended ASCII or ASCII-8 Code (1)Standard ASCII or ASCII-7 Code:-;g ,d 7-Bits Code gksrk gSAftles ls 3-Bits ,Zone Bits gksrh gSAo 'ks"k 4-Bits Digit Bits gksrh gSArFkk bl System es dqy 128 fpUg~ iznf'kZr fd;s tk ldrs gSAlkekU;r%ekbdzks dEI;wVj es Byte Format mi;ksx fd;k tk ldrk gSAblfy;s ,sls Computer System ds fy, 7-Bits dk mi;ksx fd;k tkrk gSAo lcls mYVs rjQ dh ,d fcV dks 'kwU; ekuk tkrk gSA;g i}fr izR;sd Byte es ekU; gksrh gSA Standard ASCII Character Set es 128 Characters gksrs gSAftles Lower And Upper case (a to z And A To Z)Letters Punctuation Marks bR;kfn gksrs gSA Standard ASCII Code dk yxHkx lHkh Computer’s And Input Or Output Device es mi;ksx gksrk gSA Example :- NITIN=?(7 Bits Ascii Code) Solution :- Values Are taken From table3

*Numeric And Alphabetic Characters In ASCII-7 Notation Along With Their Hexadecimal Equivalents.

ASCII-7 CODE Character Zone Digit

Hexadecimal Equivalent

0 O11 OOOO 30 1 O11 OOO1 31 2 O11 OO1O 32 3 O11 OO11 33 4 O11 O1OO 34 5 O11 O11O 35 6 O11 O11O 36 7 O11 O111 37 8 O11 1OOO 38 9 O11 1OO1 39 A 1OO OOO1 41 B 1OO OO1O 42 C 1OO OO11 43 D 1OO O1OO 44 E 1OO O11O 45 F 1OO O11O 46 G 1OO O111 47



H 1OO 1OOO 48 I 1OO 1OO1 49 J 1OO 1O1O 4A K 1OO 1O11 4B L 1OO 11OO 4C M 1OO 11O1 4D N 1OO 111O 4E O 1OO 1111 4F P 1O1 OOOO 50 Q 1O1 OOO1 51 R 1O1 OO1O 52 S 1O1 OO11 53 T 1O1 O1OO 54 U 1O1 O1O1 55 V 1O1 O11O 56 W 1O1 O111 57 X 1O1 1OOO 58 Y 1O1 1OO1 59 Z 1O1 1O1O 5A

Hexa Representation Of Ascii-7(vkLdh&7 dk gsDlk ds :i es izn'kZu):- ;gkWa ij izR;sd la[;k dk lcls ckWa;k vad o ekudj fQj 7&fcV~l dksM dk ifjorZu ge gsDlk es djsxs ftlds fy, nks gsDlk vadks dh vko';drk gksxhAbldks ge fuEu mnkgj.k ls le> ldrs gSA

(2)Extended ASCII OR ASCII-8 CODE:- Ascii-7 es flQZ 128 Character gksrs gSAo ;g cgqr de gksrs gSAblfy;s bldk Extended Version Ascii-8 cuk;k x;k ftles dqy 256(28)Character gksrs gSAvr%ckn ds 128 Characters Extended Ascii dgykrs gSAfdlh Hkh fpUg~ ds fy;s 8-Bits dk mi;ksx fd;k tkrk gSAftles 4 Zone bits o 4 Digit Bits gksrh gSAbl izdkj ls Ascii-8 es dqy 256 Characters gksrs gSAftles ls izFke 128 characters Standard Set es vkrs gSAtks fd izR;sd Software es ,d tSls gksrs gSAo ckn ds 128 characters Extended Set es vkrs gSAftudk mi;ksx izR;sd Software es vyx&vyx izdkj ds Characters ds fy, fd;k tkrk gSA

*Numeric And Alphabetic Characters In ASCII-8 Notation Along With Their



Hexadecimal Equivalents. ASCII-8 CODE Character Zone Digit

Hexadecimal Equivalent

0 O1O1 OOOO 50 1 O1O1 OOO1 51 2 O1O1 OO1O 52 3 O1O1 OO11 53 4 O1O1 O1O1 54 5 O1O1 O11O 55 6 O1O1 O111 56 7 O1O1 1OOO 57 8 O1O1 1OOO 58 9 O1O1 1OO1 59 A 1O1O OOO1 A1 B 1O1O OO1O A2 C 1O1O OO11 A3 D 1O1O O1OO A4 E 1O1O O1O1 A5 F 1O1O O11O A6 G 1O1O O111 A7 H 1O1O 1OOO A8 I 1O1O 1OO1 A9 J 1O1O 1O1O AA K 1O1O 1O11 AB L 1O1O 11OO AC M 1O1O 11O1 AD N 1O1O 111O AE O 1O1O 1111 AF P 1O11 OOOO B0 Q 1O11 OOO1 B1 R 1O11 OO1O B2 S 1O11 OO11 B3 T 1O11 O1OO B4 U 1O11 O1O1 B5 V 1O11 O11O B6 W 1O11 O111 B7 X 1O11 1OOO B8 Y 1O11 1OO1 B9 Z 1O11 1O1O BA

Hexa Representation Of Ascii-8 :-

pwfd Ascii-8 es izR;sd fpUg~ ds fy, 8-Bits dk mi;ksx gksrk gSAvr%fdlh Hkh Ascii-8 dk Hexa es izn'kZu djus ds fy, flQZ nks Hexa Number’s dh vko';drk gksxh vr%;g ,d Shortcut Method gSAbldks ge fuEu mnkgj.k ds }kjk le> ldrs gSA (2)Extended Binary-Coded Decimal Interchange Code(EBCDIC):-



tc ges Computer es cgqr ls fpUg~ks dks iznf'kZr djus dh vko';drk gqbZ vkSj geus ns[kk fd 6&Bits BCD dh enn ls ge flQZ 64 fpUg~ks dks n'kkZ ldrs gSA blls vf/kd fpUg~ks dks iznf'kZr djus ds fy, 8-Bits BCD Code cuk;k]ftles nks vfrfjDr Zone Bits dks tksM+k x;kA bl izdkj Zone Bits dh la[;k pkj gks xbZ o 'ks"k pkj Bits vadks ds fy, iwoZor gSAbl 8-Bits Bcd es dqy 256(28) Numbers dks iznf'kZr fd;k tk ldrk gSAftles 10 vad (0-9),Capital Letter’s (A-Z),Small Letter’s (a-z) o vU; fpUg~ tSls +,-,*,bR;kfn iznf'kZr djrs gSAblds vykok dqN ,sls Control Character tks fd Print ugh fd;s tk ldrs gSAmudks Hkh bl System es n'kkZ;k tk ldrk gSA Example For Representation Of Word: S O N U = ?(EBCDIC)

Alphabetic and Numeric Characters in EBCDIC Along With their Hexadecimal Equivalents Character EBCDIC CODE Hexadecimal Equivalent A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 0

1100 1100 1100 1100 1100 1100 1100 1100 1100 1101 1101 1101 1101 1101 1101 1101 1101 1101 1110 1110 1110 1110 1110 1110 1110 1110 1111

0001 0010 0011 0100 0101 0110 0111 1000 1001 0001 0010 0011 0100 0101 0110 0111 1000 1001 0010 0011 0100 0101 0110 0111 1000 1001 0000

C1 C2 C3 C4 C5 C6 C7 C8 C9 D1 D2 D3 D4 D5 D6 D7 D8 D9 E2 E3 E4 E5 E6 E7 E8 E9 F0



1 2 3 4 5 6 7 8 9

1111 1111 1111 1111 1111 1111 1111 1111 1111

0001 0010 0011 0100 0101 0110 0111 1000 1001

F1 F2 F3 F4 F5 F6 F7 F8 F9

EBCDIC dk Hexa es Conversion :- EBCDIC es izR;sd fpUg~ dks n'kkZus ds fy, gedks 8&fcV~l dh t:jr gksrh gSArFkk ,d gsDl vad 4&fcVl~ dk gksrk gSAblfy, ge flQZ 2 gsDl uacj dk mi;ksx djds fdlh Hkh EBCDIC es iznf'kZr vad dks n'kkZ ldrs gSA;g ,d Shortcut Method gSA bldks ge fuEu mnkgj.k ds le> ldrs gSA

(3)BCD-Binary Coded Decimal:- bl System es ge izR;sd Decimal Number dk Binary Number u Kkr djrs gq, izR;sd Digit dk ,deepa vf}rh; eku fu/kkZfjr dj nsrs gSAtks uhps fn, x, Table es n'kkZ;k x;k gSA Decimal Digit BCD Equivalent 0 1 2 3 4 5 6 7 8 9

0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1

geus Table es ns[kk fd izR;sd Decimal Number ds fy, pkj Binary ds vad dk mi;ksx fd;k x;k gSAijUrq vafre Ng Binary ds leqg dk mi;ksx fdlh Hkh Decimal Number ds fy, ugh fd;k gSAog vad 1010]1011]1100]1101]110] 1111AflQZ izFke nl Binary Group dk gh mi;ksx Decimal Number dks n'kkZus ds fy, fd;k x;k gSAfdlh Hkh Decimal Number dks BCD es fuEu rjg la iznf'kZr djsxsaA



6-Bits BCD Code:- lk/kkj.kr% 4 fcVl~ BCD System es flQZ Binary ds 16 Groups gksrs gSArFkk mles ls Hkh ek= 10 Binary Groups gh mi;ksx fd, tkrs gSAbl izdkj 4 fcVl~ BCD ds }kjk vadks ds vykok fdlh vU; fpUg~ dks iznf'kZr ugh fd;k tk ldrk gSAblhfy, 6&fcVl~ BCD System dk mi;ksx djrs gSA ftles dqy 26=64 Binary Group curs gSAvkSj vf/kd ls vf/kd fpUg~ks dks iznf'kZr fd;k tkrk gSA6-Bits BCD System es Bits rks iwoZor~ jgrs gS fdUrq nks vfrfjDr Bits dk mi;ksx Zone Bits ds :i es fd;k tkrk gSAbles dqy 64 vad gksrs gSA ftldh enn ls ge 10 vad o Alphabets rFkk 28 vU; egRroiq.kZ fpUg~ iznf'kZr dj ldrs gSA

Alphanumeric And Numeric Characters In BCD Along With Their Octal Equivelant:- Character BCD Zone Code Digit Octal Equivelant A B C D E F G H I J K L M N O P Q R S T U V

11 11 11 11 11 11 11 11 11 10 10 10 10 10 10 10 10 10 01 01 01 01

0001 0010 0011 0100 0101 0110 0111 1000 1001 0001 0010 0011 0100 0101 0110 0111 1000 1001 0010 0011 0100 0101

61 62 63 64 65 66 67 68 69 41 42 43 44 45 46 47 48 49 22 23 24 25



W X Y Z 1 2 3 4 5 6 7 8 9 0

01 01 01 01 00 00 00 00 00 00 00 00 00 00

0110 0111 1000 1001 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010

26 27 30 31 01 02 03 04 05 06 07 10 11 12

Octal representation Of 6-Bits BCD:- Pwfd fdlh ,dOctal Number dks iznf'kZr djus ds fy, 3&fcV~l dh vko';drk gksrh gSAvr%6-Bits BCD dks ge 3-Bits ds nks Group es ckWaV ldrs gSAbl rjg ls ges 6-Bits dks iznf'kZr djus ds fy, nks Octal Number dh vko';drk gksxhAtks fd ,d Shortcut Method gksxkA

Gray Code:- ;g Code dsoy 1 Bit ds ifjorZu ls cnyrk tkrk gSA;g ifjorZu ;k rks 0 ls 1 es gksrk gS ;k 1 ls 0 esAGray Code Counter dk iz;ksx dzec}rk dks iznf'Zkr djus ds fy, fo’ks"k :i ls fd;k tkrk gSAReflected Code dks Gray Code ds uke ls gh tkuk tkrk gSADigital System dh Designing Data dks dsoy Discreate Form es Process djus ds fy, Design fd;k tkrk gSA T;knkrj Physical System yxkrkj Output data dks Supply djrk gSA;g Data fdlh Hkh Digital System es Apply gksus ls igys Digital ;k Discreate Form es Convert gks tkrk gSAAnalog Information dks Digital Form es Convert djus ds fy, Analog To Digital Convertor dk mi;ksx fd;k tkrk gSAbles dHkh&dHkh Reflected Code dk Hkh iz;ksx fd;k tkrk gSAReflected Code dk Binary Code ds lanHkZ es ;g Advantage gS fd reflected Code es ,d Number Change gksus ls vxys okys Coloumn es og Number Proceed gks tkrk gSAReflected Code dk ,d dfBu Application ;g gS fd Analog data dks Position ds }kjk Represent fd;k tkrk gSAbldh Table fuEu izdkj dh gSA Four Bit Reflected Code Reflected Code Decimal Equivelant 0000 0001 0011

0 1 2



0010 3 Gray Code ges’kk MSB(Most Significiant Bit)dks oSlk gh mrkj dj Next Bit ls Comparision djrs gSAvxj dgh ij gS rks ge mldk Carry Portion gVk nsrs gSAvkSj flQZ bles ls ge 0 dks ysxsA (1)Example:- 1 0 0 0 -> Binary Answer :- 1 1 1 1 -> Gray Code (2)Example:- 1 0 0 1 0 -> Binary Answer :- 1 1 1 0 0 -> Gray Code Excess-3 Code:- ;g dksM iqjkus dEI;wVj esa iz;ksx gksrk FkkA bles otu nsus fd iz.kkyh ugh gksrh Fkh bl ck;ujh dksM ds vanj BCD ds lerqY; vdksa esa rhu tksM dj izkIr fd, tkrs FksA;fn xzs dksM fd izFke 10 ,UVªh ns[ks rks irk pyrk gSA fd 9 ls 0 fd vkSj ykSVus ij 3 fcVl dk varj vk tkrk gSA vr%10 rd ds vadksa dks xzs dksM esa ck;ujh vadks esa ifjofrZr djus ds fy, 3 n'keyo vad ls izkjaHk fd;k tkrk gSA rc ;gWak 10 vad ls ysdj 12 vad rd lekIr gksrs gSA 3 ls izkjaHk gksus ds dkj.k bl dksM dks excess-3 code dgk tkrk gSAbl Method es ges izR;sd Decimal es 3 dks tksM+uk gksrk gSA Example :- 12 1 2 + 3 + 3 ---------- ----------- 4 5 Binary Number 4 = 0100 Binary Number 5 = 0101 Excess-3 Code 12 = (01000101) Example :- 29 2 9 + 3 + 3 ---------- ---------- 5 12 6 Binary Number 5 = 0101 Binary Number 12 = 1100 Excess-3 Code 12 = (01011100) Example :- 17 1 7 + 3 + 3 ---------- ----------- 4 10 Binary Number 4 = 0100 Binary Number 10 = 1010 Excess-3 Code 12 = (01001010) BCD Code:- BCD Code 4 Digit dk gksrk gS vkSj bles ge lHkh Portion dks vyx&vyx tksM+ ldrs gS vkSj bles dksbZ Carry vkrh gSArks mls NksM+ nsrs gSAysfdu vxys okys Block es ;g Carry tksM+ nsrs gSA Example :- 6 4 7

1+1=10



4 8 2 Binary Form 0110 0100 0111 0100 1000 0010 lcls igys ge Right Side okys nksuks Binary Form dks tksM+sxsA 0111 + 0010 --------------- 1001 bl tksM+ ds var es dksbZ carry ugh gSAvkSj ;g Decimal Equivalent Hkh 10 ls de gSAblhfy, vc ge vxys Coloumn dh vkSj c<+sxsA 0100 + 1000 ---------------- 1100 bl tksM+ ds var es Hkh dksbZ carry ugh gSAysfdu ;g Decimal Number es Convert djsxs rks bldk eku 12 izkIr gksxk tks fd 10 ls T;knk gSAblhfy, vc ge tksM+ okys Block es Hkh (0110)=6 dk tksM+ yxk,xsA 1100 + 0110 ------------------ 0010 bl Answer es ges var es Carry 1 dh izkfIr gqbZ gS ml Carry dks vc ge vxys Group es tksM+ nsxsAvr%Carry dks gVkus ds ckn II Group dk Asnwer 0010 gksxkA 0110 + 0100 1 --------------- 1011 IIIrd Group dk Answer Hkh Decimal es Convert djus ij 10 ls T;knk izkIr gks jgk gS vFkkZr 11Arc ge bles Hkh 0110(6)dks tksM+ nsxsA 1011 + 0110 ----------------- 0001 blds Answer es fQj ls ges Carry 1 izkIr gks jgk gSArc ge cles ls MSB Bit vFkkZr~ 1 dks gVk nsxs rc ges Answer 0001 izkIr gksxkAoSls Hkh BCD 4 Digit dk gksrk gSAysfdu Carry 1 izkIr gqbZ gSAmls ge bl Answer es ls gVkdj vxys Coloumn es tksM+ nsxsAysfdu vxyk Coloumn gekjs ikl mifLFkr ugh gSA

1

1



Error Detection And Correcting Code:- =qfV iMus okys ck;ujh dksM fMftVy =qfV;ksa dks VªkWaUlfe'ku ds le; idMus ds fy, fufeZr fd, tkrs gSA ;g =qfV lq/kkjh ugh tkrh dsoy mldk ladsr fn;k tkrk gSA oLrqr% ,slh =wfV;ksa fd ckjEcjrk ns[kh tkrh gSA ;fn ckjEcjrk de gSA rks MkVk iqu% Hkstk tkrk gSA vkSj ;fn ckjEcjrk vf/kd gSA rks ,slk ekuk tkrk gSA ds flLVe esa dgh dksbZ =qfV gSA Binary Information es Pulse Modulated Signals ;k Digital Signals tks fd Wire ;k Radio Waves ds }kjk Communication Model dks Input ;k Output ds fy, Data Transmission dk ek/;e gksrk gSAError Detection Code dk Use Transmission ds le; Error Detect djus ds fy, fd;k tkrk gSADetected Error dks Correct ugh fd;k tkrk gSAysfdu mldh mifLFkfr dks Indicate djrk gSA1 Bit tks fd Message ds lkFk Include gksrk gS]og Extra Bit gksrh gSAInformation dk ,d Location ls nwljs Location ij Transfer dk le; Parity Bit gh Handle djrk gSAtc ge Message Parity Bit ds lkFk Destination ij Transfer gksrs gSAvkSj bl Process dks Check djus ds fy, ges Correcting Code dk mi;ksx djuk gksrk gSA



UNIT-2 Logic gates – binary information signal ds ek/;e ls izf"kr fd;s tkrs gS! ;g signal fuEu gksrs gSA1 vkSj 0]pules and no-pules,on or off,true and false.T;knkrj information 0 vkSj 1 ds ek/;e ls Hksth tkrh gS! bUgs logic circuit ;k logic gate dgrs gS! Digital computer es vusd gate gksrs gSA vkSj gj gate dk mnns'; Hkh vyx &vyx gksrk gS!vkSj budk mi;ksx chtx.krh; #i es fd;k tkrk gS! gj gate ds }kjk input vkSj output ds e/; lca/k LFkkfir gksrk gSAmls lR;rk lkj.kh ds }kjk n''kkZ;k tkrk gS! gj gate es ,d ;k nks variables input ds #i es gksrs gS ftldk ,d output gksrk gS! Logic gates ,d electronic circuit gksrk gS tks nks ;k nks ls T;knk input signals dks ysdj ,d output signal iznku djrk gS ;g lHkh logic gates computer es lHkh circuits ds fy, ,d block cukrs gS!computer circuit fofHkUu izdkj ds logic gates dk operation perform es gksus ds ckn curk gSAGates dbZ izdkj ds gksrs gSA (1)Basic Gates (2)Universal Gates Basic Gates:- Basic Gates ds vanj ge rhu izdkj ds Gates dk mi;ksx djrs gSA (1)AND Gate (2)OR Gate (3)NOT Gate (1)AND Gate:-AND Gate es nks ;k nks ls vf/kd Input gksrs gS rFkk ,d Output gksrk gS ;g fuEu ifjHkk"kkvks ds vk/kkj ij dk;Z djrk gS! “AND Gate dk Output flQZ rHkh ,d gksxk tc blds lHkh Input 1 gksxsA” AND Gate es AND Logic Function gksrk gS vkSj AND Gate dk cht xf.krh; fpUg nksuks ifjorZukadks ds e/; - ;k * gksrk gS gkaykfd ge fcuk -;k * Sign ds Hkh fy[k ldrs gSA AND Gate Logic Multiplication dk Physical Relation gS vFkkZr blesa tc nksuks Switch On (1)gks rc gesa output 1 feyrk gS! bldh lR;rk lkj.kh ,ao Block Diagram fuEu izdkj dk gksrk gSA

(2)OR Gate:- OR Gate es nks ;k nks ls vf/kd Input gksrs gS rFkk ,d Output gksrk gS! bldh ifjHkk"kk fuEu gS “OR Gate dk Output rHkh 1 gksxk tc blds ,d ;k ,d ls vf/kd Input Hkh 1 gksA”



OR Gate Logical Addition Operation dk Physical Relation gSA ;g ,d ,slk Electronic Circuit gS tks fd Output Signal 1 Return djrk gSA vkSj ;g Output es ’+’ Sign dks Use djrk gSAbldh lR;rk lkj.kh ,ao bldk Block Digram fuEu gSA

mij ds truth table ls irk pyrk gS fd output signal 1 rHkh gksrk gS tc input signal dksbZ Hkh 1 gksA (3)NOT Gate:-NOT Gate Circuit es dsoy ,d Input o ,d gh Output gksrk gS bls NOT Gate blfy, dgk tkrk gS D;ksfd bldk Output ges'kk Input ds foijhr gksrk gSAvr% blfy, bls “Complementary Circuit” ;k Inverter dgrs gSA bldh ifjHkk"kk ds vuqlkj ge bls vklkuh ls le> ldrs gSA “NOT Gate dk Output rHkh 1 gksrk gS tc bldk Input dHkh Hkh 1 u gksA” NOT Gate ifjiwjd Operations dk Physical Relation gS bldh lR;rk lkj.kh fuEu izdkj dh gksrh gSA

UNIVERSAL GATE:-UniversalGate ds vanj ge rhu rjg ds Gates dk iz;ksx dj ldrs gSA (1)NOR Gate (2)NAND Gate (3)XOR Gate (1)NOR Gate:-fdlh OR Gate ds vkxs ;fn ge dksbZ NOT Gate yxkrs gSArc ;gNOR Gate dgykrk gSANOR Gate,OR Gate dkComplimentgksrk gSA vFkkZr NOR Gate es Output rHkh 1 gksxk tc blds lHkh Input 0 gks rFkk ;g rHkh 0 gksxk tc bldk dksbZ Input 1 gks ,ao bldh lR;rk lkj.kh fuEu gSASymbal ($) Key dk iz;ksx Boolean Expression es NOR Operations dks represent djus ds fy, fd;k tkrk gS!



(2)NAND Gate:-NAND Gate okLro es NOT AND Gate gksrk gS vFkkZr fdlh AND Gate ds Output ij ;fn NOT tksM fn;k tk;sa rc ;g NAND Gate dk dk;Z djrk gS bls ge fuEu ifjHkk"kk ls le> ldrs gS! “,d NAND Gate flQZ rHkh Output 0 nsxk tc blds leLr Input 1gksxsA” NAND Gate,AND Gate dk Compliment gksrk gSANand Gate dk output 1 rHkh gksxk tc bldk Output Signal 0 gks vkSj 0 rHkh gksrk gS tc lHkh Input 1 gks ! bldks ge lR;rk lkj.kh ,ao Block Diagram ds vk/kkj ij vklkufh ls le> ldrs gSA

(3)XOR Gate:-bldk iwjk uke Exclusive OR Gate gksrk gS bls ge fuEu izdkj ls ifjHkkf"kr dj ldrs gSA “fdlh nks Input Exclusive OR Gate dk Output flQZ rHkh 1 gksxk tc mldk dsoy ,d gh Input 1 gksxk”A bls ge Å ,oa ds }kjk dze'k: Binary Operation ds fy, Denode fd;k tkrk gSAbldh lR;rk lkj.kh ,oa bldk Block Digram fuEu izdkj dk gksxk&

BOOLEAN ALGEBRA:-Boaloan Algebra ekuo ds lgh ;k xyr ls lcaf/kr Logic dk xf.krh; fu:i.k gS!Boolean Algebra ds fl}kar dks 1854 es tkWtZ cwfy (George Boole) us izfrikfnr fd;sa Fks Abldk mi;ksx Digital Circuit fuekZ.k dh foospuk ds fy, fd;k x;k gSABoolean Function es Binary Variables rFkk Logic Operations dk iz;ksx fd;k tkrk gS!Logic Operation es And OR ;k mlds Compliments dks lfEefyr fd;k tkrk gS! lkekU;r: Boolen Algebra Accession es ,d Variable flQZ nks Values gh ys ldrk gS vFkkZr 1 vkSj 0.ABoolean O;atd dks ge fuEu ifjHkk"kkvks ls ljy dj ldrs gSA 1 Boaloan Variables - ;g bl izdkj dh pj jkf'k;Wak gS ftuds flQZ nks gh eku gksrs gS! tSls– Gate ds Input rFkk Output es tks jkf'k;k mi;ksx es vkbZ gS og Boolean pj jkf'k;k dgykrh gS! D;ksfd buds dsoy nks gh eku gks ldrs gS- 0 vkSj 1 . 2 Boaloan Functions - ;g ,d ,slh Boolean pj jkf'k gksrh gS ftldk eku nwljh Boolan pj jkf'k;ks ij fuHkZj djrk gS! mnkgj.k Lo:i



F = A. B+C ;gka ij F ,d Boolean Function gS tks Boolean pj jkf'k;ks A. B vkSj C ij fuHkZj djrk gSA Boaloan Algebra – tks chtx.krh; Boolean pj jkf'k;ks ij dk;Z djrk gS!boaloan chtx.krh; dgykrk gS! tc fdlh Boolean Qyu dks ,d ,sls rkfdZd ifjiFk es cny fn;k tk;sa tks mlds pj jkf'k;ks ls laca/k LFkkfir djs rks bls Logic Digram dgrs gS!bu lHkh fu;eks dh lkj.kh dks Hkh uhps n'kkZ;k tk jgk gS! 1) A+O=A 2)A .O =O 3)A+1=1 4)A.1=A 5)A + A=A 6)A . A = A 7)A+A=1 8)A . A =O 9)A + B =B+A 10)A.B=B.A 11)A+(B+C)=(A+B)+C 12)A.(B.C)=(A.B) .C 13)A.(B+C)=A.B+A.C 14)A+B.C = (A+B).(A+C) 15) 16)(A+B)=A.B 17)(A.B)=(A+B) 18)A.(B+C) =(A.B).(A.C) 19)A.(B.C)=(A.B)+(A.C) 4) Logic Adition\OR Law–bles ge ‘+’ Sign dk fpg~u lkekU; xf.kr dh rjg mi;ksx es ugh ysrs gStcfd ;g Sign Boolean Algebra es ‘or’ dks n'kkZrk gSs bldks ge fuEu table ds }kjk vklkuh ls le> ldrs gS! logical OR(+) operation

Logic Multiplication\And Law:- Boolean chtxf.kr es ge AND Operation dks Sign ds }kjk n'kkZrs gS! ,d operation dks xq.kk lkbu * ds }kjk n'kkZrs gSA blfd lR;rk lkj.kh fuEu gksxhA bldh lR;rk lkj.kh fuEu gSA

Demorgan’s theorem:- NOR rFkk NAND xsV fd O;k[;k djus ds fy, ;g Theoram fo'ksÔ egRoiw.kZ gSAbudk mi;ksx fdlh cwfy;u Qyu ds chtxf.krh; :i dks ljy djus es gksrk gSAbudh nks izes; gksrh gSA

(1) (2)



(1) izFke izes; dks ge fuEu izdkj ls ifjHkkf"kr dj ldrs gS fd & “fdlh ;ksx dk Compliment’s cjkcj gksrk gSACompliment’s ds xq.kuQy ds” ,Ytsczk ds Theoram vFkkZr Demorgan’s Theorem Vscy ds }kjk le>k tk ldrk gSA blds vuqlkj NOR(A+B)’ dks A’B’ ds cjkcj izLrqr djrk gSA ge bls fuEu izdkj ls Hkh le> ldrs gSA

PROVE THAT BY LOGIC CIRCUIT

(2) “Compliment dk ;ksx xq.kuQy ds Compliment ds cjkcj gksrk gSA ,Ytsczk ds Theoram vFkkZr Demorgan’s Theorem Vscy ds }kjk le>k tk ldrk gSA ge bls fuEu izdkj ls Hkh le> ldrs gSA

Prove That Basic Laws And Properties Of Boolean Algebra:- (1)Commutative Law:-



(2)A.(B+C)=A.B+A.C

Prove The Following Using The Boolean Algebric Theorems:-



MAP Simplification:- eSi ,d Mk;xzke gksrk gSA tks fd square ls feydj cuk gksrk gSA rFkk izR;sd square ,d minterm gksrk gSA izR;sd cwfy;u QaX'ku dks feuVeZ ds le ls n'kkZrs gSA Karnaugh Map Method Boolean Function dks gy djus dh ,d Graphical Technique gSAftls ge Karnaugh Map es i<+sxsA Minimization techniques:- 4 osfj,cy cwfy;u QXa'ku dk esi fefuekbts'ku 3 osfj,cy QXa'ku ds iz;ksx ds leku gksrk gSA bles vxys square dks vxys dkye ls n'kkZ;k tkrk gSA esi dks Åij ,oa uhps rFkk nka;s vkSj ck;sa square ds lrg ls define fd;k tkrk gSA flEifyfQds'ku esa ge vk;kuh ls 4 osfj,cy esi ds }kjk fu/kkZfjr fd;k tkrk gSA bls ge fuEu fcUnwvksa ds }kjk le> ldrs gSA 1- ,d square ,d feuVeZ dks jhiztsaV djrk gSA 2- nks adjacent square 3 feuVeZ dks jhiztsaV djrk gSA 3- 4 adjacent square 2 feuVeZ dks jhiztsaV djrk gSA K map:- bldk iwjk uke Karnaugh Map gksrk gSAKarnaugh ,d ,slk Method gSA tks Straight Forward Procedure (vkxs tkrh gqbZ fdz;k) dk iz;ksx dj cqfy;u QXa'ku dks fefuekbt esa izkslhM fd;k tkrk gSA bl eSFkM dks lR;rk lkj.kh ds Sum of Product vkSj Product of Sum ds }kjk le>k;k tk ldrk gSA Sum Of Product:- Sum Of Product ,sDlizs'ku ds izR;sd izksMDV LVsi esa ml QXa'ku ds lHkh osfj,cy ;k rks okLrfod ;k dkEIyhesaVsM :i esa gksrs gSA rFkk bu LVsi dks feuVeZ ;k Fundamental Product dgrs gSA Sum Of Product es nks Boolean Function ds chp Addition (+)dk Sign yxk gksrk gSA ;g feuVeZ osfj,cy flQZ ,d buiwV osY;w ds fy, gh lgh gksrk gSA mnk- ds fy, (A.B.C)=A. B.C+A.B.C+A.B.C bl mnk- esa izR;sd feuVeZ dk eku osfj,cy ds flQZ ,d buiwV osY;w ds fy;s gh ,d gksxkA vFkkZr feuVeZ ABC dk eku flQZ rHkh ,d gksxk A tc A=1, B=0, C=1 gksxk A Product of Sum:- Sum Of Product dh rjg gh Product Of Sum dk Hkh iz;ksx fd;k tkrk gSAbls ge Max Term Hkh dgrs gSA esDlVeZ izksMDV vkQ le ,Dlizs'ku dk og LVsi gksrk gSA ftles ml QXa'ku ds lHkh osfj,cy ;k rks okLrfod ;k dksEIyhesaVsM :i esa gksrs gSAProduct Of Sum es nks Boolean Function ds chp Multiplication (*And .)Sign yxk gksrk gSA A.B.C=(A+B+C).(A+B+C) Simplification Of Boolean Expression Using K-Map:- K-Map dh lgk;rk ls ge fdlh Hkh cM+s O;atd dks ljy dj ldrs gSa A bldh fof/k bl izdkj gS %& 1- fn, x, Qyu ;k lR; rkfydk dks ns[kdj K-Map cukvks A 2- 1 ;k 0 ds lewg cukvkss Aa 3- izR;sd lewg ds fy, in fy[kks A 4- ljfydr O;aatd fy[kks A Groups:- mijksDr fof/k esa dza- 2 dks ns[kksA 1 o 0 ds lHkh lewg cuk ldrs gSa A ;s bl izdkj gSa A



Pair:- nks ikl&ikl 1 tks fd ,d gh iafDr ;k LraHk esa gksrs gSa] isvj cukrs gSa A

Quad:- Pkj 1 ds lewg tks fd ,d gh iafDr ;k LraHk esa gksa ;k nks ds Bhd uhps nks gks rks DoM curaas gSa A

Octet:- ;fn ,d Row esa vkB 1 ;k ,d gh Column esa vkB 1 ;k pkj ds Bhd uhps pkj ;k pkj ds Bhd ikl pkj ,d gksrks Octet cukrk gSS %

Single:- ,d 1 ftlds vkl&ikl dksbZ vkSj 1 ugha gks flaxy cukrk gS A Overlapping:- Groups cukrs le; cM+s Groups igys cukuk pkfg, A cM+k Group cukus ds fy, ge nwljs Groups ds 1 dk mi;ksx dj ldrs gSa A vr% nks ;k nks ls vf/kd Groups ,d nwljs ij Overlap dj ldrs gSa A fuEu K-Map dks ns[kks%&



;g ,d Pair dh ,d Pair ij Overlap dk mnkgj.k gS A ,d piar fdlh Quad ds lkFk Hkh Overlap dj ldrk gS A

nks Quad Hkh vkil esa Overlap dj ldrs gSa %

Rolling:- Rolling dh lgk;rk ls Hkh ge cM+s Groups cuk ldrs gSa A Pair:- ,d gh Row o Column ds 1 tks fd dksuksa ij gksa Rolling Pairs cukrs gSaA uhps fp= esa nksa Rolling Pair n'kkZ, x, gSa %&

bl izdkj Rolling ls Quad Hkh cuk;k tk ldrk gS%



pkj dksuksa ij 1 gks rks Quad curk gS%

Overlapping With Rolling:- Rolling vkSj Overlapping dks lkFk&lkFk Hkh mi;ksx fd;k tk ldrk gS A

,d pair ,d Quad ij Rolling dh lgk;rk ls Overlapping dj jgk gS A ,d Rolling Quad, nwljs Quad ij Overlap Hkh dj ldrk gS %

lewgksa ds fy;s in fy[kuk%& ,d ds lewg cukus ds Ik'pkr~ SOP :Ik esa ljy O;atd blizdkj fudkyk tk ldrk gS A 1- fdlh lewg esa Åij uhps o ckW;s ls nkW;s pyus ij tks pj ifjofrZr gksrs gS] mUgs gVk nsA 2- ;fn dksbZ pj 1 ij fu;r gSArks bls oSls fy[kks tSls A=1 gSA rks A fy[kksA

3- ;fn dksbZ pj 0 ij fu;r gSArks mldk Compliment fy[kks tSls A=0 gSA rks fy[kksA 4- dzekad 2 o 3 ls tks pj feys muds chp es Dot(.)yxkvksA dzekad 1 ls 4 lHkh lewgks ds fy, nksgjkvks rFkk lHkh inks dk ;ksx yksA “0” dh lkg;rk ls gy :- ;fn ge 'kwU; dh lkg;rk ls lewg cukrs gS rks ges POS ds :i es gy feysxkA'kwU; ls gy djus gsrq fuEu dk;Z djus gksxsA



1- fdlh lewg esa Åij uhps o ckW;s ls nkW;s pyus ij tks pj ifjofrZr gksrs gS] mUgs gVk nsA 2- ;fn dksbZ pj 0 ij fu;r gS rks mls ,sls gh fy[k nks tSls ;fn A=0 rks A fy[kks

A=1 gSa rks fy[kksA 3- zdzekad 2 ls izkIr pjks ds chp (+) Sign dk fpUg~ yxkvksA 4- blh rjg izR;sd lewg ds fy, 1 ls 3 nksgjkvkasAizkIr lHkh inks dk rkZfdd xq.kk djksA;gh POS :i es ljy Oa;td gSA Two Variable K-Map:-Two Variable K-Map es de ls de pkj Min Term dk mi;ksx dj ldrs gSAvFkkZr 22=4 Ables dksbZ nks pj jkf'k;ks dks gh fy;k tkrk gSAvkSj bldks Simplyfy djus ds fy, ges 4 Square cukuk gksrk gSA Note:-fdlh Function dh pj jkf'k ij vxj ‘-‘ Sign yxk gks rks mldh Value 0 ekuh tk;sxh vkSj vxj fdlh pj jkf'k ij ‘-‘(Bar) Sign yxk gks rks mldh Value lnSo 1 ekuh tk;sxhA ;fn fdlh Question es S Sign ds lkFk m ;k dksbZ vkSj v{kj Small es gS rks Answer dks ge tSlk izkIr gqvk gS oSlk gh fy[ksxsAvkSj vxj Capital es fy[kk gSArks Answer es ges 0 dh txg 1 vkSj 1 dh txg 0 dks djuk gksxkArc ges lgh Answer izkIr gksxkA For Two Variables K-Map:-



For Three Variable K-Map:-

Find The Boolean Function In Following Figure:-

For 4 Variable K-Map:-

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 A 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1



B C D

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1

Y 1 1 1 1 1 0 0 0 0 1 0 1 1 1 0 1 E=Sm(1,2,3,4,9,11,12,13,15) =>E=Sm =>Solution:-

Question->Solve Sm(0,4,10,11,14,15)

Question->Solve The Following Expression By Mapping:- F=Sm(0,2,3,6,7,8,9,10,13) Solution:-

Question->Solve-



Question->Reduce by mapping the implement in SOP NAND Gate logic: M=Sm(0,1,3,4,5,7,10,13,14,15)

DONT CARE Condition:- Boolean Expression Logic Network ds O;ogkj dks iznf'kZr djrk gSa izR;sd oxZ]Input Variable’s dh Logic Value ds lewg ls lacf/kr O;ogkj dks iznf'kZr djrk gSAijUrq dHkh&dHkh dqN Input Group ,sls gksrs gSAtks dHkh Hkh mi;ksx ugh fd;s tkrs gSAbu ifjfLFkfr;ks es ,sls Input Group dks mi;ksx ugh djrs gSAo ;s ifjfLFkfr;kWa DONT CARE Condition dgykrh gSA DONT CARE C ondition dks ge K-Map es Dash ;k X(Cross) ds }kjk iznf'kZr djrs gSAo ;s ifjfLFkfr;k djrs gSAK-Map ds ,sls oxZ ftue dh X ;k – Dash dk fpUg~ yxkrs gSAmUgs DONT CARE SQUARE dgrs gSAvkSj tc dHkh Hkh ge oxksZ dks lewg es ,df=r djrs gSArc bu oxksZ ds eku dks ge vko';drk ds vuqlkj 0 ;k 1 ys ldrs gSADONT CARE Condition ds lkFk uhps fn;s x;s K-Map dks ge fuEu rjg ls Hkh iznf'kZr dj ldrs gSA



F(A,B,C,D)=Sm(0,2,3,6,7,12,13,14)+Sd(1,4,11,15) tgkWa d ls rkRi;Z DONT CARE Condition ls gSA

Åij fn;k x;k Expression SOP Expression gSADONT CARE Condition ds lkFk uhps fn, x;s POS ds lkFk K-Map dks ge fuEu rjg ls Hkh iznf'kZr dj ldrs gSA F(A,B,C,D)=pM(5,8,9,10)pd(1,4,11,15)



UNIT-3 Combinational & Sequential Circuits:- ftu ifjiFk es rkfdZd Gate gksrs gSAmUgs Logic Circuit dgrs gSAfdlh Hkh Boolean Function dk Logic Circuit cuk;k tk ldrk gSAfdlh Hkh Logic Circuit es cgqr ls Gate bl rjg tksM+s tkrs gS fd Input And Output es pkgs x, Relation izkIr fd, tk;s ;gh lac/k lR;rkfydk ls Hkh Kkr gksrk gSA rkfdZd ifjiFk nks izdkj ds gksrs gSA (1)Combinational Logic Circuit (2)Sequential Logic Circuit (1)Combinational Logic Circuit:- bl izdkj ds Logic Circuit es Current Output ,Current Input ij fuHkZj djrs gSA;s Output Circuit dh iqjkuh voLFkkvks ij fuHkZj ugh djrs gSAlHkh izdkj ds Gate Combinational gksrs gSAD;ksfd bues Input dks ns[krs ls gh Output crk;k tk ldrk gS nwljs mnkgj.kks es dqN fuEu gSAHalf Adder,Full Adder,Multiplexer , Demmultiplexer , Decoder,Encoder bR;kfnA

(2)Sequential Logic Circuit:-bl izdkj ds Logic Circuit es orZeku Output, ifjiFk dh iqjkuh fLFkfr rFkk orZeku Input nksuks ij fuHkZj djrs gSAmnk- Flip-Flop,Register And CounterASequential Circuit eq[;r%Flip-Flop rFkk Gate ds e/; Inter-Connection dk dk;Z djrk gSAGate eq[;r% Combinational Circuit gksrs gSAfdUrq tSls gh mUgs Flip-Flop ds



lkFk Connect fd;k tkrk gSArks ;g Complete Circuit Sequential Circuit es cny tkrk gSAbldk Diagram fuEu izdkj dk gSA

HALF ADDER:-;g ,d Bit Adder gS tks fd Binary ;ksx dks Calculate djrk gS vkSj bles X-OR Gate And AND Gate dk mi;ksx fd;k tkrk gSAvFkkZr~ Combinational Circuit og gS tks nks Bits dks tksM+us dk xf.krh; :i ls dk;Z djrk gS]Half Adder dgykrk gSAlh/ks 'kCnks es & “,slk Combinational Circuit tks nks Bits dk vadxf.krh; ;ksx iznku djrk gS, HALF Adder dgykrk gSA” fdlh Half Adder ds Block Diagram es ge Input rFkk Output dks Use djrs gSA;g nks Bits dks tksM+rk gS vr%blds Output Carray And Sum gksxsAfdUgh nks Bits dks tksM+us ij Output es Hkh 2 Bits izkIr gksrh gS ,d ;ksx dh rFkk nwljh gkfly dhAbldks ge Block Diagram And Truth Table ds ek/;e ls fuEu izdkj ls le> ldrs gSA

Logic Circuit Of Half Adder:-,d Half Adder dk Circuit Gate dh lkg;rk ls cuk;k tk ldrk gS vkSj Truth Table dks ns[kdj ge Gates dks vklkuh ls igpku ldrs gS vxj ge Truth Table dks ns[krs gS rks irk pyrk gS fd Carry es And AND Gate dk mi;ksx gks jgk gS vkSj Sum es X-OR Gate dk mi;ksx gks jgk gS bldk vxj ge fu:i.k djs rks ges fuEu rjg dk Block Diagram izkIr gksxkA



vxj ge bldk xf.kfr; fu:i.k djs rc ges Carry rks ,deepa :i es gh izkIr gksxk ysfdu Sum dks ge nks :i es izkIr dj ldrs gS ,d Sum Of Product vkSj nwljk Product Of Sum A Carry = A . B

FULL ADDER:-bles 3 Input gksrs gS ftldh enn ls ge 3 Bits dks ,deepa gh le; es tksM+ ldrs gS bles 2 Half Adder vkSj 1 OR Gate gksrk gS bles 3 Input Bits And Output 3 Bits gksrh gSA;fn nks Input 1 gSArks ;ksx 0 rFkk Carry 1 gksxhA vkSj ;fn rhuks Input 1 ds cjkcj gS rks Output es Hkh 1 Carry gksxkA vkSj ftldk ;ksx 1 gksxkAFull Adder dk Logic Circuit Truth Table ls Li"V gksrk gS fd ,d 3 Input okys X-OR Gate }kjk ;ksx izkIr gksrk gSAysfdu ,d AND Gate Carry iznku ugh dj ldrk gS D;ksfd A.B.C ds cjkcj ugh gS vr%bldh lR;rk lkj.kh ,ao Block Diagram And Logic Circuit dks ges le>uk gksxkA

FULL SUBTRACTOR:-Full Subtractor,Full Adder dh rjg gh gksrk gS tks fd 3 Binary Number’s dk ,d lkFk Process djrk gS flQZ varj ;g gksrk gS fd ;g ?kVkus dk dk;Z djrk gS bles 2 Half Subtractor vkSj 1 OR Gate dk iz;ksx gksrk gS bldk Block Diagram fuEu izdkj dk gksrk gSA



FLIP-FLOP:-lkekU;r%gj Digital System es Combinational Circuit ls gh dk;Z fd;k tkrk gS fdUrq dqN ,sls System Hkh gksrs gS tks Storge Element dk iz;ksx djrs gS vkSj blds fy, Sequential Circuit iz;ksx es vkrs gSAFlip-Flop ,d ,slk Logic Circuit gS tks 1 Bit dks laxzfgr djus dh {kerk j[krk gSA bldk Output fLFkj gksrk gS ftlds dksbZ Hkh nks eku 0 ;k 1 gks ldrs gSA ckgjh Input dh lkg;rk ls blds Output dks ifjofZrZr fd;k tk ldrk gSAbu ckgjh input dh la[;k o budk izHkko fdlh Flip-Flop ds izdkj ij fuHkZj djrk gS AlkeU;r% izR;sd Flip-Flop es nks Output Lines miyC/k gksrh gS vkSj ;g Lines ,d&nwljs dh Compliments gksrh gSA

og Storege Element tks Clocked Sequential Circuit es gksrs gS mls Flip-Flop dgrs gS ;k fQj Flip-Flop ,d ,slk Cell gS ftlds nks Output gksrs gSA,d lkekU; Value ds fy, vkSj nwljk mldh Compliment Value ds fy,A tSlk fd Åij fp= es cryk;k x;k gSAFlip-Flop ml le; rd gh Binary fLFkfr es jgrk gS tc rd fd Clock Pulse ifjofrZr gksus ds funsZ'k u nsosaAfdlh Hkh Flip-Flop dks le>us ds fy, muds fu;e ds vuqlkj oxhZd`r djuk gksxkA



CLOCK:-;g le; ds lkis{k Voltage dh oxkZdkj rjax gksrh gSA Clocked Flip-Flop:-bl izdkj ds Flip-Flop es Clock dk mi;ksx djds vko';d dk;Z le; iznku fd;k tkrk gSA ;fn Clock ds High Voltage okys fgLls ij dk;Z leiUu gksrk gSArks mls Positive Level Clock Flip-Flop dgrs gS vkSj ;fn Low Voltage ij dk;Z djrk gS rks bls Negative Level Clocked Flip-Flop dgrs gSA Unclocked Flip-Flop:-tc fdlh Flip-Flop es Clock dk mi;ksx ugh fd;k tkrk gSArks ;g Unclocked Flip-Flop dgykrk gSA Edge Triggered Flip-Flop:-;fn Clock dh c<+rh gqbZ ;k fxjrh gqbZ Edge ij dk;Z leiUu gksrk gS rks ,sls Flip-Flop dks Edge Triggered dgrs gS vkSj ;fn c<+rh Edge ij dk;Z Complete gksrk gS rks bls Positive Edge Triggered dgrs gSA vkSj ;fn fxjrh Edge ij dk;Z Complete gksrk gS rks mls ge Negative Edge Triggered dgrs gSA Type Of Flip-Flop:-fuEu izdkj ds Flip-Flop mi;ksx es vkrs gS (1)RS Flip-Flop (2)D Flip-Flop (3)JK Flip-Flop (4)Master Slave JK Flip-Flop (5)T Flip-Flop (1)RS Flip-Flop:-;g ,d Simplest Storege Device gS ftls NAND vkSj NOR Gate ds }kjk mi;ksx djds cuk;k tkrk gSAbl izdkj ds Flip-Flop es nks External Input gksrs gS ftles R vkSj S dks mi;ksx es yk;k tkrk gSA;gkWa R=Reset And S=Set dks n'kkZrk gS ;k fQj R dks ge Race ds }kjk Hkh igpku ldrs gSARS Flip-Flop ewyHkwr Flip-Flop gS D;ksfd ckdh blds lkjs Flip-Flop blh dh lkg;rk ls cuk;s tk ldrs gSA RS Flip-Flop dks ge rhu rjhdks ls vklkuh ls cuk ldrs gSA (1)Transistors dh lkg;rk ls (2)NOR Gate dh lkg;rk ls (3)NAND Gate dh lkg;rk ls bldk ges fo'kys"k.k djus ij fuEu izdkj dk Chart Create dj ldrs gSA

Transistor dh lkg;rk ls RS Flip-Flop cukuk:- ,d RS Flip-Flop dks nks Transistor T1 rFkk T2 dh lkg;rk ls bl izdkj cuk;k tk ldrk gSA



tSls gh mijksDr Circuit es Electric nh tkrh gS rks Lor% ,d Transistor larIr voLFkk es rFkk ,d dV&vkWQ es pyk tkrk gSAtSls ;fn T1 larIr voLFkk es pyk tkrk gS rks bldk Output fuEu Voltage izkIr gksrk gS ;g fuEu Voltage Transistor T2 ds vk/kkj ij tkrk gSA vkSj ;g Transistor dV&vkWQ es pyk tkrk gSAvr%bldk Output High Voltage gksxkAblds foifjr T2 larIr voLFkk es gksxkArks T1 dV&vkWQ es pyk tk;sxkAvr% mijksDr ifjiFk es nksuks Output ,d nwljs ds foifjr gksxsA bUgs Q And

}kjk n'kkZ;k tkrk gSAvc ;fn External Input R And S Enter fd;s tk;s rks rc ges fuEu izdkj ds Output izkIr gksxs%& R=0 Or S=0 :-nksuks Input ij 'kwU; nsus ls dksbZ izHkko ugh i<+sxkAvr%Output Q viuh iqjkuh voLFkk es jgsxkA R=0 Or S=1 :-S=1iznku djus ls Transistor T1 larIr voLFkk es pyk tkrk gS rFkk blds fy;s Collector ij fuEu Voltage ds :i es Output izkIr gksrk gSA;gh Voltage T2 ds csl ij tkdj bls dV&vkWQ es yk nsrk gS]vr%Q=1 izkIr gksrk gS bls SET Condition dgrs gSA R=1 Or S=0 :-tSls gh R=1 iznku fd;k tkrk gS T2 larIr voLFkk es pyk tkrk gSAvr%Q=0 izkIr gksxkAbls RESET Condition dgrs gSA R=1 Or S=1 :-tSls gh nksuks ij 1 iznku fd;k tkrk gS og larIr voLFkk es pys tkrs gS tSls gh R And S dks gVk fy;k tkrk gS nksuks gh Transistor dV&vWkQ es vkus dh dksf'k'k djrs gSAysfdu dksbZ Hkh ,d dV&vkWQ es vk tkrk gS vkSj nwljk larIr voLFkk es jg tkrk gS vr%Q dk eku D;k gksxkA bldk iwokZuqeku ugh yxk;k tk ldrk gS blhfy, bl izdkj dh fLFkfr ij dke ugh djuk pkfg;s pwWfd nkuks Transistor es dV&vkWQ es vkus ds fy;s Race gksrh gS bl fLFkfr dks Racing dgrs gSAmijksDr pkjks Condition dks ge Truth Table es fuEu izdkj ls n'kkZ ldrs gSA



RS Flip-Flop Using NOR Gates (NOR Latch):- (NOR Gates ls RS-Flip-Flop) nks NOR Gates dh Help ls NOR Latch dks bl izdkj cuk;k tk ldrk gSA

R=0 And S=0 iznku djus ls Output Q ij dksbZ izHkko ugh iM+rk gSAysfdu R=1 And S=1 iznku djus ls nksuks Output Low voltage ij gks tkrs gS;g Racing Condition gSAblds vykok ;fn S=1 And R=0 nsrs gS rks Q Set gks tkrk gS vr%Q=1 izkIr gksrk gS ysfdu S=0 And R=1 nsus ls Reset dh fLFkfr izkIr gksrh gAvr%NOR Latch dh Truth Table bl izdkj cukbZ tkrh gSA

RS Flip-Flop Using NAND Gates(NAND Latch):- bldk Circuit fcYdqy NOR Latch ds leku gh gSA



ysfdu tSls gh R=0 And S=0 iznku djrs gS]rks nksuks Transistors ds Output High gks tkrs gSA;gh Racing gSAD;ksfd ;g vfLFkj voLFkk gSAR=1 And S=1 nsus ls Q ij dksbZ izHkko ugh iM+rk gS]vr%NAND Latch dh Truth Table bl izdkj ls cukbZ tkrh gSA

LEVEL CLOCKED RS Flip-Flop:-bl izdkj ds Flip-Flop es Clock dk mi;ksx djds vko';d le; varjky r; fd;k tkrk gSA NAND Latch ds igys nks vfrfjDr NAND Gate dks tksM+dj bldk Circuit bl izdkj ls cuk;k tk ldrk gSAbldk Block Diagram bl izdkj ls cuk;k tk ldrk gSA

tSls gh Clock dl Level Low gksxk]nksuks ckWa, NAND Gate ds Output 1 gksxsAvr%NAND Latch dh fLFkfr es dksbZ ifjorZu ugh vk;sxkAR And S dk izHkko rHkh gksxk]tc Clock dk Level High Voltage ij gksAbldh Truth table bl izdkj cukbZ tk ldrh gSA



Negative Level Clocked RS Flip-Flop:-NAND Gates ds Common Input ds Bhd igys NOT Gate yxkus ls mijksDr Flip-Flop Negative Clock Pulse ij dk;Z djsxkAClock ds High Value ij ;g dksbZ dk;Z ugh djsxkAbldk Circuit,Symbol And Truth Table bl izdkj ls cukbZ tkrh gSA

Positive Edge Triggered Flip-Flop :-Clock Input ds Bhd iwoZ es RC Differentiator Circuit yxkdj Edge Triggered Flip-Flop izkir fd;k tk ldrk gS D;ksfd tc Low Or High Clock gksrh gS rks bldk Differentiator “0” gksxkAlkFk gh Differentiator dk Circuit c<+rh gqbZ Edge ij Voltage dh Positive Spike nsrk gSAo uhps vkrh gqbZ Edge ij Negative Spike nsrk gSAvr%ge ;g dg ldrs gS fd Clock dh flQZ c<+rh gqbZ Edge ij gh dk;Z djsxkAbles (0,1,¯)ij dksbZ ifjorZu izkIr ugh gksxkAflQZ c<+rh gqbZ Edge () ij R And S ds fofHkUu ekuks ij Q izHkkfor gksxkAEdge Triggered RS Flip-Flop dk Symbol ,ao Truth Table ,ao Logic Circuit fuEu gSA

Negative Edge Triggered RS Flip-Flop:- RC Differentiator ds iwoZ NOT Gate yxk nsus ls Flip-Flop flQZ uhps vkrh gqbZ Edge ij dk;Z djsxkA vFkkZr NOT Gate bls c<+rh gqbZ Edge es cnydj NAND Gate dks nsxkAvFkkZr ;f Flip-Flop 0,1, ij dk;Z ugh djsxkAbldk Symbol,Logic Circuit,Truth Table fuEu izdkj dh gSA



RS Flip-Flop ds voxq.k:-(1)Racing Condition u vk;s bldk /;ku j[ksA (2)nks&nks External Inputs ls Flip-Flop ds dk;Z dks Complete djok;k tkrk gSA (2)D Flip-Flop:-;g ,d gh Input okyk Flip-Flop gksrk gS]blds Logic Circuit dks RS Flip-Flop ds Logic Circuit ls bl izdkj izkIr dj ldrs gSA (1)D Input dks S ls tksM+ nksA (2)D dks NOT Gate yxkdj R ls tksM+ nkSA fofHkUu izdkj ds D Flip-Flop bl izdkj gSA

UNCLOCKED D-Latch Using NAND Gate:-

ADVANTAGE:-tks Hkh Input D ij iznku fd;k tkrk gS ogh Output Q ij fey tkrk gSAbles dksbZ Racing ugh gksrh gSA DISADVANTAGE:-bles dksbZ fu;=a.k Signal ugh gSA UNCLOCKED D-Latch Using NOR Gates:-



LEVEL CLOCKED D-Flip-Flop:-

vc tc D=0 gksxk rks S=0 o R=1 Q dks Reset dj nsxsAvFkkZr Q=0 feysxk ysfdu tc D=1 gksxkA rks S=1,R=0,Q dks Set dj nsxsAvr%Q=1 izkIr gksxkAysfdu ,slk rHkh gksxk]tc CLK=1 gks]D;ksfd CLK ds 0 gksus ij dksbZ ifjorZu izkIr ugh gksxkA POSITIVE EDGE Triggered D-Flip-Flop:-RC Diffrentiator Circuit dk mi;ksx djus ls Edge Triggered D Flip-Flop dk Circuit izkIr gksrk gS

mijksDr ifjiFk ls Li"V gS fd Q dk eku Clock dh rhu voLFkkvks(0,1¯) ij ifjofrZr ugh gksxkA tc Clock dh c<+rh gqbZ Edge() vk,xh rks tks Input D ij vk,xk ogh Q ij igqWpsxkA Negative Edge Triggered D-Flip-Flop:- RC Diffrentiator Circuit ds Bhd igys ,d NOT gate yxkus ls uhps vkrh gqbZ Edge (¯) ij dk;Z djus okyk D Flip-Flop cuk;k tk ldrk gSaaAbles (0,1,)ij dksbZ dk;Z ugh gksxkAD ij tks Hkh Input vk;sxk Clock dh uhps vkrh gqbZ Edge ij og Output Q ij igqWap tk;sxkAbldk Symbol,Logic Circuit,Truth Table fuEu izdkj dh gSA



Advantage Of D Flip-Flop:- (1) bles dksbZ Racing ugh gksrh gSA (2)flQZ ,d Input D ls gh fdlh Flip-Flop dks vko';drkuqlkj Set Or Reset fd;k tk ldrk gSA (3);g ,d fcV dks LVksj djus okyh Unit gSA ftlls Register cuk;s tk ldrs gSA (3)JK Flip-Flop:-bl izdkj ds Flip-Flop es nks Input J And K gksrs gSAJ Set dk rFkk K Reset dk dk;Z djrk gSA;g Feedback Connection dk mi;ksx djrk gSAblls rkRi;Z ;g gS fd Output dks Inputs ls tksM+k tkrk gSAfuEu izdkj ds JK Flip-Flop dk Use fd;k tkrk gSA (1)Level-Clocked Jk Flip-Flop (2)Edge triggered Flip-Flop (3)Master Slave JK Flip-Flop Level Clocked JK Flip-Flop:-bls Level Clocked Rs Flip-Flop ds Circuit ls cuk ldrs

gSA ckWa;h vkSj rhu Input okys NAND Gate ysdj Åijh Gate dks ls rFkk fupys xsV dks Q ls tksM+rs gSA bldk lEiw.kZ ifjiFk bl izdkj ls cusxkA

tc Hkh CLK=0 gksrk gS] tks nksuks NAND Gates ds Output ij 1 izkIr gksrk gSAvr%R=S=1 feyus ds dkj.k Q iqjkuh voLFkk es jgsxkAtc CLK=1 gksxk]rks nksuks

NAND Gates ds Output J,K,Q rFkk ij fuHkZj djsxsAvr%J And K ds pkj ekuks ds fy;s bl izdkj ls Output izkIr gksxsA CASE : J=0 And K=0 -> nksusks R=S=1 gksxsAQ iqjkuk voLFkk es jgsxkA CASE : J=0 And K=1 -> J=0 nsus ls R=1 gks tk;sxkAysfdu S dk eku Q ij fuHkZj djsxkA;fn igys Q=0 gks rks S=1 gks tk;sxkAvr%(R=S=1)voLFkk gksus ls dksbZ Hkh ifjorZu izkIr ugh gksxkAvr%Q=0 feysxkAysfdu ;fn igys Q=1 gqvk rks S=0 gks tk;sxkAvr%



(S=0And R=1)vFkkZr Reset Codition izkIr gksxhAblfy, Q=0 gks tk;sxkAvr%iwoZ voLFkk dqN Hkh gks ubZ voLFkk Q=1 gksxhA

CASE : J=1 And K=0 ->K=0 nsus ls S=1 izkIr gksxkAysfdu R dk eku ij fuHkZj

djsxkA;fn iwoZ es =0 gks rks R=1 feysxkAvr%(S=1 And R=1)feyus ls Q=1 feysxkA;fn

iwoZ es =1 gksus ls R=0 feysxkAvr% (S=1 And R=0) Set Condition Q=1 feysxhAvr% nksuks gh Conditon es Q=1 gh izkIr gksxkA CASE : J=1 And K=1 ->,slh Condition es R And S ds eku dze'k%J And K ij fuHkZj djsxsAvxj iwoZ es Q=0 gqvk rk vxyh voLFkk Q=1 izkIr gksxhA vxj iwoZ es Q=1 gks rks vxyh voLFkk Q=0 izkIr gksxhAbl Condition dks Toggle Condition dgrs gSALevel Clocked JK Flip-Flop dk Symbol And Truth Table bl izdkj ls cukbZ tk ldrh gSA

Race Around Problem :-;g leL;k Level Clocked JK Flip-Flop es gksrh gSAtc ;g Toggle Mode es gksrk gS]rc Clk=1 feyrs gh bldk Output Q ifjofrZr gks tkrk gSA;fn Pulse dh pkSM+kbZ izksisxs'ku fMys ls vf/kd gS rks Output ,d ls T;knk ckj Toggle gks ldrk gSA,slh Condition es Output dk lgh&lgh eku irk ugh yxrk gSA,d Level Clocked JK Flip-Flop dk ,d gh Pulse es ,d ls T;knk ckj Toggle gksys ds leL;k dks Race Around Problem dgrs gSA Race Around Problem dks nwj djuk :-;g leL;k iYl dh pkSM+kbZ ds izksisxs'ku fMys ls vf/kd gksus ds dkj.k gksrh gS ;fn iYl dh pkSM+kbZ dks de fd;k tk;s rks Clock dh Frequency c<+ tkrh gSAysfdu gj Circuit es vf/kdre Frequency dh lhek gksrh gSAvr%iYl dh pkSM+kbZ dks de djds Race Around Problem dks nwj ugh fd;k tkrk gSABasically bls nwj djus dh nks Method gksrh gSA (1)Edge Triggered JK (2)Master Slave JK fdlh Edge Triggered JK Flip-Flop es Output flQZ c<+rh gqbZ ;k fxjrh gqbZ Edge ij gh Toggle dj ldrk gSAbl Edge ij Gate ij ,d vr;Ur de le; vUrjky dhs Voltage Spike feyrh gSAbrus de le; es Output ,d ls T;knk ckj Toggle ugh dj ldrk gSAvr%Race Around Problem nwj gks tkrh gSA Master Slave JK Flip-Flop es nks izdkj ds JK Flip-Flop gksrs gSAftUgs Master And Slave dgrs gSAtks dk;Z Master }kjk Clock ds ,d fgLls es fd;k tkrk gSAogh dk;Z Slave }kjk Clock ds nwljs fgLls es fd;k tkrk gSAnksuks dHkh ,d lkFk Toggle ugh djrs gSAvr%Race Around Problem nwj gks tkrh gSA POSITIVE EDGE TRIGGERED JK FLIP-FLOP:-,d Edge Triggered JK dks ,d Level Clocked JK ds Circuit es RC vodyu ifjiFk yxkdj cuk;k tk ldrk gSA,d vodyu ifjiFk dsoy c<+rh gqbZ Edge ij Positive Voltage Spike iznku djrk gSAvr% c<+rh gqbZ Edge ij gh vodyu ifjiFk ,d FkksM+h ls nsj ds fy, 1 nsrk gSAvr% bl izdkj



dk Flip-Flop ,Clock ds rhu fgLlks (0,1,¯) ij dksbZ dk;Z ugh djrk gSAbldk Symbol,Truth Table And Logic Circuit fuEu gSA

NEGATIVE EDGE TRIGGERED JK FLIP-FLOP:-RC Differentiator Circuit ds Bhd iwoZ es NOT Gate yxk nsus ls _.kkRed edge Triggered JK Flip-Flop izkIr gksrk gSAvc Clock dh uhps vkrh gqbZ Edge ij gh Flip-Flop dksbZ dk;Z leiUu djsxkAD;ksfd NOT Gate bl Edge dks c<+rh gqbZ es Convert djds Differentiator Circuit dks nsxkA;g Differentiator Circuit Positive Spike NAND Gate dks nsxkAblls FkksM+h nsj gsrq NAND Gate ij 1 izkIr gksxkAblds Symbol dks Clock Input ij ,d NksVk o`Rr yxkdj cuk ldrs gSATruth Table es ¯ ds LFkku ij cukdj izkIr dj ldrs gSA bldk Symbol,Logic Circuit And Truth Table fuEu izdkj dh gSA

MASTER-SLAVE JK FLIP-FLOP:-;g nks JK Flip-Flop dk la;kstu gksrk gSAbues ,d Master rFkk ,d Slave dgykrk gSAtks dk;Z Master djrk gS]Slave mldh udy djrk gSAnks izdkj ls Master-Slave JK Flip-Flop dks Create fd;k tk ldrk gSA (1)Level Clocked Master-Slave JK Flip-Flop (2)Edge Triggered Master-Slave JK Flip-Flop (1)LEVEL CLOCKED MASTER-SLAVE JK FLIP-FLOP:-;g fuEukuqlkj nks Level Clocked JK Flip-Flop dk Connection gksrk gSA



High Voltage ij Master dj;Z djrk gSArFkk Low Voltage ij Slave dk;Z djrk gSAbldk Logic Circuit bl izdkj ls cuk;k tkrk gSA

pwWafd tks Slave dk Output gksrk gS ogh Last output gksrk gSAvr%mijksDr Circuit dks ge Negative Level Clocked dg ldrs gSAtc CLK=1 gksxk]rc Master viuh voLFkk ifjofrZr dj ldrk gSAbl le; Slave dqN ugh djsxkAysfdu tc CLK=0 gksxk]rc Slave ogh dk;Z djsxk]tks iwoZ es Master us fd;k FkkAbl le; Master dqN ugh djsxkAvr%,d gh iYl es ,d ls vf/kd ckj Output es ifjorZu ugh vk ldrk gSAvr% Race Around Problem nwj gks tk;sxhAmijksDr Master-Slave JK Flip-Flop dk Symbol And truth Table bl izdkj cuk ldrs gSA



EDGE TRIGGERED MASTER-SLAVE JK FLIP-FLOP:-;g nks Egde Triggered JK Flip-Flop dk Group gSA

;gkWz ij Master Positive Edge Triggered gS o SlaveNegative Edge Triggered gSAblfy, Master Positive Edge ij Toggle djsxk rFkk Slave Negative Edge ij toggle djsxkAtks ,D'ku Master Positive Edge ij djsxk]ogh Slave Negative Edge ij djsxkAvr%vafre Output Negative Edge ij gh feysxkAblfy;s bl rjg dh cukcV dks Negative Edge Triggered Master-Slave dg ldrs gSA bldk ladsr bl izdkj ls cuk;k tk ldrk gSA

bldh Truth Table fcYdqy Negative Edge Triggered JK Flip-Flop ds leku gh gksrh gSAbldk Logic Circuit es nks RC Diffrentiator Circuit dk mi;ksx djds cuk;k tkrk gSA ADVANTAGE OF JK FLIP-FLOP:- (1) dksbZ Racing ugh gksrh gSA (2)Toggle Condition dk mi;ksx Counter cukus es djrs gSA (3)Master-Slave And Edge Triggered es Race Around Problem ugh gksrh gSA



(4)T FLIP-FLOP:-fuEu ifjiFk dks ns[kks ftles Edge Triggered JK Flip-Flop ds nksuks Inputs J And K dks Common djds ,d gh Input T fn;k x;k gSAvr%mijksDr Flip-Flop ds nks gh Input T rFkk Clock gS bldk ladsr bl izdkj cuk;k tk ldrk gSA

bl Flip-Flop dks gh T Flip-Flop dgrs gSA;g bl izdkj ls dk;Z djrk gSA tc T=0 (J=0 And K=0) Output viuh iqjkuh voLFkk es jgsxkA tc T=1 (J=1 And K=1) gksrk gSArks gj Clock ds ckn voLFkk ifjofrZr gksxh (Toggle Condition)A bldh Truth Table bl izdkj ls cukbZ tkrh gSA

MULTIPLEXER:-Multiplexer ,d ,slk Combinational Logic Circuit gksrk gSAftles vusd Input vkSj ,d output gksrk gSAlkFk gh dqN Control Signal gksrs gSAdksbZ ,d Input dks pqudj Output dks Hkstk tkrk gSAInput dk Selection Control Signals ds ekuks ls fd;k tkrk gSA Block Diagram:- ekuk fd Input I0,I1,I2 vkfn gSA,ao Control Signals A,B,C vkfn gSArFkk Output F gSA MUX Stands For Multiplexer.



;gkW ij I0 ;k I1 vkfn es ls dksbZ ,d Input ls fdlh ,d dk Selection A,B,C vkfn ds eku ds }kjk fd;k tkrk gSA vc 2:1 Mux dk Example ysrs gSAbles I0 rFkk I1 nks Input gksxs rFkk F ,d Output gksxkAControl Signals dh la[;k bl izdkj fudkysxsA Number of Inputs = 2 = 21 dh ?kkr]Control Signal dh la[;k crkrh gSAvr%2:1 MUX es flQZ ,d A gksxkAblds Block Diagram dks bl izdkj cuk ldrs gSA

vc ftrus Input gks]mrus AND Gate cukvksAijUrq ,d gh OR Gate cukvksAizR;sd AND Gate dks ,d Input ls tksM+ksAAND Gates ds Output dks OR Gate dk Output gh Multiplexer dk Output gksrk gSA2:1 Multiplexer dk Logic Circuit bl izdkj cuk;k tk ldrk gSA

Note:- ,d Control Signals gsrq nks Line cukbZ x;h gSAA rFkk tks AND Gate ds

lkeus gS]mls ls rFkk tks 1 ds lkeus gS]mls A ls tksM+rs gSAOutput F dk Formula bl izdkj vk;sxkA



ysfdu tc A=0 rc F= vkSj tc A=1 rc F= vk;sxkAvr%A dk eku 0 ;k 1 djds ;k pquk tk ldrk gSAblh ckr dks ge Truth Table ls le> ldrs gSA

vc 4X1 Multiplexer dks yks bldk Block Diagram And Turth Table fuEu izdkj ls Create gksxhA

bl Circuit es Output F dk Formula fuEu rjg ls Kkr fd;k tk ldrk gSA

DEMULTIPLEXER:-Demultiplexer ,d ,slk Combinational Logic Circuit gksrk gSAftles flQZ ,d Input vkSj vusd output gksrs gSAlkFk gh dqN Control Signal gksrs gSAdksbZ ,d Input dks pqudj Output dks Hkstk tkrk gSAbl Output dk Selection Control Signals ds ekuks ls fd;k tkrk gSA Block Diagram:- ekuk fd Input I ekus]fofHkUu Output dks F0,F1,F2 vkfn ekus ,ao Control Signals A,B,C bR;kfn gSArc Demultiplexer dks fuEu izdkj ls Design fd;k tk ldrk gSA DEMUX Stands For Demultiplexer.

Input fdlh ,d Output Line F0,F1,F2 bR;kfn ij vkrk gS bues ls fdlh ,d Output dk Selection A,B,C bR;kfn Control Signals ds ekuks ds }kjk fd;k tkrk gSA



Vc ge 1:2 Demultiplexer dks le>rs gS bles 1 Input Or 2 Output gksxsAControl Signals dh la[;k bl izdkj ls fudkyh tk ldrh gSA Number Of Output = 2 = 21(One Signal) vr%nks dh ?kkr ls Control Signals dh Number dk irk pyrk gSA1:2 Demux dk Block Diagram bl izdkj ls Draw fd;k tk ldrk gSA

Demultiplexer ds Logic Circuit dks bl izdkj cuk;k tk ldrk gSA 1.ftrus Output gksxs mrus gh AND Gate gksxsAizR;sd ,d Gate ls ,d Output izkIr gksxkA 2.izR;sd AND Gate ds Input ij I dks tksM+rs gSA 3.,d Control Signals ds fy;s nks yacc~r Lines Draw dh tkrh gSAvFkkZr ,d Normal And Second Bar.vr%izR;sd Control Signals gsrq ,d NOT Gate dh vko';drk gksrh gSA 4.tks AND Gate 0 ds lkis{k gksrk gS mls Compliment ls tksM+rs gSArFkk vxk I ds lki{k gksrk gS rks lh/ks Control Signal A ls tksM+rs gSA LOGIC CIRCUIT AND TRUTH TABLE OF 1:2 DEMULTIPLEXER:-

LOGIC CIRCUIT FOR 1:4 DEMULTIPLEXER:- Control Signal=4=22=2 Input=1 Output=4

DECODER:- Decoder ,d ,slk Combinational Logic Circuit gksrk gSAftles dqN Input vkSj vusd Output gksrs gSAOutput es ls fdlh ,d Output ij (1 Or 0) gksrk gSAbl Output Lines dks Input ij pkgh xbZ la[;k nsdj pqurs gSA



Block Diagram:-Block Diagram Inputs dks A,B,C vkfn ls rFkk Outputs dks F0,F1,F2

vkfn ls n'kkZ ldrs gSA

vr%mijksDr Block Diagram ls Li"V gS fd ;fn Multiplexer dk Input I gVk fy;k tk;s rks ;g Decoder gks tkrk gSAblh ckr dks /;ku es j[kdj 1:4 Demultiplexer dks 2:4 Decoder es cnyk tkrk gSAblds fy;s flQZ I okyh js[kk dks gVkuk gksxkA

To 4 Decoder dh Truth Table bl izdkj cukbZ tkrh gSAbles lkjs Input Or Output dks n'kkZrs gSA A B F0 F1 F2 F3 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0 0 1 0 1 1 0 0 0 1

3 To 8 Decoder :-



ENCODER:- Encoder ,d ,slk Combinational Logic Circuit gksrk gSAftles vusd Input vkSj dqN gh Output gksrs gSA Block Diagram:-Inputs dks I0,I1,I2 vkfn ls n'kkZ ldrs gSArFkk Output dks A,B,C vkfn ls n'kkZ;k tkrk gSA ,d le; es ,d gh Input ij 1 Hkstk tkrk gSAftl Input ij 1 Hkstk mldh la[;k ds vuqlkj Outputs ij ,d Binary Number izkIr gksrh gSAbl Circuit ls ge fdlh vU; i)fr dh la[;k ls Binary izkIr dj ldrs gSAvr% fuEu izdkj ds Encoder mi;ksx es vkrs gSA 1.Octal To Binary Encoder 2.Decimal to Binary(BCD)Encoder 3.Hexadecimal To Binary Encoder 1.Octal To Binary Encoder:-bles 8 Inputs 1.Octal To Binary Encoder:-Octal To binary Encoder es 8 Input gksrs gSA tks fd 0 To 7 rd iznf'kZr gksrs gSAfdlh Hkh vad dk Binary 3 Bit es izkIr fd;k tk ldrk gSAvr% 3 Input Lines gksxh bldk Block Diagram fuEu izdkj dk gSA



mijksDr leL;k es Input 8 dks Binary Number es rksM+dj mlh la[;k ds vk/kkj ij ge Encoder Design djsxsALast es ges rhu gh Output izkIr gksxsAvkSj izR;ds Input ij ,d Switch dks Open djuk gksxkA

2.Decimal To Binary BCD Encoder:-bl Circuit dks ge oSls gh Draw dj ldrs gS tSls Octal To Binary Encoder dks cuk;k tkrk gSAbles 10 input gksxs tks Decimal Number 0 To 9 dks n'kkZ,xsAFour Output Lines ij fdl;h ,d vad dk Binary Number iakIr fd;k tk ldrk gSAblds Logic Circuit es 10 Switches rFkk 4 gate yxsxsAtc fdlh Hkh ,d Switch dks Process djsxs rks ml Switch ds Decimal ds lkis{k ,d Four Bits dh la[;k izkIr gksxhAblh dks ge Decimal Number dk BCD Code Hkh eku ldrs gSAbldk Circuit fcYdqy Octal To Binary Encoder ds leku gksxkA,ao bldk Block Diagram fuEu gSA

3.Hexa Decimal To Binary Encoder:-bles 16 Input gksrs gS tks fd hexadecimal Number dks crkrs gSArFkk 4 Output gksrs gS ftl ij fdlh ,d Hexadecimal Number dk binary izkIr djrs gS bldk logic Circuit Hkh Octal to binary Encoder ds leku gh gksxkAbles 16 Switch gksxs ftu ij 0 To F rd Number fy[ks gksxsApkj OR Gate ij Binary Output izkIr fd;k tk;sxkA



fy[kuk gSA IDEA ABOUT AIRTHMETIC CIRCUIT:-Register es Store fd;s x;s Data ij Micro Opreation fd;s tkrs gSA tks pkj izdkj ds gksrs gSA 1)Register,Micro Operation Register es Store dh xbZ information dks ,d&nwljs es Transfer djrk gSA 2)Airthmetic Micro Opreation Register es Store fd;s x;s Number Or Data ls dbZ izdkj ds Airthmetic Operation dks Complete djrs gSA 3)Logic micro operation es Store non-Numeric data ds lkFk tqM+dj dbZ izdkj ds Combinational Or Result nsrs gSA 4)Airthmetic Circuit Shift Register es Operation djus ds lkFk&lkFk nd&nwljs ds Data dks Shift Hkh djrk gSA PROGRAM CONTROL:-Program Control Instruction ges'kk Successive Memory es jgrs gSAtc data dks CPU es Proceed fd;k tkrk gSArks ;g funsZ'k mlh Memory ls vkrs gS vkSj muds vuqlkj Data dk Processing Work gksrk gS gj ckj Memory es Instruction Input fd;s tkrs gS ,ao CPU dks Series Wise bu lHkh Input dks Complete djuk gksark gSA;g laHko gksrk gS fd Program dks Control djus okys instruction dh tc Processing gksrh gS rks mlds ifj.kkeLo:i og vius Address Value es Changes dj ldrs gSAvkSj lkFk gh lkFk Processing dh fn'kk Hkh cny ldrh gSADigital Computer dk ,d fo'ks"k xq.k ;g gS fd mldk Program Flow ij fuHkZj ugh djrk gSAvkSj ;g {kerk Hkh jgrh gS fd og Branching ds }kjk ,d Program dks can dj rRdky nwljk Program izkajHk dj nsrk gSA Program dks Control djus okyh Information dqN fuEu gSA JUMP = JMP SKIP = SKP CALL = CALL RETURN = RET COMPRAE = COM BRANCH = BR Instruction Sequencing:-tc rd fd nh xbZ Condition iwjh ugh gksrh gS rc rd Control djus okys Counter es 1-1 dh Increment gksrk jgrk gS vkSj Processing ds fy;s ,d ds ckn ,d Instruction izkIr gksrs jgrs gSAtks fd Series Wise gksrs gSAfdUrq tSls gh Condition Complete gksrh gS rks Counter dk Effect vius vki lekIr gks tkrk gSA



UNIT-4 INPUT/OUTPUT INTERFACE:-Input Or Output Device Human Or Computer ds e/; Interface LFkkfir djus dh lqfo/kk iznku djrs gS Input Device ekuoh; Hkk"kk es fn;s x;s Data Or Program dks le>us ds ;ksX; cukrh gSA;g Device Letters,Numbers,Others Symbol dk 0 Or 1 Bit es Translate djrh gSAftUgs Computer le> ldrk gSAvkSj gekjs }kjk iznku dh xbZ Data dh Process laHko gks tkrh gSA nwljh vkSj Output Device 0 Or 1 Bit ds Symbol dks Translate dk Human ds le>us ;ksX; Hkk"kk es ifjofrZr dj izLrqr djrs gSA;g Device Output dks Screen ij ;k Printer }kjk dkxt ij Nkidj izLrqr djrh gSAInput Or Output Device izk;%Computer ds Direct Control es jgrs gSA Input Output Information Data ds Internal And External unit ds e/; Work djrs gSA ;g CPU ls fo'ks"k izdkj ls lacf/kr jgrs gSAvkSj ;g Device Electromachenical Or Electromegnetic gksrs gSAvkSj buds dk;Z CPU rFkk Memory Storege ls loZFkk vyzx gksrs gSA tks Electronic Device mu Interface es Data Storege Or Data Recive djus dh xfr CPU dh rqyuk es de gksrh gSAInput And Output Interface gekjs Input Or Outpua ds dk;ksZ dks Control djus ds fy;s gksrk gSAbles Operating System dk egRroiw.kZ ;ksxnku jgrk gSAD;ksfd ge tkurs gS fd fdlh Hkh Input And Output dk lapkyu]Memory ;k dksbZ Hkh hardware dk lapkyu Operating System gh djrk gSAblfy;s Digital Computer es ges Operating Ststem dks /;ku es j[kdj dk;Z djuk gksrs gSA PROPERTIES OF SIMPLE INPUT/OUTPUT DEVICE:-fdlh Hkh dk;Z dks Control djus ds fy;s Computer es dqN Hardware Component gksrs gS tks Input And Output okyh lHkh Data dk fujh{k.k o mudk leqfpr mi;ksx djrs gS bUgh Components dks ge Interface unit dgrs gSAD;ksfd ;g Proceesor,Busses rFkk Peripheral Device ds e/; dk;Zjr~ jgrs gSAbues izR;sd Device dk ,d Controller Hkh jgrk gS tSls Printer Controller,Paper Speed,Printing Time,Printing fd;s tkus okys v{kj bR;kfn dks Control djrk gS gk Interface es Decoder ds gksrs gS tks Adress Line dks ns[krs gSA tSls gh dksbZ Interface viuk Adress Decoder ds }kjk irk djrk gSAoSls gh og System Bus ds }kjk ml Device dk Path fufeZr dj nsrs gSAInterface bu Codes dks Decode es Changes dj viuk dk;Z djrs gSADecodes dks ge Function Code ds uke ls tkurs gSAD;ksfd dqN Decode dqN fo'ks"k dk;ksZ ds fy;s gh fufeZr gksrs gSA



Input/output Controller:-Input/output Controller dbZ izdkj ds gksrs gS tSls Input ds fy;s Input Controller,Output ds fy;s Output Controller vkSj System ds fy;s System Controller Etc. tSlk fd ge tkurs gS fd dksbZ Hkh Input/Output ;k ,d Decode gksrk gS vkSj ,l Decode ds }kjk gh ge viuk Result izkIr ;k Print dj ldrs gS Mother Board , Computer dk iwjk Electronic Circuit Fiber Glass ds ,d Board ij cuk jgrk gS ftl ij vusd IC Chip yxh jgrh gS ;g vyx&vyx izdkj dk dk;Z djrh gS vSj blesa dbZ Card yxs jgrs gSa A Mother Board esa IDE(Integration Drive Electric Card ) Hkh yxk jgrk gS tks Floppy Disk o Hard Disk dks Control djrk gSA Mother Board esa Rom Chip Hkh yxs jgrs gSa ftuesa LFkk;h izdfr dh Memory Hkh yxh jgrh gS A ;g Command vkSj Program CPU dh xfrfof/k;ksa dks Control djrk gS A Mother Board esa ,d Speaker Hkh yxk jgrk gS A ftlesas CPU Sound ds :i esa viuk Output nsrk gS A System Cabinate esa Key-board dks Control djus okyk Port Hkh gksrk gSA Isolated Verus Memory-mapped I/O:- vusd Computer esa ,d gh Comman Bus dk mi;ksx fd;k Input/Output rFkk Memoru Unit ds fy, djrs gSa A nksuksa esa flQZ ;g varj gS gksrk gS fd Memory Unit esa flQZ Read Write Lines tksM+ nh tkrh gS tcfd Input/Output esa ugha A CPU ;g Li"V dj nsrk gS fd 'kCn dk Address fdlds fy, gS vFkkZr Memory ds fy, ;k Input/Output ds fy,A Isolated Input/Output ds fy, CPU esa Input/Output ds ladsr jgrs gSa A ;g ladsr Interface ls lac/k j[krs gS vr%;g irk py tkrk gS Data fdlds fy;s Hkstk tk jgk gSAIsolated Method Memory And Input/Output nksuks dks vyx&vyx dj nsrh gS ftlls ,d&nwljs ds dk;ksZ es ck/k mriUu u gksA Memory Mapped input/Output es vyx ls dksbZ ladsr ugh gksrs gS ;g dk;Z rks CPU djrk gS gj Interface ,d Register dk Set gksrk gSA vkSj ;g Set ;g irk djrk gS fd Data dks dgkWa tkuk gS vFkkZr Memory esa ;k Input/Output esa A MODES OF DATA TRANSFER:- ,d dEI;wVj iz.kkyh esa bl izdkj ls Data Transfer gksrk gS & 1) Memory rFkk CPU ds e/;A 2) CPU rFkk Input/Output ds e/;aA 3) Input/Output rFkk Memory ds e/;A CPU dh xfr lcls vf/kd gksrh gS blds ckn Main Memory dh xfr gksrh gSa A lkekU;r% Input/output dh xfr lcls de gksrh gSA Data Transfer fof/k;kWa eq[;r% nks izdkj dh gksrh gS A aaA) Program Control B) Direct Memory Access (DMA) A) Program Controlled Data Transfer: bl izdkj dh fof/k esa Input/Output rFkk CPU ds e/; dk Data Transfer ,d Program ds fu;a=.k ls gksr gS A CPU Program dks Execute djrk gS vkSj bl fof/k dk mi;ksx rc mfpr gksrk gS tc gesa de ek=k esa tkudkjh dk LFkkukarj.k djuk gksA rhu izdkj ds Program Controlled Data Transfer gksrs gSaaA 1) Synscronous Data Transfer 2) Asynchronous Data Transfer 3) Intrerrupt Controlled Data Transfer



1) Synchronous Data transfer:- ;g rst xfr okys Input/Output ds fy, mi;qDr Data Transfer djrs gSa A Port ls lacaf/kr funsZ'kksa dk mi;ksx djds Data Transfer fd;k tkrk gSA tSls& In Out Instractions In Instractionbs ls Data izkIr fd;k tkrk gS rks Out funsZ'k ls Data CPU }kjk Output dks iznku fd;k tkrk gSA 2)Asynchronous Data Transfer:- bl fof/k dk mi;ksx /kheh Input/Output Devices ds fy, fd;k tkrk gSA bl fof/k esa CPU }kjk ,d Signal Device (;qfDr) dks fn;k tkrk gSA Device /kheh gksrh gS blfy, og rRdky Data iznku ugha djrh gSaA CPU yxkrkj Device dh tkap djrk gS tSls gh Device rS;kj gks tkrh gS Data Transfer dj fn;k tkrk gS bl fof/k esa CPU dk izHkkoh mi;ksx ugha gks ikrk gS D;ksafd T;knkrj le; CPU Input/Output dh tkap djus esa yxk jgrk gSA 3) Intrerrupt Controlled Data Transfer:- bl fof/k esa CPU }kjk Input/Output dks] Data Transfer ds fy, vko';d Signal ns fn;k tkrk gS blds ckn CPU e[; Program dk fdz;kUo;u izkjaHk dj nsrk gS tSls gh Input rS;kj gks trk gS og CPU dks Interrupt Signal ns nsrk gS blds ckn CPU Input/Output ds ml izdkj dks Execute djus yxrk gS tks Data Transfer ds fy, vko';d gSA bl Program dks Interrupt Service Routine (ISR) dgrs gSaaA tSls gh Data Transfer iw.kZ gks tkrk gS CPU viuk eq[; Program fQj ls lEiUu djus yxrk gS A vr% bl fof/k esa CPU dk izHkkoh mi;ksx gksrk gS D;ksafd ;k rks CPU eq[; Program esa gksxk ;k fQj og ISR ds dk;Z dks lEiUu dj jgk gksxkA B) Direct Memory Access (DMA)Data Transfer:- lkekU;r% Buses ij tks Hkh Data Transfer gksrk gS og CPU ds fu;a=.k esa gksrk gS D;ksafd CPU gh BUS dk Lokeh gksrk gSA ysfdu ;fn gesa vf/kd tkudkjh Transfer djuk gS vkSj dksbZ x.kuk ugha djuk gS] rks ,d ,slh rduhd dh vko';drk gksrh gS ftlesa CPU chp esa u vk, vkSj lh/ks&lh/ks Memory rFkk Input/output esa Data Transfer gks A ,slh gh fof/k dks DMA Data Transfer dgrs gSA bl fof/k esa CPU ls fuosnu djds BUS dk fu;a=.k ys fy;k tkrk gS CPU BUS dks mPp izfrjks/k dh voLFkk esa Mky nsrk gS rFkk lh/ks&lh/ks Input/Output And Memory ds e/; Data Transfer gksrk gSA bldk eq[; Qk;nk ;g gS fd ;g ,d vf/kd xfr ls dk;Z djus okyk Data Transfer gksrk gS tSls&Hard Disk,Floppy Disk And RAM ds e/; Data Transfer ;fn DMA ls gksrk gS rks og vf/kd rst gksrk gS bldksa ge blrjg ls le> ldrs gSa tSls dksbZ cuk gqvk Program RAM ls lh/ks Hard Disk esa Save gksrk gSA MODES OF DMA DATA TRANSFER:-;g nks izdkj ls Complete fd;k tk ldrk gSA 1)Brust Mode 2) Cycle Stealing Mode 1)Brust Mode : blesa lEiw.kZ Block Information ,d lkFk Transfer gksrh gS iwjs le; CPU fu"dzzzh; gks tkrk gS D;ksfd CPU dks BUS dk fu;a=.k rc rd okil ugha fn;k tkrk tc rd dh lEiw.kZ lwpuk Transfer ugha gks xbZ gksA vR;kf/kd xfr ls Data Transfer gksrk gS ijarq ,d gkuh ;g gksrh gS fd CPU dk izHkkoh mi;ksx ugha gks ikrk gS bl izdkj dk Data Transfer Floppy And Hard Disk ds lkFk djrs gSa D;ksafd budks chp esa ugha jksdk tk ldrk gSA



2) Cycle Stealing Mode:-bles DMA Controller yxkrkj CPU dh tkWap djrk jgrk gS ftl le; CPU dks BUS dk dk;Z ugh djuk iM+rk gS]rc ;g DMA Processing dj ysrk gS ysfdu tSls gh CPU dks BUS dh vko';drk iM+rh gS ];g DMA dks jksd nsrk gS vFkkZr DMA Controller ml Time dks pqjk ysrk gSAftl le; CPU dks BUS dh vko';drk ugh gksrh gS ;g ,d /kheh xfr ls dk;Z djus okyh fof/k gS ysfdu bldk eq[; Qk;nk ;g gS fd CPU dk izHkkoh mi;ksx gksrk gSA HANDSHAKING:-lkeU; :i ls data Transfer nwljh i)fr ls tSls Asynchronous Serial transfer Etc. ls fd;k tkrk gS ftls Handshaking dgrs gS ftles Control Signal ;g ladsr nsrk gS fd Bus Line Data Transfer ds fy;s rS;kj gS ;k ughA ftu nks Units dk Transfer vkil es djuk gS mues ls ml Unit dks ftls Data xzg.k djuk gS og ladsr nsrk gS fd og Data Transfer dj jgk gS ;k ughA ftlls Transfer djuk gS vkSj ftles Transfer djuk gSAmu nksuks dks vkil es feyk;k tkrk gS ftls ge Handshaking dgrs gSA

UNIT-5 AUXILIARY MEMORY:-Memory dks"k es Digital Computer dk egRroiw.kZ ;ksxnku gksrk gS Memory dh og Unit tks CPU ls laidZ j[krh gS Main Memory dgykrh gS og midj.k tks Data dks Backup ysus ds dk;Z es mi;ksxh gksrs gS og Auxiliary Memory dk mi;ksx djrs gS Auxiliary Memory dks Semi Or Secondary Memory Hkh dgrs gSA



dsoy og Program ftUgs rRdky Data Processing ds fy;s vko';d le>k tk;s ,sls Data dks Main Memory es j[krs gS vkSj 'ks"k lHkh tkudkjh dks mldh lkg;d Memory es j[krs gS Auxiliary Memory og Memory gksrh gS tks Input And Output Device dks pykus es ihNs ls lg;ksx ixnku djsaA MAGNETIC DRUM:- Magnetic Disk dh rjg Drum Hkh Direct Access Storege midj.k gksrk gS ;g ewyr%,d Cylinder tSlk gksrk gS ftlds ckgjh /kjkry ij Magnetic dk ysi gksrk gSA,d Motor bl Drum dh /kqjh ij vR;ar rsth ls ?kwerk gSAftlls Data Store fd;k tkrk gSAData Store,Track es gksrk gSA bles Hkh Read/Write Head gksrs gS ftlds }kjk Store Data i<+k tk ldrk gSA;k mles dqN cnyko fd;k tk ldrk gS lkekU;r% Magnetic Drum es fyf[kr Data ml le; rd LFkk;h jgrk gS tc rd mls feVk;k u tk;sA Magnetic Drum izfr fefuV gtkjks pDdj yxkkrk gS ftlld Data Read /Write djus dh Speed Fast gksrh gSA Disk dh rqyuk es bldh mi;ksfxrk de gksus ds dkj.k vktdy ds Computer es Storage ds fy;s Drum dk mi;ksx de djrs gSA MAGNETIC DISK:- Magnetic Disk ,d o`Rrkdkj Plate gksrh gS tks Metal Or Plastic dh cuh gksrh gS vkSj ml ij Material dk ysiu jgrk gS Disk dks nksuks vksj Read/Write dh lqfo/kk gksrh gS ;g Disk vRa;r rst xfr ls dk;Z djrh gSAijUrq bles vkokt dkQh gksrh gSAbles Hkh Data dks Track ds :i es Store fd;k tkrk gSAvkSj Track dbZ Sector es cWaVk jgrk gSA MAGNETIC TAPE:-dqN le; iwoZ Data Sending ds fy;s Punch Card dk Use fd;k tkrk FkkA ysfdu vc bldk LFkku Magnetic Tape us ys fy;k gSA Magnetic Tape Software Or Data dh Backup Or Copy Store j[kus ds fy;s dkQh mi;ksx es yk;s tkrs gSA;g 12.5 m.m To 25.m.m pkSM+s vkSj 500 ehVj ls 1200 ehVj rd yacs jgrs gSAvkSj bl ij Hkh Magnetic inkFkZ dh ysfiax jgrh gSA Magnetic Tape es 7 To 9 Track gh gksrs gSAPunch Card dh vis{kk Magnetic Tape dk thou dkQh yzck gksrk gS bues dqN dfe;kW Hkh gksrh gSa tks fd fuEu gSA 1) eupkgk Data [kkstus es vlqfo/kk gksrh gSA 2) /kwy rFkk ueh ;k Å"ek ds dkj.k Data es dbZ izdkj dh =qfV;k vk tkrh gSA SEMI CONDUCTOR MEMORY:-Cache Memory es tks CPU rFkk Main Memory ds e/; fLFkr jgrh gS mlh izdkj Semi-Conductor Memory esa Hkh CPU rFkk Main Memory ds e/; Data Storage rFkk Data Accessing dh fLFkfr jgrh gS vkSj ,slh fLFkrh esa mPp xfr okyzs Semi-Conductor dk mi;ksx fd;k tkrk gS vFkkZr ftl Memory ds fuekZ.k esa Semi-Conductor dk mi;ksx fd;k tkrk gS mls gh ge Semi-Conductor Memory dgrs gSa A bl Memory dk eq[; Element Flip-Flop gksrk gS tks bl Memory ds vo;o ds :i esa dk;Z djrk gS rFkk Binary ds :i esaa Data dks Store djrk gS vFkkZr 0 vSj 1 A Memory Hierarchy:-Computer ds ifjiFk es Data o funssZ'kksa ds gesa'kk fdlh izdkj dh Memory j[kuk gksrk gSA Computer ra= esa dbZ izdkj dh Memory mi;ksx esa vkrh gSA ,d Hierarchy cukdj muds fofHkUu xq.kksa dks v/;;u fd;k tk ldrk gSA Computer ds ifjiFk esa nks izdkj dh Hierarchy gksrh gS A 1. Traditional Memory Hierarchy(ikjaifjd eseksjh fg,jkdhZ) 2. Contemporary Memory Hierarchy(rRdkyhu eseksjh fg,jkdhZ)



1. Traditional Memory Hierarchy:-bl Hierarchy esa Memory dh ek=k] mldh xfr] CPU ls nwjh] ykxr vkfn dk lkis{k v/;;u fd;k tkrk gSA bls blizdkj ls cuk;k tkrk gS% bls bl izdkj ls cuk;k tkrk gSA

blesa Åij ls uhps vkus ij% 1- eseksjh dh ek=k c<+rh gSA 2- izfr fcV ykxr ?kVrh gSA 3- ,Dlsl le; c<+rk gSA 4- esaeksjh ,Dlsl dh la[;k ?kVrh gSA vr% CPU jftLVj lcls rst xfr ls dk;Z djrs gSa vkSj buls cuus okyh Memory rst xfr ls dk;Z djrs gSa vkSj buls cuus okyh Memory dh ek=k lcls de gksrh gSA Magnetic Tape esa vf/kdre ek=k esa tkudkjh Mkyh tk ldrh gSSA ijarq ;g vR;f/kd /kheh gksrh gSA 2. Contemporary Memory Hierarchy:-

vk/kqfud Digital Computer dh Memory esa nks izdkj ds ifjorZu vk, gSa %



Disk Cashe:- Main Memory ds dqN fgLls esa pqacdh; fMLd ls ,Mokal esa gh tkudkjh ysssdj vkrs gSaA bl fgLls dks Disk Cashe dgrs gSaA vr% ;g iw.kZr%lkW¶Vos;j fof/k gSA Optical Memory:- CDROM tSlh Optical Memory dk mi;ksx dj vR;kf/kd ek=k Data Store fd;k tkrk gS] ijarq ;g vR;f/kd /kheh esaeksjh gS A bldh xfr Magnetic Tape ds leku gksrh gSA Associative Memory:-Data Processing ds Program esasa dHkh&dHkh Memory esa laxzfgr fdlh Table ds fdlh Item dh [kkst djuk vklku gks tkrk gS vkSj ;g Associative Memory ds }kjk gh laHko gksrk gS bls nwljs 'kCnksa esa Content Address Table Memory Hkh dgrs gSaA ;g Memory RAM Memory ls vf/kd [kphZyh gksrh gS D;ksafd blesa gj Cell Logic Circuit ls cuk gksrk gS D;ksafd blesa gj Cell Logic Circuit ls cuk gksrk gS ftlls fdlh Hkh 'kCn dk ,d va'k Hkh ljyrk ls Find fd;k tk ldrk gS blhfy, Associative Memory dk mi;ksx ogkWa fd;k tkrk gS tgkWa Search Time vr;ar de gks ;g Memory Unused LFkku dks Hkh [kkst ysrh gS ;k fQj ge ,salk Hkh dj ldrs gS tSls fdlh Hkh dksbZ [kkl LFkku dks ge Read dj ldsaA ;fn Associative Memory esa fdlh 'kCn dks foyksfir djuk gks ;k dksbZ 'kCn tksM+uk gks rks bl fLFkfr esa vfrfjDr Register dh vko';drk gksrh gS ftls Tag Register dgrs gSa blesa mruh gh Bits gksrh gS ftrus Memory esa 'kCn gksrs gSaA Memory esa vafdr gj Active 'kCn ds fy, Tag Register dks 'kwU; fd;k tkrk gSA ;fn mlesa dqN fy[kuk gks rks 0 ds LFkku ij 1 djuk gksxk A Cache Memory:-;g ,d mPp xfr ls dk;Z djus okyh yssfdu vR;f/kd egWaxh v/kZpkyd eseksjh gS] tks fd CPU vkSj Main Memory ds e/; yxh gksrh gSA blls Computer ds izksxzke fdz;kao;u dh xfr c<+krs gSaA egWxh gksus ds dkj.k bls de ek=k esa yxkrs gSaA bldk Access Time cgqr gksrk gS bl izdkj ls tks System curk gS mls dsf'kax flLVe dgrs gSaA bl System dk mn~ns'; gksrk gS de ls de [kpZ esa vf/kd ls vf/kd xfr izkIr djukA Main Memory dh dher de gksus ls bldh ek=k rks vf/kd j[kh tkrh gSAde ek=k esa Cache dk mi;ksx djds bl rjg ls xfr izkIr djus dh dksf'k'k djrs gSa tSls lEiw.kZ Memory gh Cache gksA ;g LFkkuh;rk ds fl)kar ij dk;Z djrh gSA ;g fl)kar crkrk gS fd fdlh le; esa CPU Memory ds ,d NksVs ls {ks= dks gh izkIr djuk pkgrk gSA Memory ds bl fgLkls esa tks Program o Data gksrk gS mls gh Cache esa Mky nsrs gSaA tc Hkh CPU dks vko';drk gksrh gS] og igys Cache esa tkudkjh <wW<rk gS A vxj ;g ogkWa fey xbZ rks mls de le; esa Access dj fy;k tkrk gSA Virtual Memory:-Operating System dh og {kerk ftlds }kjk og Memory ra=ksa (Main o Secondary Memory) dk bl rjg ls Use djrk gS fd mi;ksxdrkZ dks yxrk gS fd og ,d cgqr cM+h ,oa rhcz xfr okyh Memory dk mi;ksx dj jgk gSA Virtual Memory ,d ,salh ,dhd`r fopkj/kkjk gS ftlesa fd nks Memory ra=ks o de xfr ,oa vf/kd {kerk dk mi;ksx djds Virtual Memory esa dk;Z fd;k tkrk gSA



dksbZ Hkh Program tks Memory esa laxzfgr jgrk gS og dbZ Hkkxksa esa foHkkftr jgrk gS rFkk izR;sd Hkkx dks Page dgrs gSaA vDlj fdlh Hkh Program ds laiw.kZ Hkkx dks ge Main Memory esa ugha cfYd Program dk og Hkkx ;k funsZ'k ftldks Execute djuk gS mldks Secondary Memory ls Main Memory esa ykrs gSa rFkk 'ks"k program dks Secondary Memory esa gh jgus nsrs gSa tc Program dk ;g Part fdz;kfUor gksrk gS rc mls Secondary Memory esa Hkstdj nwljk Hkkx Secondary ls Main Memory esa ykrs gSa bl rjg ls bl izfdz;k dks dbZ ckj nksgjkuk iM+rk gS D;ksafd Main Memory dh laxzg {kerk cgqr de gksrh gS vr% Memory ds mi;ksx dk ;g rjhdk Virtual Technique dgykrk gSA Åijh rkSj ij ;gh Secondary Memory Computer dh Virtual Memory dgykrh gSA lkekU;r% Virtual Memory Computer esa miyC/k Secondary Memory gksrh gSA tSls& 80486 dh Real Memory 4 GB gksrh gSA ysfdu bldh Virtual Memory 64 TB gksxhA Address Space & Memory Space:-Programmer }kjk Hksts gq, izR;sd 'kCn dk ,d viuk ,d Address gksrk gS ftls Virtual Address dgrs gSa vkSj ,sals Address dk Set dks Address Space ds uke ls tkurs gSa Main Memory esa Address dks Location ;k Physical Address Hkh dgrs gSaA Virtual Memory ls Address Space Memory Space dh rqyuk esa vf/kd jgrh gSA lHkh Virtual Address dks LiLV djus ds fy, Auxiliary Memory esa mlds fy, 15 Bit dh Sapce jgrh gS Address Space blfy, vf/kd j[kh tkrh gS ftlls Data 'kCn ds fy, Sapce dh deh u iMs+zA Address Maping:- Physical memory dks tc cjkcj&cjkcj VqdM+ksa esa foHkkftr fd;k tkrk gS rks ,salk gj VqdM+k Block dgykrk gS vkSj izR;sd Block esa 64 ls ysdj 4096 Word Store fd, tk ldrs gSaA Page dk vFkZ gksrk gS tks Address Space ds lewg dks vkSj vkdkj dks cjkcj&cjkcj Hkkxksa esa j[ksa ;fn ,d Page esa 1K.Bytes Store gksaxs rks Address Space 1024 Bytes dh gksxh vkSj bldh Main Memory esa 32 Block gksaxs vFkkZr Page Address Space dk ladsr nsrs gSa vkSj Block Memory Space dks n'kkZrs gSaA Page Table:-Page Table esa Address Page Number dk ladsr nsrk gS vkSj 'kCn dk Block Number iznf'kZr djrk gSA tc page dks Main Memory esa Store fd;k tkrk gS r cog de ls de Page ds fy, 8 vko';d 'kCn ysxk fdUrq og main Memory esa pkj Block dks ysxkaA ,d fLFkfr ;g Hkh gks ldrh gS fd Address Space 1024 KB 'kCnksa ds fy, vkSj Memory esa de ls de 32 'kCn dk mi;ksx djsxkA Page Replacement:- Page Replacement ds le; ;g fuf'pr djuk iM+rk gS fd dkSu lk Page Main Memory ls vyx djuk gS ftlls u, 'kCnksa ds fy, LFkku fey lds ,oa dc u;k Page Auxiliary Memory ls Main Memory esa Transfer djuk gSA Main Memory esa u;k Page fdl Location esa Hkstk tkuk gS vxj Main Memory Full gksrh gS rks txg cukus ds fy, mls fdlh Page dks gVkuk gksrk gS ftls Page Replacement dkgk tkrk gSA gVkus dh Hkh nks fof/k;ka gksrh gSaA 1) First in First Out(FIFO) 2) Last recently Used FIFO esa Page gVkuk ljy gksrk gS fdUrq ;gkWa ;g laHkkouk jgrh gS fd mls gVkrs gh mlds fy, rRdky iqu% dksbZ u;k LFkku cukuk iM+s tcdh LRU i)fr esa Page gVkuk ,d dfBu dk;Z gksrk gS ij blesa vklkuh ;g jgrh gS fd gVk, x, Page dks rRdky Load ugha djuk iM+rk tcfd FIFO esaa ;g de gksrk gSA



Hit Ratio:-lcls igys CPU Data ;k vkns'k vFkok nksuksa ds fy, Cache Memory ls gh laidZ djrk gSA ;fn buesa ls dksbzZ ,d fey tkrk gS rks og mls xzg.k dj ysrk gS tc Memory esa ls fdlh v{kj dks Find fd;k tkrk gS vkSj og v{kj mls Memory esa fey tkrk gS rks gesa Hit Ratio dh voLFkk izkIr gks tkrh gSA Hit Ratio esa Cache Memory ds lkFk Main Memory dk Use fd;k tkrk gS vxj Find fd;k gqvk 'kCn mls ugha feyrk gS rks og Cache Memory ls laidZ lk/krk gS A vr% ge dg ldrs gS fd Cache Memory ds d;ksZa dk eki gh Hit Ratio ds }kjk fd;k tkrk gSA Mapping Techniques:-Main Memory ls Data dks Cache Memory esa Hkstus dh izfdz;k dks Mapping Technique ds }kjk gh laHko fd;k tkrk gSA ;g Technique rhu izdkj dh gksrh gS%& 1) Associative Memory 2) Direct Memory 3) Set Associative Memory Associative Mapping es 'kCnksa ds nks Hkkx gksrs gaSA Address vkSj Data Main Memory dk dksbZ Hkh 'kCn Cache Memory ds fdlh Hkh Location ij jgrk gS tcfd Direct mapping esa ,d vFkok 8 'kCnksa okys Block dk mi;ksx fd;k tkrk gS vr% blesa nks Field gksrh gSa Block field And Word Field . Direct mapping dh deh dks nwj djus ds fy, la'kksf/kr i)fr dk uke Set Associative Memory gSA blds vuq'kkj Cache Memory ,d gh Index ds vanj nks ;k mlls vf/kd 'kCnksaA Writing Into Cache:- ;fn Cache Memory esa CPU dk mi;ksx fdlh Hkh okafNr 'kCn dks i<+us ds fy, mi;ksx esa vkrk gS rks Main Memory ml 'kCn dks Transfer djus esaA fdUrq ;g Operation Unit ls lacf/kr gksrs gSaA Writing Into Cache ls rkRi;Z Cache Memory esa fy[kus ls gksrk gSA Cache Memory esa fy[kus ds lkFk&lkFk vxj rsth ls Data Transfer djuk pkgrs gSa rks gesa Auxiliary Memory dk mi;ksx djuk gksrk gS oSls Hkh Cache Memory dk mi;ksx CPU rFkk Main Memory ds e/; gksrk gSA Auxiliary Memory ls dk;Z gksus ds ckn og okil Data dks main Memory esza Hkst nsrk gSA

unit-1 · lhkh izdkj ds mkvk dei;wvj jftlvj e ck;ujh dkm e gh jgrs ga d;kfda jftlvj f¶yi ¶yki...

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