um2271 user manual - stmicroelectronics...• 1.2" 390x390 pixel amoled round display panel...
TRANSCRIPT
February 2020 UM2271 Rev 4 1/77
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UM2271User manual
Discovery kit with STM32L4R9AI MCU
Introduction
The 32L4R9IDISCOVERY kit is a complete demonstration and development platform for the STMicroelectronics Arm® Cortex®-M4 core-based STM32L4R9AI microcontroller. Leveraging the innovative ultra-low-power oriented features, 640 Kbytes of embedded RAM, graphics performance (Chrom-ART Accelerator™) and DSISM controller offered by the STM32L4R9AI, the 32L4R9IDISCOVERY kit enables users to easily prototype applications with state-of-the-art energy efficiency, as well as providing stunning audio and graphics rendering with direct support for an AMOLED DSI round display. For even more user-friendliness, the on-board ST-LINK/V2-1 debugger provides out-of-the-box programming and debugging capabilities.
The STM32L4R9AI microcontroller features four I2Cs, five USARTs, one ULP UART, three SPIs, two SAIs, one SDIO, one USB 2.0 full-speed OTG, two CANs, one FMC parallel synchronous interface, one 12-bit ADC, one 12-bit DAC, two ULP analog comparators, two op-amps, one 2 data-lane DSI display, one digital filter for sigma-delta modulation and SWP interface, two Octo-SPI interfaces, 8- to 14-bit camera interface, one touch-sensing controller interface, JTAG and SWD debugging support.
This Discovery board offers everything required for users to get started quickly and develop applications easily. The hardware features on the board help to evaluate the following peripherals: USB OTG FS, microSD™ card, 8-bit camera interface, 16-Mbit PSRAM, PMOD, and STMod+ connectors, IDD measurement, full-duplex I2S with an audio codec and stereo headset jack including an analog microphone, DFSDM with a pair of MEMS digital microphones on board, 512-Mbit Octo-SPI Flash memory device, I2C extension connector, 1.2" AMOLED display using a one data-lane DSI interface with a capacitive touch panel. The ARDUINO® compatible connectors expand the functionality with a wide choice of specialized shields. The integrated ST-LINK/V2-1 provides an embedded in-circuit debugger and programmer for the STM32 MCU.
Pictures are not contractual.
Figure 1. 32L4R9IDISCOVERY top view Figure 2. 32L4R9IDISCOVERY bottom view
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Contents UM2271
2/77 UM2271 Rev 4
Contents
1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 Product marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Codification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3 Development environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1 System requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.2 Development toolchains . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.3 Demonstration software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4 Technology partners . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Bootloader limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
6 AMOLED display limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
7 Hardware layout and configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
7.1 32L4R9IDISCOVERY layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7.2 32L4R9IDISCOVERY mechanical drawing . . . . . . . . . . . . . . . . . . . . . . . 15
7.3 Embedded ST_LINK/V2-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
7.3.1 Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
7.3.2 ST-LINK/V2-1 firmware upgrade . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
7.4 Low-power consumption status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
7.5 TAG and SWD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7.6 Power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
7.6.1 Power supply sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
7.6.2 MCU power supply options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.6.3 Supplying 32L4R9IDISCOVERY through ST-LINK/V2-1 USB . . . . . . . . 22
7.6.4 Measurement of MCU current consumption . . . . . . . . . . . . . . . . . . . . . 22
7.6.5 Program or debug when power supply not from ST-LINK/V2-1 . . . . . . . 23
7.7 Clock sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
7.8 Reset Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
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7.9 Boot configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
7.10 Audio codec . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7.11 DFSDM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7.12 PSRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7.13 USB OTG FS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
7.13.1 32L4R9IDISCOVERY as a USB device . . . . . . . . . . . . . . . . . . . . . . . . . 26
7.13.2 32L4R9IDISCOVERY as a USB host . . . . . . . . . . . . . . . . . . . . . . . . . . 26
7.14 Octo-SPI Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
7.15 Virtual COM port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
7.16 Buttons and LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
8 Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8.1 ARDUINO® Uno V3 connectors CN10, CN11, CN16, and CN17 . . . . . . 29
8.2 DSI display, backlight and touch panel connector CN4 . . . . . . . . . . . . . . 31
8.2.1 DSI AMOLED display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
8.2.2 Backlight and OLED power supplies generation . . . . . . . . . . . . . . . . . . 33
8.2.3 Touch panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
8.3 USB OTG FS connector CN9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
8.4 ST-LINK/V2-1 USB Micro-B connector CN13 . . . . . . . . . . . . . . . . . . . . . 35
8.5 microSD card connector CN6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
8.6 STMod+ connector CN1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
8.7 PMOD connector CN3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
8.8 Camera module connector CN2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
8.9 TAG connector CN8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
8.10 SWD header CN5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
8.11 EXT_I2C connector CN7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
8.12 Stereo headset and headphone jack CN12 . . . . . . . . . . . . . . . . . . . . . . . 41
Appendix A GPIO assignment and sharing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Appendix B Solder bridges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Appendix C STMod+ GPIO sharing and multiplexing . . . . . . . . . . . . . . . . . . . . . 53
Appendix D Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Contents UM2271
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Appendix E Fanout board (MB1280) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
E.1 MikroElektronika mikroBUS™ compatible connector (Fanout CN10 / CN11). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
E.2 ESP-01 Wi-Fi® board compatible connector . . . . . . . . . . . . . . . . . . . . . . . 73
E.3 Compatible connectors for the Grove boards . . . . . . . . . . . . . . . . . . . . . . 73
E.3.1 Compatible connector for I2C Grove boards (Fanout CN3) . . . . . . . . . . 73
E.3.2 Compatible connector for UART Grove boards (Fanout CN2) . . . . . . . . 74
Appendix F Federal Communications Commission (FCC) and Industry Canada (IC) Compliance75
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
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UM2271 List of tables
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List of tables
Table 1. Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8Table 2. Codification explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8Table 3. JP10: VDD_STL setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18Table 4. SW1 switch setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18Table 5. 32L4R9IDISCOVERY power sources configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19Table 6. JP4: power source selector setting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21Table 7. JP5: ARD 5 V input/output voltage selection setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21Table 8. JP7: VDD setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22Table 9. JP1: IDD_MCU measurement setting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23Table 10. JP3: VDDA and VDDUSB, settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23Table 11. Boot modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25Table 12. LD1 and LD2 details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27Table 13. Buttons and LEDs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28Table 14. ARDUINO® Uno V3 compatible connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29Table 15. JP3, VDDA and VDDUSB, settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30Table 16. DSI display connector CN4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31Table 17. USB OTG FS Micro-AB connector CN9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34Table 18. USB Micro-B connector CN13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35Table 19. microSD connector CN6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36Table 20. STMod+ connector CN1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37Table 21. Quad SPDT switch configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37Table 22. PMOD connector CN3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38Table 23. Camera module connector CN2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39Table 24. TAG connector CN8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40Table 25. SWD header CN5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40Table 26. EXT_I2C connector CN7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41Table 27. I2C1 onboard addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41Table 28. Audio jack connector CN12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42Table 29. 32L4R9IDISCOVERY GPIO assignment and sharing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43Table 30. MFX_V3 GPIO assignment (LQFP48) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49Table 31. 32L4R9IDISCOVERY solder bridges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51Table 32. STMod+ GPIO sharing and multiplexing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53Table 33. SPDT quad switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54Table 34. Description of the mikroBUS™ connectors (CN11 and CN10). . . . . . . . . . . . . . . . . . . . . . 72Table 35. Description of the ESP-01 Wi-Fi board connector pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . 73Table 36. Description of the I2C Grove board connector pins (CN3) . . . . . . . . . . . . . . . . . . . . . . . . . 74Table 37. Description of the UART Grove board connector pins (CN2) . . . . . . . . . . . . . . . . . . . . . . . 74Table 38. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
List of figures UM2271
6/77 UM2271 Rev 4
List of figures
Figure 1. 32L4R9IDISCOVERY top view. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Figure 2. 32L4R9IDISCOVERY bottom view. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Figure 3. Hardware block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Figure 4. 32L4R9IDISCOVERY top side layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Figure 5. 32L4R9IDISCOVERY bottom side layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Figure 6. 32L4R9IDISCOVERY mechanical drawing (top view, in mm) . . . . . . . . . . . . . . . . . . . . . . 15Figure 7. 32L4R9IDISCOVERY mechanical drawing (bottom view, in mm) . . . . . . . . . . . . . . . . . . . 16Figure 8. How to update driver software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17Figure 9. JP4 default configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20Figure 10. DSI display connector CN4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31Figure 11. USB OTG FS Micro-AB connector CN9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34Figure 12. USB Micro-B connector CN13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35Figure 13. microSD connector CN6 (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36Figure 14. STMod+ connector CN1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37Figure 15. PMOD connector CN3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38Figure 16. Camera module connector CN2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39Figure 17. TAG connector CN8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40Figure 18. EXT_I2C connector CN7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41Figure 19. Stereo headset with microphone jack CN12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42Figure 20. 32L4R9IDISCOVERY board interconnections (MB1311C) . . . . . . . . . . . . . . . . . . . . . . . . 56Figure 21. 32L4R9IDISCOVERY power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57Figure 22. 32L4R9IDISCOVERY ARDUINO® Uno V3 connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . 58Figure 23. 32L4R9IDISCOVERY ST-LINK/V2-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59Figure 24. 32L4R9IDISCOVERY Octo-SPI Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60Figure 25. 32L4R9IDISCOVERY peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61Figure 26. 32L4R9IDISCOVERY USB OTG FS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62Figure 27. 32L4R9IDISCOVERY Round DSI display interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63Figure 28. 32L4R9IDISCOVERY IDD measurement and Multi Function eXpander . . . . . . . . . . . . . . 64Figure 29. 32L4R9IDISCOVERY microcontroller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65Figure 30. 32L4R9IDISCOVERY PSRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66Figure 31. 32L4R9IDISCOVERY camera . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67Figure 32. 32L4R9IDISCOVERY STMOD+ interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68Figure 33. 32L4R9IDISCOVERY Audio and DFSDM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69Figure 34. Round DSI display board (MB1314) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70Figure 35. Fanout board (MB1280) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71Figure 36. STMod+ fanout module plugged into CN1 connector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
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UM2271 Features
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1 Features
• STM32L4R9AI Arm(a)-based microcontroller with 2-Mbyte Flash memory and 640-Kbyte RAM in UFBGA169 package
• 1.2" 390x390 pixel AMOLED round display panel with 16 million colors depth, MIPI® DSI interface and capacitive touch panel
• USB OTG FS
• On-board current measurement
• SAI audio codec
• ST-MEMS digital microphones
• 16-Mbit asynchronous PSRAM
• 512-Mbit Octo-SPI Flash
• 2 user LEDs
• 1 reset push-button
• 4-direction joystick with selection button
• Board connectors:
– 8-bit camera
– USB OTG FS with Micro-AB
– Stereo headset jack including analog microphone input
– microSD™ card
– ARDUINO® Uno V3 expansion connectors
– STMod+ expansion connector
– PMOD expansion connector
– EXT_I2C expansion connector
• Flexible power supply options:
– ST-LINK USB VBUS or external sources
• On-board ST-LINK/V2-1 debugger/programmer with USB re-enumeration capability: mass storage, Virtual COM port and debug port
• Comprehensive free software libraries and examples available with the STM32Cube package
• Support of a wide choice of integrated development environments (IDEs), including IAR™, Keil® and STM32CubeIDE
a. Arm is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere.
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2 Ordering information
To order the 32L4R9IDISCOVERY kit, refer to Table 1.
2.1 Product marking
Evaluation tools marked as “ES” or “E” are not yet qualified and are therefore not ready to be used as reference designs or in production. Any consequences arising from such usage will not be at ST’s charge. In no event will ST be liable for any customer usage of these engineering sample tools as reference designs or in production.
‘E’ or ‘ES’ marking examples of location:
• on the targeted STM32 that is soldered on the board (For an illustration of STM32 marking, refer to the section ‘Package information’ of the STM32 datasheet at www.st.com).
• next to the evaluation tool ordering part number, that is stuck or silkscreen printed on the board
This board features a specific STM32 device version, which allows the operation of any stack or library. This STM32 device shows a ‘U’ marking option at the end of the standard part number and is not available for sales.
2.2 Codification
The meaning of the codification is explained in Table 2. The order code is mentioned on a sticker placed on the top side of the board.
Table 1. Ordering information
Order code Board references Target STM32
STM32L4R9I-DISCO
– MB1311
– MB1280(1)
– MB1314(2)
1. Fanout board.
2. Round DSI LCD board.
STM32L4R9AII6
Table 2. Codification explanation
32XXYYZDISCOVERY Description Example:32L4R9IDISCOVERY
32XXMCU series in STM32 32-bit Arm Cortex MCUs
STM32L4+ Series
YYMCU product line in the series
STM32L4R9
ZSTM32 Flash memory size:
– I for 2 Mbytes2 Mbytes
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3 Development environment
3.1 System requirements
• Windows® OS (7, 8 and 10), Linux® 64-bit or macOS®(a)(b)
• USB Type-A to Micro-B cable
3.2 Development toolchains
• IAR™ - EWARM(c)
• Keil® - MDK-ARM(c)
• STMicroelectronics - STM32CubeIDE
3.3 Demonstration software
The demonstration software, included in the STM32Cube package corresponding to the on-board MCU, is preloaded in the STM32 Flash memory for easy demonstration of the device peripherals in standalone mode. The latest versions of the demonstration source code and associated documentation are downloadable from the www.st.com/stm32l4-discovery web page.
4 Technology partners
MACRONIX:
512-Mbit Octo-SPI NOR Flash memory device, part number MX25LM51245GXDI00
GOVISIONOX OPTOELECTRONICS:
1.2 inch 390x390 AMOLED display, part number G1120TB103GF-001
a. macOS® is a trademark of Apple Inc. registered in the U.S. and other countries.
b. All other trademarks are the property of their respective owners.
c. On Windows® only.
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5 Bootloader limitations
Boot from system Flash memory results in executing bootloader code stored in the system Flash memory protected against writing and erasing. This allows in-system programming (ISP), that is, flashing the STM32 user Flash memory. It also allows writing data into RAM. The data come in via one of the communication interfaces such as USART, SPI, I2C bus, USB or CAN.
The bootloader version is identified by reading the bootloader ID at the address 0x1FFF6FFE. Its value is 0x91 for bootloader V9.1 and 0x92 for V9.2.
The STM32L4R9AII6 part soldered on the 32L4R9IDISCOVERY mainboard is marked with a date code corresponding to its date of manufacturing. STM32L4R9AII6 parts with a date code prior or equal to week 37 of 2017 are fitted with bootloader V9.1 affected by the limitations to be worked around, as described hereunder. Parts with the date code starting from week 38 of 2017 contain bootloader V9.2 in which the limitations no longer exist.
To locate the visual date code information on the STM32L4R9II6 package, refer to its datasheet (DS12023) available at www.st.com, section Package Information. Date code related portion of the package marking takes Y WW format, where Y is the last digit of the year and WW is the week. For example, a part manufactured in week 38 of 2017 bares the date code 7 38.
There is also another way to identify the need for a workaround: before opening the blister of the Discovery Kit, just check the backside of the blister. At the bottom left corner, if the reference number is equal or higher than 32L4R9IDISCO/ 02-0, it means the bootloader version is V9.2 and there is no need to apply the workaround. Any other inferior number like 01-0 needs the workaround.
Bootloader ID for the bootloader V9.1 is 0x91.
The following limitation exists in the bootloader V9.1:
Some user Flash memory data get corrupted when written via SPI interface
Description:
During bootloader SPI Write Flash operation, some random 64-bits (2 double-words) may be left blank at 0xFF
Workarounds:
WA1: add a delay between sending Write command and its ACK request. Its duration must be the duration of the 256-Byte Flash write time.
WA2: read back after each writing operation (256 bytes or at end of user code flashing) and in case of error start writing again.
WA3: Using bootloader, load a patch code in RAM to write in Flash memory through the same Write Memory write protocol as bootloader (code provided by ST). The patch code is available for download from www.st.com website with a readme.txt file containing usage instructions.
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6 AMOLED display limitation
Warning: Permanent image sticking may occur if AMOLED displays the same image for an extended period of time.
7 Hardware layout and configuration
32L4R9IDISCOVERY board is designed around the STM32L4R9AI (169 ball UFBGA package DSI version). The hardware block diagram Figure 3 illustrates the connection between STM32L4R9AI and peripherals (PSRAM, Octo-SPI Flash, DSI color display, USB OTG connector, USART, audio, camera connector, STMod+ and PMOD connectors, IDD measurement, joystick, microSD card, I2C extension connector, ARDUINO® Uno V3 shields and embedded ST-LINK). Figure 4 and Figure 5 help the user to locate these features on the board. Mechanical drawing for 32L4R9IDISCOVERY and round DSI display boards is described in Figure 6.
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Figure 3. Hardware block diagram
MSv46692V1
GPIO
FMC
SWD
OctoSPIM_P2
SDMMC1PWR
USART3
SPI2
I2C3
USART2
DSI
DCMI
DFSDM
RTC / HSEI2C1
LPUART1
SAI1
OTG1
ARD connector
PMOD
STMod+
Reset button, JoystickRSTn / GPIO
STM32L4R9AI
SELSEL
16-Mbit asynchronous
PSRAM
3.3 V / 1.8 Vpower supply
ST-LINK/V2-1
32 KHz crystal / 16 MHz crystal
512-Mbit Octo SPI Flash memory
TAG connector
SWD connector
2 MEMs microphones
User LED
EXT_I2C connector
MFX V3, IDD measurement
LCD, touch panel (DSI V3 connector)
User LED
Audio codec, amplifier
Stereo jack with microphone
Camera connector
microSD
USB OTG connector
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7.1 32L4R9IDISCOVERY layout
Figure 4. 32L4R9IDISCOVERY top side layout
MSv46693V3
U1, U2 Microphones
U6 PSRAM
U7STM32L4R9AII6
CN2Camera connector
CN1STMod+ connector
CN3PMOD
connector
JP4Powerheader
JP3VDDA_
VDDUSB
CN5SWD
connector
JP5ARD_IN / OUT
CN8TAG connector
CN7EXT_I2C connector
CN6microSD card connector
B2Joystick
CN9USB OTG FS
B1Reset
CN4DSI V3
connector
MB1314DSI
displayboard place
JP1IDD
measurement
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Figure 5. 32L4R9IDISCOVERY bottom side layout
MSv46694V2
CN10, CN11 Arduino connectors
CN12Audio jack
U26Audio codec
JP7VDD
JP9+5 V
power LED
U24Octo-SPI
Flash memory
CN13USB
STLINK
U30STLINK
MCU
JP10VDD_STLK
SW1 Switch CN16, CN17 Arduino connectors U29 MFX expander
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7.2 32L4R9IDISCOVERY mechanical drawing
Figure 6. 32L4R9IDISCOVERY mechanical drawing (top view, in mm)
Legend:
= Indicates the mounting hole between the 32L4R9IDISCOVERY board (at the top of Figure 6) and the round DSI display board (at the bottom of Figure 6)
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Figure 7. 32L4R9IDISCOVERY mechanical drawing (bottom view, in mm)
Plastic spacer height = 13 mm, overall height = 26 mm ± 1 mm
7.3 Embedded ST_LINK/V2-1
The ST-LINK/V2-1 programming and debugging tool is integrated on the 32L4R9IDISCOVERY board. Compared to ST-LINK/V2, the changes are listed below:
• new features supported on ST-LINK/V2-1:
– USB software re-enumeration
– Virtual COM port interface on USB
– Mass storage interface on USB
– USB power management request for more than 100 mA power on USB
• features no more supported on ST-LINK/V2-1:
– SWIM interface
– Application voltage lower than 3 V
For general information concerning the debugging and programming features that are common to both versions V2 and V2-1, refer to ST-LINK/V2 in-circuit debugger/programmer.
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7.3.1 Drivers
Before connecting the 32L4R9IDISCOVERY to a Windows (7, 8, 10) PC via USB, a driver for ST-LINK/V2-1 must be installed. It is available on the www.st.com website.
If 32L4R9IDISCOVERY is connected to the PC before the driver is installed, some interfaces of the board may be declared as ‘Unknown’ in the PC device manager. In this case, the user must install the driver files, and update the driver of the connected device from the device manager as shown in Figure 8: How to update driver software
Note: Prefer using the ‘USB Composite Device’ handle for a full recovery.
Figure 8. How to update driver software
7.3.2 ST-LINK/V2-1 firmware upgrade
The ST-LINK/V2-1 embeds a firmware upgrade mechanism for an in-situ upgrade through the USB port. As the firmware may evolve during the lifetime of the ST-LINK/V2-1 product (such as new functionality, bug fixes or support for new microcontroller families), it is recommended to visit www.st.com before starting to use the 32L4R9IDISCOVERY and periodically, in order to stay up-to-date with the latest firmware version.
7.4 Low-power consumption status
There is a way to make the board get into very low power consumption status in which the current on +5 V may be below 20 uA. How to get into the low power mode:
1. The connections between ST-LINK/V2-1 and MCU must be disconnected by microswitch SW1 manually (Refer to Table 4 below). Set JP4 on (7) ARD position, and put JP5 in ARD-5V IN position. Remove JP10. Then, connect an external 5 V power supply on CN16 pin 5 5V and on GND.
2. Peripherals (including display, CTP, and PSRAM) are powered off by MOSFET which is controlled by MFX_GPIO8 / MFX_aGPIO2 (put them as input floating), and by setting
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all peripherals related I/Os to inactive level (Input pull-down or input is a good option according to I/Os).
3. Disconnect JP9 to remove +5 V from LD8 power LED, disconnect JP10 (or put it in 2-3 position), power off OCTOSPI (remove SB23/SB24) and configure related I/Os as input pull down.
4. Peripherals may be set up by FW to reach power-down mode. All I/Os must be configured in non-consuming states. Set MFX_V3 to sleep mode, get the SD card out of its socket slot. Set the audio codec in power down.
7.5 TAG and SWD
One TAG interface footprint CN8 is reserved on 32L4R9IDISCOVERY and available to debug and program the on-board MCU.
Note: The microswitch SW1 must be put in the OFF position. R24 and R31 must be disconnected.
The SWD 6-pin header CN5 added on 32L4R9IDISCOVERY, connected to onboard ST-LINK MCU, is available to debug and program an external MCU.
VDD from the external board is 1.8 V or 3.3 V, thanks to the onboard voltage converter.
SW1 switch enables the debug and programing functions through USB STLK CN13 connector. SW1 is accessible on the bottom side of 32L4R9IDISCOVERY. By default, SW1 is in the ON position. To put the microswitch in the OFF position, just push away the switch from ON position as shown in Table 4.
Table 3. JP10: VDD_STL setting
Jumper Setting Description
JP10
Default setting.
VDD_STL gets power from 32L4R9IDISCOVERY. ST-LINK is then usable to program the onboard MCU.
VDD_STL gets power from external through CN5. ST-LINK is then usable to program an external MCU.
Table 4. SW1 switch setting
Switch Setting Description
SW1
Default setting.
SW1 switch is On.
It allows debug and program capabilities through USB STLK CN13 connector. When SW1 is On, a VBUS power must be present on USB STLK CN13 connector.
SW1 is OFF.
Set this position if USB STLK CN13 is not used. Debug and program functions are not available.
3 12
3 12
ON
ON
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7.6 Power supply
7.6.1 Power supply sources
32L4R9IDISCOVERY is designed to be powered by the +5 V DC power supply. It is possible to configure the 32L4R9IDISCOVERY to use any of the sources listed in Table 5. Check also detailed configuration on the next page.
By Default, 32L4R9IDISCOVERY is powered through USB STLINK connector CN13, JP4 header has a jumper on (1) STLK, and SW1 is placed in ON position to allow debug and program features.
Choosing any other power source connector than CN13 requires either:
• to place SW1 in OFF position (with no debug/program possibility)
• to let SW1 in ON position, but connecting a USB PC host or Charger on CN13 is mandatory (For this configuration, refer to Section 7.6.5 for correct powering sequence)
For the SW1 switch setting description, refer to Table 4.
Note: 32L4R9IDISCOVERY must be powered by a power supply unit or by a piece of auxiliary equipment complying with the standard EN-60950-1: 2006+A11/2009, and must be safety extra-low voltage (SELV) with limited power capability.
Figure 9 shows a physical description of the 10-pin header JP4 default configuration.
Table 5. 32L4R9IDISCOVERY power sources configuration
JP4 configuration (function)
Power source connector (pin name)
Voltage Available current
(1) STLK (USB_STLINK) CN13 (VBUS) 5 V 500 mA
(3) E5V (ARDUINO) CN16 (VIN) 6 V - 9 V => 5 VARDUINO® Uno V3
shield dependent
(5) U5V (USB_OTG_FS) CN9 (VBUS) 5 V VBUS supply dependent
(7) ARD (ARDUINO) CN16 (ARD-5V)(1)
1. ARD-5V is a power output pin to ARDUINO® Uno V3 connector CN16 (default) or a power input pin from ARDUINO® Uno V3 connector CN16, according to JP5 setting. Refer to Table 7 below.
5 VARDUINO® Uno V3
shield dependent
(9) CHGR (USB_STLINK) CN13 (VBUS) 5 V VBUS supply dependent
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Figure 9. JP4 default configuration
A detailed description of all JP4 possible configurations is listed below and in Table 6:
• STLK: 5 V from the ST-LINK/V2-1 USB connector CN13 with 500 mA current limitation. The power mechanism of supplying the board by STLINK/V2-1 is explained in Section 7.6.3. A jumper must be placed in location STLK of JP4, connecting pins 1 and 2. The green LED LD8 is lit on to confirm the presence of 5 V voltage.
• E5V: 5 V from the 6 V to 9 V DC from VIN pin of ARDUINO® Uno V3 compatible connector CN16 (the U15 regulator is converting VIN into a 5 V voltage). The VIN input voltage is limited to 9 V to keep the temperature of the regulator U15 within its thermal safe area. A jumper must be placed connecting pins 3 and 4 of JP4. The green LED LD8 is lit on to confirm the presence of 5 V voltage. Place SW1 in OFF position, or let SW1 in ON position and follow Section 7.6.5.
• U5V: 5 V from the 5 V DC of USB OTG FS user connector CN9. A jumper must be placed in location USB of JP4, connecting pins 5 and 6. The green LED LD8 is lit on to confirm the presence of 5 V voltage. Place SW1 in OFF position, or let SW1 in ON position and follow Section 7.6.5.
• ARD: 5 V from the 5V pin of ARDUINO® Uno V3 compatible connector CN16. A jumper must be placed in location ARD of JP4, connecting pins 7 and 8. Connect the pins 2 and 3 of JP5 to get power from ARDUINO® Uno V3 (Refer to Table 7). The green LED LD8 is lit on to confirm the presence of 5 V power from ARDUINO® Uno V3. Place SW1 in OFF position, or let SW1 in ON position and follow Section 7.6.5.
• CHGR: 5 V from 5 V DC power charger connected to USB STLINK (CN13). A jumper must be placed in location CHGR of JP4, connecting pins 9 and 10. The green LED LD8 is lit on to confirm the presence of 5 V voltage. When this CHGR input is chosen, the 500 mA on-board limitation is no more effective. If 32L4R9IDISCOVERY is powered by an external USB charger, then the debug on CN13 is not available. If 32L4R9IDISCOVERY is powered by an external USB PC port, the user must pay attention that this USB PC supports the sourcing of required current. SW1 may be placed in the OFF position if debug or program features are not used.
MSv46070V1
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I
7.6.2 MCU power supply options
32L4R9IDISCOVERY offers the possibility to supply the MCU under 1.8 V or 3.3 V. The JP7 jumper must be placed on +3V3 to supply the MCU with 3.3 V, connecting pins 1 and 2. The jumper may be placed on +1V8 of JP7 to supply the MCU with 1.8 V, connecting pins 2 and 3 (Refer to Table 8).
Functions listed below are not compatible with the +1V8 setting of JP7:
• OCTOSPI
• PSRAM
• ARDUINO® Uno Revision 3
• CAMERA
• microSD card
• ADC measurements (except if JP3 is set at +3V3, or except if VREF+ configuration is changed)
• USB OTG FS (except if JP3 is set at +3V3)
Table 6. JP4: power source selector setting
Jumper Setting Description
JP4
Default setting.
32L4R9IDISCOVERY is supplied through CN13 Micro-B ST-LINK/V2-1 connector.
32L4R9IDISCOVERY is supplied through ARDUINO® Uno V3 connector CN16 (VIN). Place SW1 in OFF position, or let SW1 in ON position and follow Section 7.6.5.
32L4R9IDISCOVERY is supplied through USB OTG FS connector CN9. Place SW1 in OFF position, or let SW1 in ON position and follow Section 7.6.5.
32L4R9IDISCOVERY powers ARDUINO or is supplied by ARDUINO, according to the JP5 setting in Table 7 below. Place SW1 in OFF position, or let SW1 in ON position and follow Section 7.6.5.
32L4R9IDISCOVERY is supplied through CN13 Micro-B ST-LINK/V2-1 connector.
Table 7. JP5: ARD 5 V input/output voltage selection setting
Jumper Setting Description
JP5
Default setting.
32L4R9IDISCOVERY supplies 5 V to ARDUINO® Uno V3 connector CN16 (on 5V pin).
32L4R9IDISCOVERY is supplied by 5 V from ARDUINO® Uno V3 connector CN16 (from 5V pin). In that case, JP4 must be placed in the ARD position.
STLK E5V U5V ARD CHGR
STLK E5V U5V ARD CHGR
STLK E5V U5V ARD CHGR
STLK E5V U5V ARD CHGR
STLK E5V U5V ARD CHGR
3 12
3 12
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7.6.3 Supplying 32L4R9IDISCOVERY through ST-LINK/V2-1 USB
To power the board through ST-LINK/V2-1, the USB host (a PC) must be connected with the 32L4R9IDISCOVERY standard Micro-B USB receptacle, via a USB cable. This event starts with the USB enumeration procedure. In its initial phase, the current supply capability of the USB host port is limited to 100 mA. It is enough because only the ST-LINK/V2-1 part of 32L4R9IDISCOVERY draws power at that time. If the solder bridge SB36 is open (default setting), the U11 ST890 power switch is set to the OFF position, which isolates the remainder of the board from the power source. In the next phase of the enumeration procedure, the host PC informs the ST-LINK/V2-1 facility of its capability to supply up to 500 mA current. If the answer is positive, the ST-LINK/V2-1 sets the U11 ST890 switch to On position to supply power to the remainder of the board. If the PC USB port is not capable of supplying up to 500 mA, another power source must be used (Refer to Section 7.6.1 for details).
The ST890 power switch protects the host USB port against current demand exceeding 625 mA, in case a short circuit occurs on the board (the red LED fault LD5 lights on).
32L4R9IDISCOVERY may also be supplied by the STLINK USB power source with no enumeration, such as a USB charger. In this particular case, ST-LINK/V2-1 turns the ST890 power switch on regardless of the enumeration procedure result and passes the power unconditionally to the board. The green LED LD8 lights on whenever the whole board is powered.
7.6.4 Measurement of MCU current consumption
Jumper JP1 allows the consumption of STM32L4R9AI to be measured directly by a built-in MCU current ammeter circuit (MFX_V3, able to measure from 60 nA to 50 mA) or by removing the jumper and replace it by an external ammeter (Refer to Table 9).
To measure the MCU consumption in standby or shutdown modes, MFX_V3 needs to run the software. To wake up MCU from these modes, it is necessary to press the Reset button B1 or to wait a few seconds.
Table 8. JP7: VDD setting
Jumper Setting Description
JP7
Default setting.
VDD is powered by the +3V3 regulator.
VDD is powered by the +1V8 regulator.
1 32
1 32
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VDDA and VDDUSB power inputs from STM32L4R9AI may be connected to two different power sources, +3V3 or VDD_MCU. These power inputs may be included or not in the IDD current measurement of VDD_MCU, depending on the JP3 jumper configurations described in Table 10.
7.6.5 Program or debug when power supply not from ST-LINK/V2-1
To power the board from another connector than CN13, while keeping debug and program features possible, the following power sequence procedure must be respected:
1. Put a jumper on JP4 at the desired location and set SW1 switch to ON position.
2. Connect the corresponding external power source.
3. Check the green LED LD8 is turned on.
4. Connect the PC to ST-LINK/V2-1 USB connector CN13.
Proceeding this way ensures that the enumeration succeeds, thanks to the external power source. If this order is not respected, the board may be powered by VBUS first from ST-LINK, and the following risks may be encountered:
• If more than 500 mA current is needed by the board, PC may be damaged or current is limited by PC. As a consequence, the board is not powered correctly.
• 500 mA is requested at the enumeration, so there is a risk that the request is rejected and enumeration does not succeed if the PC does not provide such current.
Table 9. JP1: IDD_MCU measurement setting
Jumper Setting Description
JP1
Default setting.
A module on the board is designed to measure from 60 nA to 50 mA by using several MOSFETs, and switching automatically depending on the reached value.
STM32L4R9AI is powered by VDD. MCU current measurement is not possible
No jumper on JP1: an ammeter may be connected on pins 2 and 3 to measure STM32L4R9AI current (if there is no ammeter, STM32L4R9AI is not powered).
Table 10. JP3: VDDA and VDDUSB, settings
Jumper Setting Description
JP3
Default setting.
VDDA and VDDUSB power pins of STM32L4R9AI are supplied with +3V3. the IDD measurement does not include their current consumption. USB OTG FS is functional even if JP7 is set on +1V8.
VDDA and VDDUSB power pins of STM32L4R9AI are supplied with VDD_MCU. The IDD measurement includes their current consumption.
3 12
3 12
3 12
1 32
1 32
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7.7 Clock sources
Two clock sources are used by STM32L4R9AI: one on LSE input and another on HSE input.
LSE clock source
The available clock source is X1, 32 kHz crystal for the STM32L4R9AI embedded RTC.
HSE clock source
The second clock source available by default is X2, 16 MHz crystal for the STM32L4R9AI HSE system clock.
Note that another HSE clocking option is available on PCB: MCO output from STLINK MCU to STM32L4R9AI HSE input. Refer to Appendix B: Solder bridges.
7.8 Reset Source
The general reset of 32L4R9IDISCOVERY is active low. The reset sources are listed below:
• Reset button B1
• Embedded ST-LINK/V2-1, SW1 micro-switch set to On (default setting)
• ARDUINO® Uno V3 compatible connector CN16 pin 3
The general reset is connected to following peripheral reset functions:
• STM32L4R9AI MCU reset
• Octo-SPI Flash reset
• MFX_V3 reset
• Camera reset
7.9 Boot configuration
After reset, STM32L4R9AI boots from one of the three different embedded memory locations, depending on BOOT0 and BOOT1 bits:
• Boot from the main Flash memory (MCU internal Flash). This is the default configuration.
• Boot from the system memory ISP (in-system programming).
• Boot from the SRAM1.
On the 32L4R9IDISCOVERY board, the boot configuration of the MCU is controlled by the BOOT0 signal on the PH3 pin.
BOOT0 is by default grounded through the R15 pull-down resistor.
It is possible to set BOOT0 HIGH by removing resistor R15 and populating resistor R16 with a 0 Ω resistor. In this case, take care that PH3 (multiplexed with BOOT0 function) is not used as a GPIO.
Check below Table 11 for other boot modes.
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7.10 Audio codec
A Cirrus codec CS42L51-CNZ U26 connected to the SAI1 interface of STM32L4R9AI offers the possibility to connect a stereo headphone or headset with a mono analog microphone.
The I²C-bus addresses of CS42L51-CNZ are 0x95 and 0x94.
7.11 DFSDM
Two ST-MEMS MP34DT01TR digital microphones U1 and U2 are available on 32L4R9IDISCOVERY. The two microphones are located at a distance of 21 mm from each other. They are connected to the STM32 DFSDM by the PC2 port, generating the clock, and by PB12 port, collecting the PDM interleaved data. These microphones are powered by MIC_VDD (PH2 of STM32L4R9AI).
The two DFSDM clock and data interface signals are also accessible on the STMod+ connector CN1. Before using STMod+, the user must follow the recommendations below:
• If STMod+ pin 17 is used, SB1 (DOUT) must be disconnected first.
• If STMod+ pins 18 or 20 are used, MIC_VDD GPIO (PH2) must be activated at the HIGH level first.
7.12 PSRAM
Two PSRAM footprints are supported on the design, both connected to STM32L4R9AI FMC interface:
• A 16-Mbit asynchronous PSRAM (U5), using up to A19 address, is soldered by default. Reference is IS66WV1M16EBLL-55BLI.
• A 32-Mbit synchronous PSRAM (U6), using up to A20 address, may be used. Reference is IS66WVC2M16ECLL-7010BLI. By default, this PSRAM (U6) is exclusive with the CAMERA function (due to DCMI_D4 function multiplexed with A20 of MCU). In case the camera is used at the same time as
Table 11. Boot modes
nBOOT1 FLASH_OPTR[23]
nBOOT0 FLASH_OPTR[27]
BOOT0 pin PH3
nSWBOOT0 FLASH_OPTR[26]
Boot Memory Space Alias
X X 0 1Main Flash memory is selected as boot area
X 1 X 0Main Flash memory is selected as boot area
0 X 1 1Embedded SRAM1 is selected as boot area
0 0 X 0Embedded SRAM1 is selected as boot area
1 X 1 1System memory is selected as boot area
1 0 X 0System memory is selected as boot area
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PSRAM, it is possible to change two solder bridges to deactivate A20 on PSRAM (Tied to HIGH, usable density 16 Mbits) and DCMI_D4 is used for CAMERA.
Limitation: the two PSRAMs are not compatible with the JP7 setting at +1V8.
Refer to Appendix B: Solder bridges for possible PSRAM configuration change.
7.13 USB OTG FS
32L4R9IDISCOVERY supports USB OTG FS (full-speed) communication via the USB Micro-AB connector (CN9) and USB power switch (U16) connected to VBUS.
A green LED LD6 is lit in one of the following cases:
• Power switch (U16) is On and 32L4R9IDISCOVERY works as a USB host.
• VBUS is powered by another USB host when 32L4R9IDISCOVERY works as a USB device.
The red LED LD7 is lit in case of overcurrent.
7.13.1 32L4R9IDISCOVERY as a USB device
The 32L4R9IDISCOVERY board may work as a USB device on CN9 in any power source configuration. If the board is supplied by an external power source on CN9 (JP4 on (5)U5V), the user must pay attention that power source delivers a sufficient amount of current for the complete 32L4R9IDISCOVERY board setup. Refer to Section 7.6.1 for detailed configuration.
7.13.2 32L4R9IDISCOVERY as a USB host
When the board works as a USB host on CN9, it supplies the 5 V to the USB peripheral using one of the following sources:
• ST-LINK/V2-1 USB Micro-B connector CN13 (jumper put in STLK or CHGR location of JP4)
• an external 5 V source connected to pin 5 of the ARDUINO® Uno V3 connector CN16 (jumper put in ARD location of JP4)
• an external source between 6 V and 9 V, connected to VIN pin of ARDUINO® Uno V3 connector CN16 (jumper put in E5V location of JP4)
The green LED LD8 is lit on to confirm the presence of the 5 V source.
The power switch STMPS2141STR is controlled by the port MFX_GPIO13 to deliver the 5 V power to the USB device connected to the USB connector CN9. When MFX_GPIO13 is pulled down to the ground, the power switch is closed, and the green LED LD6 confirms the 5 V presence for the USB device. The red LED LD7 FAULT is lit when an over-current occurs.
For more details, refer to Section 7.6: Power supply.
Limitation: when the 32L4R9IDISCOVERY board is configured as a USB host, and if a USB High-power device is to be used on CN9, it may be necessary to change default JP4 setting to power the board from another Power source than (1) STLK or (9) CHGR. Take care sufficient amount of current is available from this other power source and refer to Section 7.6.1 for detailed configuration.
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7.14 Octo-SPI Flash memory
A 512-Mbit Octo-SPI user Flash memory (MX25LM51245GXDI00 from MACRONIX) is connected to the OCTOSPIM_P2 interface of STM32L4R9AI. By default, OCTOSPI_RESET of Flash memory has been connected to the general reset of 32L4R9IDISCOVERY.
Refer to Appendix B: Solder bridges for possible Octo-SPI Flash configuration change.
Limitation: the Octo-SPI Flash memory is not compatible with the JP7 setting at +1V8.
7.15 Virtual COM port
The serial interface USART2 is directly available as a Virtual COM port of the PC, connected to the ST-LINK/V2-1 USB connector CN13. Check the application software settings related to the Virtual COM port.
7.16 Buttons and LEDs
The blue button B2 is a four-direction joystick with a selection mode when pressed in the center. The logic state is HIGH when one of the five-position switch (left, right, up, down, selection) is pressed. The center position (Select function) is connected to a wake-up pin of the microcontroller PC13. The other four directions are mapped on MFX GPIOs.
The black button B1 near the display is the Reset button. It is used to reset the board and may wake-up MCU from standby and shutdown IDD measurement modes.
Two user LEDs located near the camera connector CN2 are available for the user (Refer to Figure 4): LD1, LD2, from left to right, with orange and green color respectively. To light on a LED, a low logic state 0 must be written in the corresponding GPIO.
• LD1 (orange) is managed by MFX function
• LD2 (green) is managed by STM32L4R9AI main MCU
Table 12. LD1 and LD2 details
LED MCU port control color
LD1 PB0 (MFX_GPIO0 from MFX) Orange
LD2 PH4 (from main MCU) Green
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Other LEDs are present on the 32L4R9IDISCOVERY. Find below a summary list of all buttons and LEDs, with their description.
Table 13. Buttons and LEDs
Reference Color Function Comment
B1 black RESET For MCU, OCTO-SPI Flash, MFX_V3, CAMERA
B2 blue
SELECT with Wake-up alternate function, PC13
UP MFX_GPIO1, PB1
DOWN MFX_GPIO2, PB2
RIGHT MFX_GPIO3, PB3
LEFT MFX_GPIO4, PB4
LD1 orange USER1 MFX_GPIO0, PB0
LD2 green USER2 PH4
LD3 green ARDUINO PB13
LD4 red/green ST-LINK COM Green during communication
LD5 red ST-LINK USB FAULT Current higher than 625 mA
LD6 green VBUS USB OTG FS Status also available on PA9
LD7 red USB OTG FS OVCR Overcurrent detection, also on MFX_GPIO14, PB14
LD8 green 5V POWER Lit on to confirm +5V presence on board
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8 Connectors
8.1 ARDUINO® Uno V3 connectors CN10, CN11, CN16, and CN17
CN10, CN11, CN16, and CN17 are female connectors compatible with ARDUINO® Uno Revision 3 standard. Most of the shields designed for ARDUINO® Uno V3 fit to 32L4R9IDISCOVERY board.
Table 14. ARDUINO® Uno V3 compatible connectors
Left connectors Right connectors
CN No.Pin No.
Pin Name
MCU Pin
Function FunctionMCU Pin
Pin Name
Pin No.
CN No.
-
-
I2C3_SCL PG7 D15 10
CN10
Digital
I2C3_SDA PG8 D14 9
AVDD - AVDD 8
Ground - GND 7
CN16
Power
1 - - E5V test SPI2_SCK PB13 D13 6
2 IOREF - VDD SPI2_MISO PB14 D12 5
3 NRST NRST ResetTIM3_CH2, SPI2_MOSI
PB15 D11 4
4 3V3 -3V3output
(note 1)TIM5_CH4, SPI2_NSS
PI0 D10 3
5 5V - 5Vinput/output TIM8_CH1N PH13 D9 2
6 GND - Ground - PH15 D8 1
7 GND - Ground -
8 VIN -+6V to +9V power input
(note 2)- PA4 D7 8
CN11
Digital
- TIM3_CH1 PB4 D6 7
CN17
Analog
1 A0 PA7 ADC1_IN12 TIM5_CH2 PA1 D5 6
2 A1 PC4 ADC1_IN13 - PG6 D4 5
3 A2 PC3 ADC1_IN4 TIM15_CH2 PF10 D3 4
4 A3 PB0 ADC1_IN15 - PG11 D2 3
5 A4PA0 or PG8
(note 3)
ADC1_IN5
or
I2C3_SDA
(note 3)
LPUART1_TX PC1 D1 2
6 A5PA5 or PG7
(note 3)
ADC1_IN10
or
I2C3_SCL (note 3)
LPUART1_RX PC0 D0 1
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1. The 3V3 on ARD connector PIN4 is not a power input for 32L4R9IDISCOVERY board, to simplify power architecture.
2. The external voltage applied to pin VIN must be in the range 6 to 9V at 25°C ambient temperature. If a higher voltage is applied to the U15 regulator, it may overheat and could be damaged.
3. By default, pin 5 and pin 6 of CN17 connector are connected to ADC MCU input ports PA0 and PA5 respectively, thanks to configuration of solder bridges: SB33 and SB35 closed, SB32 and SB34 opened. In case it is necessary to connect I2C interface signals on pins 5 and 6 of CN17 instead of ADC inputs, open SB33 and SB35, and close SB32 and SB34.
Before using any ARDUINO® Uno V3 Shield, it is important to refer to Section 7.6.1 for a correct configuration of JP4 and JP5. VREF+, the voltage reference used by the internal DAC and ADC of STM32L4R9AI, has three different power sourcing capabilities:
• from STM32L4R9AI MCU Internal buffer generation (Default). VREFBUF internal ADC / DAC voltage reference is set to 2.5V by default.
• from an external ARDUINO® Uno V3 shield, connected to connector CN10. In that case, SB27 needs to be connected to bring AVDD on VREF+, a 100nF is necessary on C48 and VREFBUF need to be de-activated.
• from a VDDA power supply generated on 32L4R9IDISCOVERY board. VDDA is also connected to VDDUSB of STM32L4R9AI. In that case, mounting a 0 Ω resistor on R14 is necessary. VREFBUF needs to be de-activated. A jumper JP3 also needs to be set as below description.
Warning: When VDDA=VDD_MCU and if VDD_MCU=1.8 V (check JP7 setting), there are a huge leakage current and a risk of damaging MCU I/Os in case 3.3 V logic level is connected to ADC input I/Os of STM32L4R9AI. Also, ADC measurement is not functional in the default configuration.
Caution: The I/Os of STM32 microcontroller are 3V3 compatible instead of 5 V for ARDUINO® Uno V3.
Note: Limitation: the ARDUINO® Uno V3 is not compatible with the JP7 setting at +1V8.
Refer to Appendix B: Solder bridges for possible ARDUINO® Uno V3 configuration change.
Table 15. JP3, VDDA and VDDUSB, settings
Jumper Setting Description
JP3 VDDA Setting
Default setting.
The jumper is on PIN1/2, VDDA get power from +3V3.
The jumper is on PIN2/3, VDDA get power form VDD_MCU
(Refer to the warning below).
1 32
1 32
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8.2 DSI display, backlight and touch panel connector CN4
All the necessary signals to interface with the round DSI display board are available through the DSI V3 connector CN4.
Figure 10. DSI display connector CN4
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Table 16. DSI display connector CN4
Function GPIO port Signal nameCN6 pin number
Signal name GPIO port Function
General ground - GND 1 2 NC - -
Differential DSI clock
- DSI_CK_P 3 4 TOUCH_INT MFX_GPIO9Touch panel
interrupt
Differential DSI clock
- DSI_CK_N 5 6 GND -General ground
reference
General ground - GND 7 8 DSI_D2_P -Not
connected
Differential DSI data 0
- DSI_D0_P 9 10 DSI_D2_N -Not
connected
- DSI_D0_N 11 12 GND -General ground
General ground - GND 13 14 DSI_D3_P -Not
connected
Differential DSI data 1
- DSI_D1_P 15 16 DSI_D3_N -Not
connected
- DSI_D1_N 17 18 GND -General ground
General ground - GND 19 20 NC - -
Power output - +5v 21 22 SPI_CS PH14SPI chip
select
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Refer to Appendix B: Solder bridges for possible DSI display configuration change.
Power output - +5v 23 24 SPI2_SCK PB13 SPI clock
- - NC 25 26 SPI2_MOSIp PB15 SPI data
SM3321 ground - BLGND 27 28 SPI_DCX PB14SPI
data/control
SM3321 ground - BLGND 29 30 NC - -
- - NC 31 32 RESERVED - -
- - NC 33 34 NC - -
- - NC 35 36 3V3 -3V3 voltage reference
- - NC 37 38 VDDIO -IOVDD
reference
- - NC 39 40 I2C1_SDA PG13Touch panel
I2C data
- - NC 41 42 NC - -
DSI_SWIRE control output
PA8 DSI_SWIRE 43 44 I2C1_SCL PB6Touch panel
I2C clock
- - NC 45 46 NC - -
- - NC 47 48 NC - -
DSI tearing effect input
PF11 TE 49 50 NC - -
- - NC 51 52 NC - -
DSI Backlight control output
PB1 DSI_BL_CTRL 53 54 NC - -
- - NC 55 56 NC - -
DSI and Touch panel Reset
output
MFX_
GPIO10DSI_RESET 57 58 NC - -
- - NC 59 60 1V8 -1.8V voltage
reference
General ground - GND 61 62 GND -General ground
General ground - GND 63 64 GND -General ground
Table 16. DSI display connector CN4 (continued)
Function GPIO port Signal nameCN6 pin number
Signal name GPIO port Function
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8.2.1 DSI AMOLED display
Warning: Permanent image sticking may occur if AMOLED displays the same image for an extended period of time.
The DSI display is based on a round AMOLED touch-sensitive panel of 1.2 inches and 390x390 pixels. The display module reference is IEG1120TB103GF-001 from Govisionox Optoelectronics. It displays up to 16M colors. The round DSI display module board reference is MB1314. The DSI interface of MB1314 is only one data-lane width and a clock lane, but the 32L4R9IDISCOVERY board supports DSI displays with up to two data-lane widths. The DSI_V3 connector interface also enables the use of dedicated low power modes of display, thanks to the available SPI2 interface (MB1314 does not use it). It is also possible to use some of the USART3 signals to control a low power mode (SB6 and SB8 are respectively exclusive with SB13 and SB7).
The DSI_TE signal PF11 is used as an input of the main microcontroller connected to the display signal TE (tearing effect). DSI_TE signal is used to synchronize the refresh of the display memory by the microcontroller with the display scan, this to avoid visible artifacts.
DSI_3V3_PWRON signal (MFX_GPIO8, low level active) controls the 3V3 level power supplies provided on the DSI_V3 connector interface. DSI_1V8_PWRON signal (MFX_aGPIO2) controls the 1V8 level power supplies provided on the DSI_V3 connector interface. Both must be used to enable or disable the display, TP and PSRAM. They allow disconnecting those peripherals when doing low power IDD measurement.
DSI_RESET signal (MFX_GPIO10, low level active) controls the reset for the display and the Touch panel.
An optional DSI_SWIRE signal PA8 offers the additional possibility to control the voltage for any display supply during initialization (not used by MB1314 by default). PA8 is exclusive with another function from 32L4R9IDISCOVERY board: CAMERA clock Interface (MCO), which is the default setting.
8.2.2 Backlight and OLED power supplies generation
This function is handled by the power driver circuit SM3321, included on the MB1314 DSI display Board. SM3321 is a switching mode boost converter supplied by the 3V3 rail of the DSI_V3 connector interface. SM3321 is controlled either by the AMOLED driver circuit itself (default configuration), either by DSI_BL_CTRL (PB1) from the main MCU, either from the DSI_SWIRE (PA8) interface from main MCU. SM3321 provides all necessary voltage references to AMOLED display.
If used, the signal DSI_BL_CTRL switches on the backlight with a HIGH level. It is possible to dim the backlight intensity by applying a low-frequency PWM signal to DSI_BL_CTRL (1 to 10 kHz typically).
8.2.3 Touch panel
The touch panel is a capacitive touch panel using an I2C interface. The touch panel IC reference is FT3267 and is located on the MB1314 board. The FT3267 I2C1 default addresses are 0x71 and 0x70.
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Touch panel interrupt output DSI_TOUCH_INT is connected to MFX_GPIO9. It is used as a touch panel detection indication. MFX_GPIO10 resets capacitive touch panel and DSI display.
8.3 USB OTG FS connector CN9
A USB OTG full speed communication link is available at USB Micro AB receptacle connector CN9. Micro AB receptacle enables USB host and USB Device features.
MFX_GPIO13 is used to enable onboard VBUS power when in host mode.
Limitation: when the 32L4R9IDISCOVERY board is configured as a USB host, and if a USB High-power device is to be used on CN9, it may be necessary to change default JP4 setting to power the board from another Power source than (1) STLK or (9) CHGR. Take care sufficient amount of current is available from this other Power source and refer to Section 7.6.1 for detailed configuration.
Figure 11. USB OTG FS Micro-AB connector CN9
Table 17. USB OTG FS Micro-AB connector CN9
Pin number Description Pin number Description
1 VBUS (PA9) 4 ID (PA10)
2 DM (PA11) 5 GND
3 DP (PA12) - -
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8.4 ST-LINK/V2-1 USB Micro-B connector CN13
The USB connector CN13 is used to connect the embedded ST-LINK/V2-1 to the PC.
Figure 12. USB Micro-B connector CN13
8.5 microSD card connector CN6
microSD cards with 4 Gbytes or more capacity are inserted in the receptacle CN6. Four data bits of the SDMMC1 interface, CLK and CMD signals of the STM32L4R9AI are used to communicate with the microSD card at +3V3 only. The card insertion is detected by the MFX_GPIO5: when a microSD card is inserted, the logic level is 0, otherwise, it is 1.
Table 18. USB Micro-B connector CN13
Pin number Description Pin number Description
1 VBUS (power) 4 GND
2 DM 5,6 Shield
3 DP - -
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Figure 13. microSD connector CN6 (top view)
Note: Limitation: the microSD is not compatible with the JP7 setting at +1V8.
8.6 STMod+ connector CN1
The standard 20-pin STMod+ connector is available on 32L4R9IDISCOVERY board to increase compatibility with external boards and modules from the Ecosystem of microcontrollers. By default, it is designed to support an ST dedicated fanout board, which allows connecting different modules or board extensions from different manufacturers. fanout board also embeds a 3V3 regulator and I2C level shifters. Schematics of the fanout
Table 19. microSD connector CN6
Pin number
DescriptionPin
numberDescription
1 SDMMC1_D2 (PC10) 6 GND
2 SDMMC1_D3 (PC11) 7 SDMMC1_D0 (PC8)
3 SDMMC1_CMD (PD2) 8 SDMMC1_D1 (PC9)
4 VDD (+3V3) 9 µSD_DETECT (MFX_GPIO5)
5 SDMMC1_CLK (PC12) 10-11-12 GND (casing)
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board is available in Figure 35.: Fanout board (MB1280). For more detailed information, refer to the ST fanout board user manual and to relevant datasheets of associated modules.
For details about STMod+ interface, refer to STMod+ connector interface specification.
Figure 14. STMod+ connector CN1
In order to be able to support the selection of SPI or UART functions connection on STMod+ by software, a quad SPDT switch has been added. It is controlled by two GPIOs from the MFX circuit and enables MCU signal selection for pins 2, 3 and 4. By default, STMod+ connector is selected, and STMOD+_SEL_0 and STMOD+_SEL_1 of MFX circuit are set to support one of the STMod+ interface configuration.
Table 20. STMod+ connector CN1
Pin number
DescriptionPin
numberDescription
1 SPI2_CS/USART3_CTS (PA6) 11 INT (PC6)
2 SPI2_MOSIp/USART3_TXD (PB15/PB10) 12 RST (PI7)
3 SPI2_MISOp/USART3_RXD (PB14/PB11) 13 ADC (PA4)
4 SPI2_SCK/USART3_RTS (PB13/PA15) 14 PWM (PA5)
5 GND 15 +5V
6 +5V 16 GND
7 I2C3_SCL (PG7) 17 GPIO (PB12)
8 SPI2_MOSIs (PI3) 18 GPIO (PC2)
9 SPI2_MISOs (PI2) 19 GPIO (PC7)
10 I2C3_SDA (PG8) 20 GPIO (PC2)
MSv46075V1Front view
12345678910
11121314151617181920
Table 21. Quad SPDT switch configuration
Pin number SPI UART / SPI (1) UART
STMOD+_SEL_0 (GPIO6 of MFX_V3) 0 1 1
STMOD+_SEL_1 (GPIO7 of MFX_V3) 0 0 1
STMod+ pin 1 (directly connected to PA6) SPI_CS SPI_CS USART3_CTS
STMod+ pin 2 SPI2_MOSIp USART3_TX USART3_TX
STMod+ pin 3 SPI2_MISOp USART3_RX USART3_RX
STMod+ pin 4 SPI2_SCK SPI2_SCK USART3_RTS
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Take care that this connector shares many GPIOs with other functions on the Board: for more detailed information refer to Appendix A: GPIO assignment and sharing.
In addition, to have a quick look at STMod+ GPIO sharing and multiplexing, and to get a quick view on other alternate functions available on its pins, refer to Appendix C: STMod+ GPIO sharing and multiplexing.
Limitation: The STMod+ interface is not compatible with the JP7 setting at +1V8.
Limitation: if STMod+ pin 17 is used, take care to disconnect SB1 first. If STMod+ pin 18 or 20 is used, activate MIC_VDD GPIO (PH2) at a HIGH level first.
8.7 PMOD connector CN3
The standard 12-pin PMOD connector is available on the STM32L4R9I-DISCO Discovery board to support low frequency, low I/O pin count peripheral modules. The PMOD interface which has been implemented on the STM32L4R9I-DISCO Discovery board is compatible with the PMOD type 2A & 4A I/O signal assignment convention.
Figure 15. PMOD connector CN3
In order to be able to support the selection of SPI or UART functions connection on PMOD by software, a quad SPDT switch has been added on board. It is controlled by two GPIOs from MFX_V3 circuit and enables MCU signal choice for pins 2, 3 and 4: refer to Table 21 STMod+ chapter for switch description details (pin 1, 2, 3 and 4 of PMOD are common with STMod+).
1. UART / SPI defines default configuration for STMOD+_SEL_0 and STMOD+_SEL_1.
Table 22. PMOD connector CN3
Pin number Description Pin number Description
1 SPI2_CS/USART3_CTS (PA6) 7 INT (PC6)
2 SPI2_MOSIp/USART3_TXD (PB15/PB10) 8 RESET (PI7)
3 SPI2_MISOp/USART3_RXD (PB14/PB11) 9 NA
4 SPI2_SCK/USART3_RTS (PB13/PA15) 10 NA
5 GND 11 GND
6 3V3 12 3V3
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By default, the STMod+ connector is selected, so STMOD+_SEL_0 and STMOD+_SEL_1 need to be modified to support one of the PMOD interface configurations. Also, PMOD shares GPIOs with other functions of the Board: for more detailed information refer to Appendix A: GPIO assignment and sharing.
Note: Limitation: the PMOD interface is not compatible with the JP7 setting at +1V8.
8.8 Camera module connector CN2
An 8-bit camera module function is supported thanks to the 30-pin dedicated ZIF connector CN2. The camera module reference is STM32F4DIS-CAM. This module has to be connected with caution before powering on the STM32L4R9I-DISCO Discovery board. The camera module I²C addresses are 0x61 and 0x60. The camera is usable by default, but one must take care of GPIO sharing and multiplexing with other function, in order to program the good configuration. For more detailed information refer to Appendix A: GPIO assignment and sharing.
Note: Limitation: the camera is not compatible with the JP7 setting at +1V8.
Figure 16. Camera module connector CN2
Table 23. Camera module connector CN2
Pin number Description Pin number Description
1 GND 16 GND
2 NC 17 DCMI_HSYNC (PA4)
3 NC 18 NC
4 DCMI_D0 (PC6) 19 DCMI_VSYNC (PI5)
5 DCMI_D1 (PC7) 20 VDD
6 DCMI_D2 (PH11) 21 DCMI_CLK (PA8)
7 DCMI_D3 (PH12) 22 NC
8 DCMI_D4 (PE4) 23 GND
9 DCMI_D5 (PI4) 24 NC
10 DCMI_D6 (PB8) 25 DCMI_PWR_EN (MFX_GPIO12)
11 DCMI_D7 (PI7) 26 DCMI_NRST (NRST from MCU)
12 NC 27 I2C1_SDA (PG13)
13 NC 28 I2C1_SCL (PB6)
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8.9 TAG connector CN8
The TAG connector footprint CN8 is used to connect STM32L4R9AI microcontroller for programming or debugging the board.
Figure 17. TAG connector CN8
8.10 SWD header CN5
The 6-pin SWD header is used to program or debug an MCU in an external application board using a dedicated cable connected to it. To use this SWD header interface, pins 2 and 3 of JP10 need to be connected with a jumper. Furthermore, SW1 must be set in the OFF position while R24 and R31 need to be disconnected.
By default, STLINK/V2-1 is used to program or debug onboard MCU. Pin1 and 2 of JP10 are connected, SW1 is in ON position, R24 and R31 are connected.
14 GND 29 GND
15 DCMI_PIXCK (PH5) 30 VDD
Table 23. Camera module connector CN2 (continued)
Pin number Description Pin number Description
Table 24. TAG connector CN8
Pin number Description Pin number Description
1 VDD 10 NRST (PH3, RESET#)
2 SWDIO (PA13) 9 NA
3 GND 8 NA
4 SWCLK (PA14) 7 NA
5 GND 6 SWO (PB3)
MSv46078V1
Table 25. SWD header CN5
Pin number Description Pin number Description
1 VDD 4 SWDIO (PA13)
2 SWCLK (PA14) 5 NRST
3 GND 6 SWO (PB3)
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8.11 EXT_I2C connector CN7
The EXT_I2C connector socket is used to connect external modules to the I2C1 interface or to monitor the I2C1 interface.
Figure 18. EXT_I2C connector CN7
As the I2C1 is available for external use, it is important to note that those following I2C1 applications and addresses are already used on-board:
Depending on the I2C module plugged into CN7, I2C1 could even be used up to Fast mode + (1 MHz) if the audio codec is set to OFF mode with AUDIO_RST Low.
8.12 Stereo headset and headphone jack CN12
A stereo headphone or a stereo headset with an analog microphone is pluggable into the 3.5 mm standard jack socket CN12.
Table 26. EXT_I2C connector CN7
Pin number Description Pin number Description
1 I2C1_SDA (PG13) 5 +3V3
2 NC 6 NC
3 I2C1_SCL (PB6) 7 GND
4 EXT_RESET (MFX_GPIO11) 8 NC
Table 27. I2C1 onboard addresses
ApplicationR/W I2C address
I2C max. speed Comment
DSI display Touch Panel 0x71/0x70 400 kHz Default I2C address
Audio codec 0x95/0x94 100 kHz Default I2C address
CAMERA 0x61/0x60 400 kHz For STM32F4DIS-CAM Module
MFX_V3 0x85/0x84 400 kHz Default I2C address
MSv46079V1
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Figure 19. Stereo headset with microphone jack CN12
If a headset is plugged into CN12, the bias of the microphone is driven by the output MICBIAS1 of the codec and the analog audio enters into the codec by the pin AIN3A.
Table 28. Audio jack connector CN12
Pin number Description Stereo headset with microphone pinning
6 OUT_Left SPK_L (32 ohms typ.)
4 OUT_Right SPK_R (32 ohms typ.)
3 GND GND
2 IN_Analog Microphone
5 NCNA
1 NC
MSv46080V13
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Appendix A GPIO assignment and sharing
Table 29. 32L4R9IDISCOVERY GPIO assignment and sharing
Pin GPIO port GPIO primary interface STMod+ interface PMOD interface ARDUINO interface
K3 PA0 - - - ARD_A4 (ADC1_IN5)
M1 PA1 - - - ARD_D5 (TIM5_CH2)
N1 PA2 STLINK_USART2_TX - - -
M2 PA3 STLINK_USART2_RX - - -
N2 PA4 DCMI_HSYNC/DE STMod+_ADC (ADC_1_IN9) - ARD_D7
L3 PA5 - STMod+_PWM (TIM2_CH1) - ARD_A5 (ADC1_IN10)
L4 PA6 -STMod+_SPI2_CS //
STMod+_USART3_CTS (NU)
PMOD_SPI2_CS // PMOD_USART3_CTS
(NU)-
M4 PA7 - - - ARD_A0 (ADC1_IN12)
E11 PA8DCMI_CLK (MC0) //
DSI_SWIRE (NU) - - -
E12 PA9 VBUS - - -
D11 PA10 ID - - -
E13 PA11 DM - - -
D13 PA12 DP - - -
A11 PA13 JTMS/SWDIO - - -
A10 PA14 JTCK/SWCLK - - -
A9 PA15 - STMod+_USART3_RTS (NU) PMOD_USART3_RTS (NU) -
N4 PB0 DSI_USART3_CK (NU) - - ARD_A3 (ADC1_IN15)
L5 PB1DSI_BL_CTRL (NU) //
DSI_SWIRE (NU) - - -
N5 PB2 MFX_WAKEUP_OUT - - -
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A6 PB3 JTDO/TRACESWO - - -
A5 PB4 - - - ARD_D6 (TIM3_CH1)
B5 PB5 SAI1_SD_B - - -
C5 PB6 I2C1_SCL - - -
D5 PB7 PSRAM_NL (ADV) - - -
C4 PB8 DCMI_D6 - - -
D4 PB9 SAI1_FS_A - - -
N9 PB10 DSI_USART3_TX (NU) STMod+_USART3_TX PMOD_USART3_TX -
H7 PB11 - STMod+_USART3_RX PMOD_USART3_RX -
N12 PB12 DFSDM_1_DATIN1 STMod+_GPIO (NU) - -
N13 PB13 DSI_SPI2_SCK (NU) STMod+_SPI2_SCK PMOD_SPI2_SCK ARD_D13 (SPI2_SCK)
M12 PB14 DSI_SPI_D/CX (NU) STMod+_SPI2_MISOp (NU) PMOD_SPI2_MISO (NU) ARD_D12 (SPI2_MISO)
L10 PB15 DSI_SPI2_MOSI (NU) STMod+_SPI2_MOSIp (NU) PMOD_SPI2_MOSI (NU) ARD_D11 (SPI2_MOSI_TIM3_CH2)
J2 PC0 - - - ARD_D0 (LPUART1_RX)
J3 PC1 - - - ARD_D1 (LPUART1_TX)
J4 PC2 DFSDM_1_CKOUT STMod+_GPIO (NU) - -
K1 PC3 - - - ARD_A2 (ADC1_IN4)
K4 PC4 - - - ARD_A1 (ADC1_IN13)
F11 PC6 DCMI_D0 STMod+_INT PMOD_INT -
G11 PC7 DCMI_D1 STMod+_GPIO - -
F9 PC8 SDMMC_1_D0 - - -
G13 PC9 SDMMC_1_D1 - - -
D9 PC10 SDMMC_1_D2 - - -
E9 PC11 SDMMC_1_D3 - - -
F8 PC12 SDMMC_1_CK - - -
Table 29. 32L4R9IDISCOVERY GPIO assignment and sharing (continued)
Pin GPIO port GPIO primary interface STMod+ interface PMOD interface ARDUINO interface
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E1 PC13 JOY_SEL // WAKEUP - - -
F1 PC14-OSC32_IN PC14-OSC32_IN - - -
G1PC15-
OSC32_OUTPC15-OSC32_OUT - - -
B8 PD0 PSRAM_D2 - - -
C8 PD1 PSRAM_D3 - - -
D8 PD2 SDMMC_1_CMD - - -
E8 PD3 PSRAM_CLK - - -
C7 PD4 PSRAM_NOE - - -
D7 PD5 PSRAM_NWE - - -
E7 PD6 PSRAM_NWAIT - - -
F7 PD7 PSRAM_NE1 - - -
K10 PD8 PSRAM_D13 - - -
K9 PD9 PSRAM_D14 - - -
J10 PD10 PSRAM_D15 - - -
J9 PD11 PSRAM_A16 - - -
J8 PD12 PSRAM_A17 - - -
H8 PD13 PSRAM_A18 - - -
H11 PD14 PSRAM_D0 - - -
H10 PD15 PSRAM_D1 - - -
A4 PE0 PSRAM_NBL0 - - -
B4 PE1 PSRAM_NBL1 - - -
D3 PE2 SAI1_MCLK_A - - -
D2 PE3 PSRAM_A19 - - -
D1 PE4 DCMI_D4 // PSRAM_A20 (NU) - - -
Table 29. 32L4R9IDISCOVERY GPIO assignment and sharing (continued)
Pin GPIO port GPIO primary interface STMod+ interface PMOD interface ARDUINO interface
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E4 PE5 SAI1_SCK_A - - -
E3 PE6 SAI1_SD_A - - -
L7 PE7 PSRAM_D4 - - -
K6 PE8 PSRAM_D5 - - -
J6 PE9 PSRAM_D6 - - -
H6 PE10 PSRAM_D7 - - -
N8 PE11 PSRAM_D8 - - -
M8 PE12 PSRAM_D9 - - -
L8 PE13 PSRAM_D10 - - -
K7 PE14 PSRAM_D11 - - -
J7 PE15 PSRAM_D12 - - -
F5 PF0 PSRAM_A0 - - -
F4 PF1 PSRAM_A1 - - -
F3 PF2 PSRAM_A2 - - -
G3 PF3 PSRAM_A3 - - -
G4 PF4 PSRAM_A4 - - -
G5 PF5 PSRAM_A5 - - -
H4 PF10 - - - ARD_D3 (TIM15_CH2)
M5 PF11 DSI_TE - - -
N6 PF12 PSRAM_A6 - - -
M6 PF13 PSRAM_A7 - - -
L6 PF14 PSRAM_A8 - - -
K5 PF15 PSRAM_A9 - - -
J5 PG0 PSRAM_A10 - - -
H5 PG1 PSRAM_A11 - - -
Table 29. 32L4R9IDISCOVERY GPIO assignment and sharing (continued)
Pin GPIO port GPIO primary interface STMod+ interface PMOD interface ARDUINO interface
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H9 PG2 PSRAM_A12 - - -
G8 PG3 PSRAM_A13 - - -
G7 PG4 PSRAM_A14 - - -
G9 PG5 PSRAM_A15 - - -
G12 PG6 - - - ARD_D4
G10 PG7 - STMod+_I2C3_SCL - ARD_D15 (I2C3_SCL)
F10 PG8 - STMod+_I2C3_SDA - ARD_D14 (I2C3_SDA)
B7 PG9 OCTOSPIM_P2_IO6 - - -
D6 PG10 OCTOSPIM_P2_IO7 - - -
E6 PG11 - - - ARD_D2
F6 PG12 OCTOSPIM_P2_NCS - - -
G6 PG13 I2C1_SDA - - -
C6 PG15 OCTOSPIM_P2_DQS - - -
H1 PH0-OSC_IN PH0-OSC_IN - - -
J1 PH1-OSC_OUT PH1-OSC_OUT - - -
A2 PH2 MIC_VDD - - -
E5 PH3-BOOT0 PH3-BOOT0 - - -
K8 PH4 LED_GREEN - - -
L9 PH5 DCMI_PIXCLK/PDCK - - -
N10 PH8 OCTOSPIM_P2_IO3 - - -
C11 PH9 OCTOSPIM_P2_IO4 - - -
M9 PH10 OCTOSPIM_P2_IO5 - - -
M10 PH11 DCMI_D2 - - -
B13 PH12 DCMI_D3 - - -
C9 PH13 - - - ARD_D9 (TIM8_CH1N)
Table 29. 32L4R9IDISCOVERY GPIO assignment and sharing (continued)
Pin GPIO port GPIO primary interface STMod+ interface PMOD interface ARDUINO interface
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A13 PH14 DSI_SPI_USART_CS (NU) - - -
B12 PH15 - - - ARD_D8
A12 PI0 - - - ARD_D10 (SPI2_NSS_TIM5_CH4)
B11 PI1 MFX_INT_IN - - -
B10 PI2 - STMod+_SPI2_MISOs - -
C10 PI3 - STMod+_SPI2_MOSIs - -
D10 PI4 DCMI_D5 - - -
E10 PI5 DCMI_VSYNC/RDY - - -
B9 PI6 OCTOSPIM_P2_CLK - - -
B2 PI7 DCMI_D7 STMod+_RST PMOD_RST -
B1 PI9 OCTOSPIM_P2_IO2 - - -
A1 PI10 OCTOSPIM_P2_IO1 - - -
C3 PI11 OCTOSPIM_P2_IO0 - - -
Legend:
or = Indicate shared or exclusive functions or interfaces on a GPIO port
(NU) = Function mode which is not usable by default
// = Highlights two exclusive functions available for one interface
(xxx) = Name of the STM32L4R9AI GPIO Alternate function used on this interface
Table 29. 32L4R9IDISCOVERY GPIO assignment and sharing (continued)
Pin GPIO port GPIO primary interface STMod+ interface PMOD interface ARDUINO interface
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Table 30. MFX_V3 GPIO assignment (LQFP48)
Pin GPIO port Implemented functions Application function name
10 PA0-WKUP - -
11 PA1 MFX_aGPIO1 MFX_aGPIO1
12 PA2 MFX_aGPIO2 DSI_1V8_PWRON
13 PA3 - -
14 PA4 Reserved DAC_Out1 SPARE
15 PA5 MFX_GPIO5 µSD_DETECT
16 PA6 MFX_GPIO6 STMOD+_SEL_0
17 PA7 MFX_GPIO7 STMOD+_SEL_1
29 PA8 MFX_GPIO8 DSI_3V3_PWRON
30 PA9 MFX_GPIO9 DSI_TOUCH_INT
31 PA10 MFX_GPIO10 DSI_RESET
32 PA11 MFX_GPIO11 EXT_RESET
33 PA12 MFX_GPIO12 DCMI_PWR_EN
34 PA13 MFX_SWDIO MFX_SWDIO
37 PA14 MFX_SWCLK MFX_SWCLK
38 PA15 MFX_IDD_SH3 SH3
18 PB0 MFX_GPIO0 LED_ORANGE
19 PB1 MFX_GPIO1 JOY_UP
20 PB2 MFX_GPIO2 JOY_DOWN
39 PB3 MFX_GPIO3 JOY_RIGHT
40 PB4 MFX_GPIO4 JOY_LEFT
41 PB5 MFX_IDD_VDD_MCU IDD_VDD_MCU
42 PB6 MFX_I2C_SCL I2C1_SCL from main MCU
43 PB7 MFX_I2C_SDA I2C1_SDA from main MCU
45 PB8 MFX_I2C_ADDR I2C_ADDR (external pull-down)
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46 PB9 MFX_IRQ_OUT MFX_IRQ_OUT
21 PB10 - -
22 PB11 - -
25 PB12 MFX_IDD_MEAS IDD_MEAS
26 PB13 MFX_GPIO13 USB_OTGFS_PPWR_EN
27 PB14 MFX_GPIO14 USB_OVER
28 PB15 MFX_GPIO15 AUDIO_Codec_RESET
2 PC13-ANTI_TAMP MFX_WAKEUP MFX_WAKEUP
3 PC14-OSC32_IN MFX_IDD_CAL CAL
4 PC15-OSC32_OUT MFX_IDD_SH0 SH0
5 PH0-OSC_IN MFX_IDD_SH1 SH1
6 PH1-OSC_OUT MFX_IDD_SH2 SH2
Table 30. MFX_V3 GPIO assignment (LQFP48) (continued)
Pin GPIO port Implemented functions Application function name
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Appendix B Solder bridges
Following Table 31 describes each solder bridge. The default state is indicated in bold. ON state means a 0-ohm resistor is soldered. OFF state means SBxx is open.
Table 31. 32L4R9IDISCOVERY solder bridges
Solder bridges State Description
SB2 (ARD_D13 Green LED)ON Enables ARD Green LED control by ARD_D13
OFF Disables ARD Green LED
SB27 (ARD_AVDD on VREF+)ON Connects VREF+ from MCU to ARD_AVDD
OFF ARD_AVDD not connected
SB32, SB34 (I2C3 on ARD_A4/A5) OFF I2C3 disconnected from ARD_A4/A5, exclusive with SB33, SB35
SB33, SB35 (ADCs on ARD_A4/A5) ON ADCs inputs connected to ARD_A4/A5, exclusive with SB32, SB34
SB7, SB13 (USART3 on DSI display) OFF Disconnects USART3_CK/TX from pins 24/26 of DSI V3 connector, exclusive with SB6 and SB8
SB6, SB8 (SPI2 on DSI display) ON Connects SPI2_SCK/MOSI to pins 24/26 of DSI V3 connector, exclusive with SB7 and SB13
SB23 (VDD on OCTOSPI Flash)ON Connects OCTOSPI Flash power rails to VDD
OFF Disconnects VDD from OCTOSPI Flash
SB25 (OCTOSPI_ECS)ON ECS function active (need external pull-up)
OFF ECS function not active (no external pull-up)
SB24 (OCTOSPI_RESET)ON OCTOSPI Flash Reset is connected to General Reset of Board
OFF OCTOSPI Flash Reset not connected to General Reset of Board
SB1 (DFSDM_1_DATIN1)ON PB12 (DFSDM_1_DATIN1) is connected to Digital Microphones by default
OFF PB12 (DFSDM_1_DATIN1) is usable by STMod+ on pin 17
SB3 (RESERVED) ON Reserved, but removable if necessary (PSRAM_A20 to U6)
SB4 (RESERVED) OFF Reserved, do not modify (PSRAM_A20 to VDD)
SB16, SB17, SB18, SB19, SB20, SB21 (RESERVED)
OFF Reserved, (STMod+/PMOD)
SB36 (RESERVED) OFF Reserved, (STLINK)
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SB5 (RESERVED) ON Reserved, do not modify (PSRAM)
SB14 (RESERVED) ON Reserved, do not modify (STLINK)
SB9, SB10, SB11, SB12
(RESERVED)ON Reserved, do not modify (display)
SB15 (RESERVED) ON Reserved, (USB OTG FS)
SB30 (RESERVED) ON Reserved, (Audio codec VL)
SB29 (RESERVED) ON Reserved, (Audio codec VD)
SB31 (RESERVED) ON Reserved, do not modify (MFX, IDD_VDD_MCU)
SB22 (RESERVED) ON Reserved, do not modify (STMod+/PMOD)
SB26 (RESERVED) ON Reserved, (OCTOSPI Flash)
SB37 (RESERVED) ON Reserved, (EXT_I2C)
SB28 (RESERVED) OFF Reserved, (MCO to HSE input)
SB38 (RESERVED) ON Reserved, (for U5 PSRAM)
SB39 (RESERVED) OFF Reserved, (for U6 PSRAM)
Table 31. 32L4R9IDISCOVERY solder bridges (continued)
Solder bridges State Description
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Appendix C STMod+ GPIO sharing and multiplexing
Table 32. STMod+ GPIO sharing and multiplexing
Shared or exclusive functions STMod+(1) Shared or exclusive functions
DSI ARD PMOD Some other Alternate Functions(2) Basic SB(3) Port Pins Port SB Basic Some other Alternate Functions(2) PMOD ARD CAMDigMic
- -CTSS3 /
CSN2LCTS1 / T3.1 / T16.1 / [OP2_I+ / AD1.11]
CTSS3 / CSN2
- PA6 1
-
11 PC6 - INT SA2.MCKA / DF1.C3 / T3.1 / T8.1 INT - D0 -
TXS3MOSI2 MOSI2/T15.2
TXS3MOSI2
LRX1 / T2.3 / SCL2 / SCL4 / DF1.D7 / [CP1_O]DF1.C2 / T1.3N / T8.3N / T15.2 / SA2.SDA / RTC_RFIN
TXS3MOSI2
2021
PB10PB15
2 12 PI7 - RST T8.3 RST - D7 -
DC/X MISO2RXS3MISO2
SDA2 / SDA4 / LTX1 / DF1.C7 / T2.4 / [CP2.O]SA2.MCKA / SDA2 / RTSS3 / DF1.D2 / T1.2N / T8.2N / T15.1
RXS3MISO2
1617
PB11PB14
3 13 PA4 - ADC LT2.O / [AD1.9 / DAC1.1] - D7 HSYNC -
SCK2 SCK2RTSS3SCK2
SA2.FSB / RXS2 / RTS4 / T2.1 / T2.ESCL2 / CTSS3 / LCTS1 / DF1.C1 / T1.1N / T15.1N / TXC2 / SA2.SCKA
RTSS3SCK2
1819
PA15PB13
4 14 PA5 - PWM SCK1 / T2.1 / T8.1N / [AD1.10 / DAC1.2] - A5 - -
- - - - GND - GND 5 15 +5V - +5V - - - - -
- - - - +5V - +5V 6 16 GND - GND - - - - -
- SCL3 - DF1.CO / LTX1 SCL3 - PG7 7 17 PB12 - GPIONSS2 / SA2.FSA / SMBA2 / CKS3 / LRTS1 / RXC2 /
DF1.D1- - - DF1.D1
- - - T8.E MOSI2 - PI3 8 18 PC2* - GPIO DF1.CO / MISO2 / LT1.2 / [AD1.3] - - - DF1.CO
- - - T8.4 MISO2 - PI2 9 19 PC7 - GPIO T3.2 / T8.2 / DF1.D3 - - D1 -
- SDA3 - LRX1 SDA3 - PG8 10 20 PC2* - GPIO same as pin 18 - - - DF1.CO
Legend:
= DSI = Arduino Uno = Pmod = Alternate Functions = STMod+ = CAM = Digital Microphone = Supply = GND
1. This Table 32 gives description of the signals available on the STMod+ connector It also shows which signal is shared with other board connector or function In some boards, Solder bridges (SB) are present to manually select which function is wired by default (but here, refer to point (3) below) Analog signals are in brackets [xxx] The I2C bus on pins 7 / 10 might be shared with built-in discovery slave devices. Check the slave address of your device when adding it to the bus.
2. RTSS3 stands for USART3_RTS AD1.3 stands for ADC_1_IN3 T1.3N stands for TIM_1_CH3N DAC1.1 stands for DAC_1_OUT1 MOSI2 stands for SPI2_MOSI RST stands for RESET INT stands for INTERRUPT DF1.C3 stands for DFSM1_CKIN3 SDA3 stands for I2C3_SDA LTX1 stands for LP_UART1TX LT2.O stands for LPTIM2_OUT NSS2 stands for SPI2_NSS RXC1 stands for CAN_1_RX SA2.SCKA stands for SAI2_SCLK_A
3. The solder bridges (SB) are available on PCB to select chosen Port, but they are not used by default: Instead of SB, an embedded SPDT quad switch is used to select Port. It is controlled by 2 GPIOs from the MFX_V3 Expander (STMOD+_SEL_0 and _1), refer to Table 33 description below (Bold text is default configuration to support mikroBUS™ modules using MB1280 fan-out board)
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Table 33. SPDT quad switch
SPI UART / SPI UART
STMOD+_SEL_0 0 1 1 STMOD+_SEL_0 is GPIO6 of MFX_V3
STMOD+_SEL_1 0 0 1 STMOD+_SEL_1 is GPIO7 of MFX_V3
pin 1 CSN2 CSN2 CTS3 pin 1 is connected directly to PA6
pin 2 MOSI2 TXS3 TXS3
pin 3 MISO2 RXS3 RXS3
pin 4 SCK2 SCK2 RTSS3
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UM2271 Schematics
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Appendix D Schematics
This section provides design schematics for the 32L4R9IDISCOVERY mainboard and design schematics of the round DSI display and fanout boards:
Appendix D contains the schematics diagrams listed below:
• Figure 20: 32L4R9IDISCOVERY board interconnections (MB1311C)
• Figure 21: 32L4R9IDISCOVERY power
• Figure 22: 32L4R9IDISCOVERY ARDUINO® Uno V3 connectors
• Figure 23: 32L4R9IDISCOVERY ST-LINK/V2-1
• Figure 24: 32L4R9IDISCOVERY Octo-SPI Flash memory
• Figure 25: 32L4R9IDISCOVERY peripherals
• Figure 26: 32L4R9IDISCOVERY USB OTG FS
• Figure 27: 32L4R9IDISCOVERY Round DSI display interface
• Figure 28: 32L4R9IDISCOVERY IDD measurement and Multi Function eXpander
• Figure 29: 32L4R9IDISCOVERY microcontroller
• Figure 30: 32L4R9IDISCOVERY PSRAM
• Figure 31: 32L4R9IDISCOVERY camera
• Figure 32: 32L4R9IDISCOVERY STMOD+ interface
• Figure 33: 32L4R9IDISCOVERY Audio and DFSDM
• Figure 34: Round DSI display board (MB1314)
• Figure 35: Fanout board (MB1280)
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Figure 20. 32L4R9IDISCOVERY board interconnections (MB1311C)
Note: The STM32L4R9I-DISCO may use a different MB1311 board revision than C-01. Refer to Hardware Resources of STM32L4R9I-DISCO available on www.st.com for relevant documentation.
1 14
MB1311-TOP
MB1311 C
28/08/2017
Title:
Size: Reference:
Date: Sheet: of
A3 Revision:
STM32L4R9I-DISCOProject:
NRST
ARD_A0ARD_A1ARD_A2ARD_A3ARD_A4ARD_A5
ARD_D5ARD_D4ARD_D3ARD_D2ARD_D1ARD_D0
ARD_D13ARD_D12ARD_D11ARD_D10ARD_D9ARD_D8
ARD_D6ARD_D7
ARD_D15ARD_D14
Arduino_ ConnectorsArduino_ Connectors.SchDoc
DCMI_D[0..7]
DCMI_NRSTDCMI_PWR_EN
DCMI_VSYNCDCMI_HSYNCDCMI_PIXCK
DCMI_I2C
DCMI_CLK
Camera InterfaceCamera.SchDoc
MFX_IRQ_OUTMFX_WAKEUP
NRST
MFX_I2C
USB_OTGFS_PPWR_EN
DCMI_PWR_EN
uSD_DetectUSB_OVER
DSI_RESET
LED_ORANGE
DSI_TOUCH_INT
AUDIO_RST
EXT_RESET
DSI_PWR_ON
JOYSTICK
STMOD+_SEL_0STMOD+_SEL_1
IDDIDD_measurement.SchDoc
LCD_I2CDSI_RESETDSI_TOUCH_INT
DSI_USARTDSI_SPI
DSI_BL_CTRL
DSI_PWR_ON
DSI_SWIRE
DSI_TEDSI_LANES
DSI_LCDLCD.SchDoc
OCTOSPI Flash
PSRAM
SD
USB_OTG
MFX_IRQ_OUTMFX_WAKEUP
ARD_A0
MFX_I2C
ARD_A1ARD_A2ARD_A3ARD_A4ARD_A5ARD_D0ARD_D1ARD_D2ARD_D3ARD_D4ARD_D5ARD_D6ARD_D7ARD_D8ARD_D9
ARD_D10ARD_D11ARD_D12ARD_D13ARD_D14ARD_D15
USART_TXUSART_RX
SWCLKSWDIOSWO
DCMI_D[0..7]
DCMI_VSYNCDCMI_HSYNCDCMI_PIXCK
STMOD+_UART
STMOD+_I2C
STMOD+_INTSTMOD+_RESET
STMOD+_ADCSTMOD+_PWM
STMOD+_MOSIsSTMOD+_MISOs
STMOD+_SPI
DFDATIN3DFDATIN1
DFSDM
MIC_VDD
CODEC
LED_GREEN
RESET
DCMI_CLK
DF_CKOUT
DSI_USARTDSI_SPI
JOY_SEL
DSI_TEDSI_LANES
DSI_BL_CTRLDSI_SWIRE
HSE_STLINK
MCUMCU.SchDoc
LED_GREEN
SD
JOYSTICK
LED_ORANGE
uSD_Detect
RESETJOY_SEL
EXT_RESET
EXT_I2C
PeripheralsPeripherals.SchDoc
U5V
PowerPower.SchDoc
PSRAM
PSRAMPSRAM.SchDoc
OCTOSPI FlashNRST
OCTOSPIOCTOSPI.SchDoc
NRST
SWCLKSWDIO
SWO
USART_TXUSART_RX
U5V
MCO_STLINK
ST_LINKST_LINK_V2-1_2.SCHDOC
USB_OTG
USB_OTGFS_PPWR_EN
USB_OVER
U5V
OTGUSB_OTG_FS.SchDoc
NRST
NRST
STMOD+_INTSTMOD+_RESETSTMOD+_ADC
DFDATIN3
STMOD+_PWM
DFDATIN1
STMOD+_UARTSTMOD+_SPISTMOD+_I2CSTMOD+_MOSIsSTMOD+_MISOs
DF_CKOUT
STMOD+_SEL_1STMOD+_SEL_0
STMOD+STMOD+.SchDoc
CODEC
CODEC_I2CDFSDM
MIC_VDD
AUDIO_RST
AudioAudio.SchDoc
NRST
STMOD+_SEL_0STMOD+_SEL_1
STMOD+_SEL_0STMOD+_SEL_1
NRSTN S
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Figure 21. 32L4R9IDISCOVERY power
Note: The STM32L4R9I-DISCO may use a different MB1311 board revision than C-01. Refer to Hardware Resources of STM32L4R9I-DISCO available on www.st.com for relevant documentation.
2 14
Power
MB1311 C
28/08/2017
Title:
Size: Reference:
Date: Sheet: of
A4 Revision:
STM32L4R9I-DISCOProject:
E5V
E5V
U5V_ST_LINKR37820
VIN
10uFC39
ARDUINO power pinVin
3Vout
2
Tab4
GND1
U15LD1117S50TR
+3V3
L52.2uH
+1V8
32
1
JP7
VDD
+5V
ARD_5V
JP9
U5V
1 23 45 67 8
109
JP4
Header M Straight 5x2H
5V_USB_CHARGER
10uFC36
1 2
PWR
GreenLD8
32
1
JP5
+5V
4.7uFC42
10uFC38
SWA1
VINA2
ENB1
GNDB2
VSEL1C1
VOSC2
VSEL2D1
VSEL3D2
U14
TPS62743
SWA1
VINA2
ENB1
GNDB2
VSEL1C1
VOSC2
VSEL2D1
VSEL3D2
U9
TPS62743
L42.2uH
+5V
10uFC30
+5V
4.7uFC33
12
D1ESDA7P60-1U1M
Sc
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ma
tics
UM
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1
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7U
M2
271 R
ev 4
Figure 22. 32L4R9IDISCOVERY ARDUINO® Uno V3 connectors
Note: The STM32L4R9I-DISCO may use a different MB1311 board revision than C-01. Refer to Hardware Resources of STM32L4R9I-DISCO available on www.st.com for relevant documentation.
3 14
Arduino Uno connector
MB1311 C
28/08/2017
Title:
Size: Reference:
Date: Sheet: of
A4 Revision:
STM32L4R9I-DISCOProject:
Arduino uno connector
+3V3
A0A1A2A3A4A5
RX/D0TX/D1
D2
D4PWM/D3
PWM/D5PWM/D6
D7
D8PWM/D9
PWM/CS/D10
SDA/D14SCL/D15 PG7
PG8
NRST
VIN
NRSTSCK/D13
MISO/D12PWM/MOSI/D11
AVDDGND
VREF+
ARD_A0ARD_A1ARD_A2ARD_A3
ARD_A4
ARD_A5
ARD_D5ARD_D4ARD_D3ARD_D2
ARD_D0ARD_D1
ARD_D13ARD_D12ARD_D11ARD_D10ARD_D9ARD_D8
ARD_D6ARD_D7
ARD_D15
ARD_D14
PA7PC4PC3PB0
PA0
PA5
PC1PC0
PG11
PG6PA1PB4PA4
PH15PH13PI0PB15PB14PB13
ADC1_IN10
ADC1_IN5
ADC1_IN4ADC1_IN13ADC1_IN12
I2C3_SDA PG8
PG7I2C3_SCL
LPUART1_TXLPUART1_RX
TIM15_CH2
TIM5_CH2
TIM8_CH1NTIM5_CH4, SPI2_NSSTIM3_CH2, SPI2_MOSISPI2_MISOSPI2_SCKIOREF
NRST3V35VGNDGNDVIN
PO
WE
RA
IN
I2C3_SCL
I2C3_SDA
WARNING: voltage applied to VIN <11.5V
123456789
10
CN10
SSW-110-22-X-S-VS
12345678
CN16
SSW-108-22-X-S-VS
123456
CN17
SSW-106-22-X-S-VS12345678
CN11
SSW-108-22-X-S-VS
TIM3_CH1
PF10
ARD_5V
PG8
PG7
VDD
WARNING: CN16-PIN4 is not a input PWR
SB2
SB33
SB32
SB35
SB34
R109 1KE5V
C48[N/A]
SB27
1 2 GreenLD3
+3V3510R2
1
23
GSD
T1BSN20
1MR6
ADC1_IN15
WARNING: Some Arduino IOs are shared with other functions:
Following ARD signals are multiplexed or shared with other functions. In case ARDUINOUNO is connected, take care that the corresponding features are disconnected or wellconfigured :
ARD_D7 : DCMI_HSYNC/DE (Camera conflict)ARD_A5 : STMOD+_PWM (STMod+ / PMOD conflict)ARD_D15 : I2C3_SCL (shared with STMod+)ARD_D14 : I2C3_SDA (shared with STMod+)ARD_D13 : DSI_SPI2_SCK (SPI2_SCK shared with STMod+/PMOD and DSI option)ARD_D12 : DSI_SPI_D/CX (SPI2_MISO shared with STMod+/PMOD and DSI option)ARD_D11 : DSI_SPI2_MOSI (SPI2_MOSI shared with STMod+/PMOD and DSI option)
UM
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atics
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Figure 23. 32L4R9IDISCOVERY ST-LINK/V2-1
Note: The STM32L4R9I-DISCO may use a different MB1311 board revision than C-01. Refer to Hardware Resources of STM32L4R9I-DISCO available on www.st.com for relevant documentation.
4 14
ST-LINK/V2-1
MB1311 C
28/08/2017
Title:
Size: Reference:
Date: Sheet: of
A3 Revision:
STM32L4R9I-DISCOProject:
STM_RST
T_JT
CK
T_JTCK
T_JT
DO
T_JT
DI
T_JTMS
OSC_INOSC_OUT
T_N
RS
T
AIN_1
USB ST-LINK
COMBoard Ident: PC13=0
T_SWDIO_IN
LED_STLINKMCO
ST
LIN
K_
RX
ST
LIN
K_
TX
T_SWO
USB_RENUMn
US
B_R
EN
UM
n
+3V3_ST_LINK
+3V3_ST_LINK
PW
R_E
XT
51
2
GND
3
4
BYPASSINH
Vin Vout
U31LD3985M33R
+3V3_ST_LINK
+3V3_ST_LINK
Power Switch to supply +5Vfrom STLINK USB
PWR_ENn
+3V3_ST_LINK
3
1
2
T12
9013-SOT23VUSB_ST_LINK
VUSB_ST_LINK
VUSB_ST_LINK
VDD_STL
LED_STLINK
+3V3_ST_LINK
STM_JTMS
STM
_JTC
K
T_JR
ST
STL_USB_D_NSTL_USB_D_P
STL_USB_D_NSTL_USB_D_P
5V_STL
VUSB_ST_LINK U5V_ST_LINK
D7BAT60JFILM
+3V3_ST_LINK
VBAT1
PC132
PC143
PC154
OSC_IN5
OSC_OUT6
/RST7
VSSA8
VDDA9
PA010
PA111
U2_TX12
U2_
RX
13
U2_
CK
14
S1
_C
K15
S1
_M
ISO
16
S1
_M
OS
I17
PB
018
PB
119
PB
2/B
OO
T1
20
PB
10
21
VS
S_1
23
VD
D_1
24
PB1225
PB
11
22
S2_CK26
S2_MISO27
S2_MOSI28
PA829
PA930
PA1031
PA1132
PA1233
JTMS34
VSS_235
VDD_236
JTC
K3
7JT
DI
38
JTD
O3
9JN
RS
T4
0P
B5
41
PB
64
2P
B7
43
BO
OT
04
4P
B8
45
PB
94
6V
SS
_3
47
VD
D_3
48
U30STM32F103CBT6
output current limitation : 625mA+3V3_ST_LINK
USB Virtual ComPort
SWD to MCUTCK/SWCLK
TMS/SWDIO
NRST
SWCLKPA14
SWDIOPA13
SWOPB3
Red
_Green
21
34
LD4HSMF-A201-A00J1
T_JTDOT_JTMS
VccA1
A12
A23
GND4
DIR5
B26
B17
VccB8
U10
SN74LVC2T45DCUT
VDD_STL
T_SWO
+3V3_ST_LINK
+3V3_ST_LINK
SWO_MCU
VCCA1
A12
A23
GND4
DIR5
B26
B17
VCCB8
U8
SN74LVC2T45DCUT
VDD_STL
VDD_STL
+3V3_ST_LINK
USART_TX
USART_RX
PA2
PA3
1 2X3
NX3225GD-8.00M
transistor pins numbers follow SOT23 JEDEC standard,
VBUS1
DM2
DP3
ID4
GND5
Shield6
US
B_M
icro
-Bre
cep
tacle
Shield7
Shield8
Shield9
EXP10
EXP11
CN13
1050170001
STLINK power supply
IN1
IN2
ON3
GND4
SET5
OUT6
OUT7
FAULT8
U11ST890CDR
T_JTCK
T_NRST
+5VVDD
5V_STL
VDD_STL
11
22
33
44
55
66
77
88
SW1EDG-501S
SWD
1 2 3 4 5 6 CN5313106S111116
Only footprint with Cable: TC2050-IDC-NL
PA13
PA14
PB3
VDD
TAG
+3V3_ST_LINK
1 2 3 4
CN15[N/A]
STM_JTMSSTM_JTCKSWCLK SWDIO
Not Fitted, must be on a border or the PCB.
VUSB_ST_LINK 5V_USB_CHARGER
12
3
JP10
12345 6
78910
CN8Tag-10_C
100nFC37
100nFC29
100nFC31
100nFC40
R103 [N/A]
2K7R104
4K7R105
100KR106
10KR10110pF
C9810pFC93
100nFC92
4K7R92
4K7R93
0R88
100KR25
100nFC19
100nFC22
0R20
100KR19
100KR18
100KR86[N/A]
1K5R98
10KR34
36KR36
100R35
100
R94
100
R2
81
00
R30
100
R3
2
100R110
100R26
100R111
100R115
R33 820
10KR29
100nFC35
1uFC41
0R22
100R21
100R23
1uFC95
100nFC94
100nFC34
100nFC32
1uFC96
100nFC97
10nFC91
1 2
FaultRed
LD5
SB36
SB14
0R24
0R31
D4 BAT60JFILM
D5 [N/A]
D6 [N/A]
E5V
U5V
R102[N/A]
R91 [N/A]
I/O11
GND2
I/O23
I/O24
Vbus5
I/O16
U28
USBLC6-2SC6
i
Diff Pair 90ohm
i
Diff Pair 90ohm
100nFC79
VUSB_ST_LINK
JP8[N/A]
1 32
4 5
U12ESDALC6V1W5
2K2
R27
MCO_STLINKMCO
To HSE input OSC_IN_PH0
1 32
4 5
U32ESDALC6V1W5
ST890DTR
IN1
IN2
ON3
GND4
SET5
OUT6
OUT7
FAULT8
E-P
AD
9
U33[N/A]
Power Switch ST890 will be populated:- either by U11 ST890CDR in SO8 package- either by U33 ST890DTR in DFN8L package
VUSB_ST_LINK
PWR_ENn
U11_8
U11_8
U5V_ST_LINK
U11_5
U11_5
Sc
he
ma
tics
UM
227
1
60/7
7U
M2
271 R
ev 4
Figure 24. 32L4R9IDISCOVERY Octo-SPI Flash memory
Note: The STM32L4R9I-DISCO may use a different MB1311 board revision than C-01. Refer to Hardware Resources of STM32L4R9I-DISCO available on www.st.com for relevant documentation.
5 14
OCTOSPI Flash
MB1311 C
28/08/2017
Title:
Size: Reference:
Date: Sheet: of
A4 Revision:
STM32L4R9I-DISCOProject:
VDDVDD_OCTOSPIFLASH
OCTOSPI Flash
OCTOSPIM_P2_IO1OCTOSPIM_P2_IO0
OCTOSPIM_P2_DQSOCTOSPIM_P2_CS
OCTOSPIM_P2_IO2OCTOSPIM_P2_IO3OCTOSPIM_P2_IO4OCTOSPIM_P2_IO5OCTOSPIM_P2_IO6OCTOSPIM_P2_IO7
OCTOSPIM_P2_CLK
OCTOSPI
10KR48
100nFC65
SB23
MT35XL512ABA1G12-0SIT
DQ3D4
VCCB4
S#C2
DQ1D2
CB2
DQ0D3
VSSE5
DQ2/W#C4
DQ3
VCCS#
DQ1
C
DQ0
VSSDQ2/W#
DQ7E1
DQ5E3
DQ4D5
DQ6E2
DQSC3
RESET#A4
DNUA5
DNUB5
RFUA2
RFUA3
RFUB1
VSSC1
VSSB3
VCCD1
VCCE4
VPPC5
U23
[N/A]Micron
100nFC66
100nFC49
OCTOSPIM_P2_CSOCTOSPIM_P2_DQSOCTOSPIM_P2_CLK
OCTOSPIM_P2_IO0OCTOSPIM_P2_IO1OCTOSPIM_P2_IO2OCTOSPIM_P2_IO3OCTOSPIM_P2_IO4OCTOSPIM_P2_IO5OCTOSPIM_P2_IO6OCTOSPIM_P2_IO7
33R51OCTOSPI_CSOCTOSPI_DQSOCTOSPI_CLK
OCTOSPI_IO0OCTOSPI_IO1OCTOSPI_IO2OCTOSPI_IO3OCTOSPI_IO4OCTOSPI_IO5OCTOSPI_IO6OCTOSPI_IO7
OCTOSPI_CS
OCTOSPI_DQS
OCTOSPI_CLK
OCTOSPI_IO0OCTOSPI_IO1OCTOSPI_IO2OCTOSPI_IO3OCTOSPI_IO4OCTOSPI_IO5OCTOSPI_IO6OCTOSPI_IO7
OCTOSPI_IO0OCTOSPI_IO1OCTOSPI_IO2OCTOSPI_IO3OCTOSPI_IO4OCTOSPI_IO5OCTOSPI_IO6OCTOSPI_IO7
OCTOSPI_CS
OCTOSPI_DQS
OCTOSPI_CLK
Macronix
RESET pins of Flash have internal pull-up (both) by default
OCTOSPI_RESETOCTOSPI_RESET
VPP_OCTOSPIFLASH
i
OCTOSPI_IO
Matched Net Lengths [ Tolerance = 200 mil ]Impedance Constraint [Min = 40 Max = 60 ]
i
OCTOSPI_IO
SB26
i
OCTOSPI_IO
i
OCTOSPI_IO
i
OCTOSPI_IO
i
OCTOSPI_IO
i
OCTOSPI_IO
i
OCTOSPI_IO
i
OCTOSPI_IO
i
OCTOSPI_IO
i
OCTOSPI_IO
Close to Flash
33R5233R73
33R6833R7133R5333R7833R6733R7233R6933R63
VPP_OCTOSPIFLASH
PI11
PH8
PH10PH9
PI6
PG9PG10
PG12PG15
PI9PI10
NRSTNRST
SCLKB2
CSC2
SO/SIO1D2
SIO2C4
SIO3D4
SI/SIO0D3
SCLK
CS
SO/SIO1SIO2SIO3
SI/SIO0
SIO4D5
SIO5E3
SIO6E2
SIO7E1
NCB5
NCB1
NCA3
NCA2
ECSA5
VCCB4
VCCQD1
VCCQE4
VSSQC1
VSSQE5
GNDB3
DQSC3
RESETA4
NCC5
U24
MX25LM51245GXDI00
SB25
10KR47
A5
A5
SB24
VDD_OCTOSPIFLASH
VDD_OCTOSPIFLASH
VPP connection is accessible on Micron
ECS feature can be monitored on Macronix by soldering SB25
Macronix MX25LM51245GXDI00 used by default (functional at 3V3 only)
Double footprint to be compatible with Micron P/N
UM
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Figure 25. 32L4R9IDISCOVERY peripherals
Note: The STM32L4R9I-DISCO may use a different MB1311 board revision than C-01. Refer to Hardware Resources of STM32L4R9I-DISCO available on www.st.com for relevant documentation.
6 14
Peripherals
MB1311 C
28/08/2017
Title:
Size: Reference:
Date: Sheet: of
A4 Revision:
STM32L4R9I-DISCOProject:
MICRO SD
PC11PC10
PC12PD2
(TF) Card
1 2GreenLD2
+3V3
LED_GREEN
LED_ORANGE
PH4
MFX_GPIO0
The 2 LEDs are top side
VDD
JOYSTICK
MFX_GPIO3MFX_GPIO4
MFX_GPIO1
MFX_GPIO2
VDD
PC13 - WKUP2
uSD_D0uSD_CLK
uSD_D1
uSD_D2uSD_D3
uSD_CMD
SD
uSD_D0uSD_D1
uSD_D2uSD_D3
uSD_CLKuSD_CMD
SD
uSD_Detect
JOY_DOWNJOY_LEFTJOY_RIGHTJOY_UP
JOYSTICK
JOYSTICK
uSD_Detect
Reset Button
GND
RESET
1 2OrangeLD1
510R5
680R3
100R42
micro SD is functional with 3V3 only
1 23 45 67 8
CN7
F206A-2*04MGF-A
R107 0R108 0I2C1_SDA
I2C1_SCL
VDD
PG13PB6
EXT_RESET
SSM-104-L-DH (Samtec)
R112 0
EXT_I2C ConnectorUser LEDs
SB37+5V
GND
JOY_SEL
JOY_SEL
SD_D0SD_D1
SD_D2SD_D3
SD_CLKSD_CMD
uSD_Detect
JOY_SEL
SDA
SCL
I2C
EXT_I2CI2C1_SCL
I2C1_SDA
DAT3_IN4
RDATA_VCC16
DAT3_EX13
CMD_IN5
WP/CD1
VCC15
CMD_EX12
RDAT3_GND2
DAT2_EX14
DAT2_IN3
CLK_IN6
DAT0_IN7
DAT1_IN8
DAT1_EX9
DAT0_EX10
CLK_EX11
GND17
U13
EMIF06-MSD02N16
IO11
GND3
IO22
U4
ESDA6V1L
1 32
4 5
U17ESDALC6V1W5
PC13 - WKUP2
MFX_GPIO11
MFX_GPIO5
MFX_GPIO5
PC8PC9
341 2
B1
TD-0341X-A00 [RESET/Black]
JOY_SEL is also the WAKE_UP functionCOMMON
5
Selection2
DOWN3
LEFT1
RIGHT6
UP4
B2
MT008-A
CL
K5
GND11
CM
D3
DA
T2
1
VS
S6
VD
D4
GND10
DA
T1
8
DA
T0
7
CA
RD
_D
ET
EC
T9
GND12
DA
T3
_C
D2
NC13
CN6MR01A-01211
Sc
he
ma
tics
UM
227
1
62/7
7U
M2
271 R
ev 4
Figure 26. 32L4R9IDISCOVERY USB OTG FS
Note: The STM32L4R9I-DISCO may use a different MB1311 board revision than C-01. Refer to Hardware Resources of STM32L4R9I-DISCO available on www.st.com for relevant documentation.
7 14
USB_OTG_FS
MB1311 C
28/08/2017
Title:
Size: Reference:
Date: Sheet: of
A4 Revision:
STM32L4R9I-DISCOProject:
+5V
+3V3
VBUS1
DM2
DP3
ID4
GND5
Shield6
US
B_M
icro
-AB
rece
pta
cle
Shield7
Shield8
Shield9
EXP10
CN9
475900001
PA9
PA10
PA11PA12
MFX_GPIO13
VBUS OK
MFX_GPIO14
+3V3
transistor pins numbers follow SOT23 JEDEC standard,
USB Full Speed operating range voltage: 3.0V<VDDUSB<3.6V
GND2
IN5
EN4
OUT1
FAULT3
U16
STMPS2141STR
3
1
2
T139013-SOT23
VBUSDMDPID
USB_OTGUSB_OTGFS_VBUSUSB_OTGFS_DMUSB_OTGFS_DPUSB_OTGFS_ID
USB_OTGFS_OVRCR
USB_OTG
USB_OTGFS_PPWR_EN
USB_OVER
U5V
47KR40
47KR39
12
RedLD7
4.7uFC43
0R41
620R38
12
GreenLD6
47KR113
10KR114
330R43
SB15
+5V
D_N
D_POpen drain
I/O11
GND2
I/O23
I/O34
VBUS5
I/O46
U18
USBLC6-4SC6
12
D2ESDA7P60-1U1M
Place Diode close to the pin 5 / 6 ofUSBLC6-4SC6Diode added, for USB Cable detachworkaround
iDiff Pair 90 ohm iDiff Pair 90 ohm
UM
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atics
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Figure 27. 32L4R9IDISCOVERY Round DSI display interface
8 14
LCD Interface
MB1311 C
28/08/2017
Title:
Size: Reference:
Date: Sheet: of
A3 Revision:
STM32L4R9I-DISCOProject:
+5V
L2 FCM1608KF-601T03
L1 FCM1608KF-601T03
SDASCL
I2C
LCD_I2CI2C1_SDA
VDD
VDD_LCD
DSI_PWR_ON 3
4
5
G
SD
6
21
T5STT7P2UH7
100nFC60
100KR50
100nFC5
10uFC4
SB12
SB11
SB9
100nFC53
PB1
DSI_TOUCH_INT
To MFXMFX_GPIO9
DSI LCD
TOUCH_INT
LCD_BL_CTRLDSI_BL_CTRL
DSI_TE
PG13
PB6
PF11
DSI_RESET
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
3131
3232
3333
3434
3535
3636
3737
3838
3939
4040
4141
4242
4343
4444
4545
4646
4747
4848
4949
5050
5151
5252
5353
5454
5555
5656
5757
5858
5959
6060
6161
6262
6363
6464
CN4
QSH-030-01-F-D-A-K-TR
I2C1_SCL
I2C1_SDA
DSI_D2_PDSI_D2_N
DSI_D3_PDSI_D3_N
1V8_LCD
SB10
10K
R7
DSI_SWIRE
DSI_PWR_ON
VDD_LCD
DSI_SPI2_CLKDSI_SPI2_MOSIDSI_SPI_D/CX
DSI_USART_CKDSI_USART_TX
DSI_USART
DSI_SPI_CS
DSI_SPI_MOSIDSI_SPI_CK
DSI_SPI_DCX
DSI_SPI
DSI_USART
DSI_SPI
USART3_CKUSART3_TX
SB6SB8
DSI_CK_PDSI_CK_N
DSI_D0_PDSI_D0_N
DSI_D1_PDSI_D1_N
DSI_LANES
DSI_CK_PDSI_CK_N
DSI_D0_PDSI_D0_N
DSI_D1_NDSI_D1_P
DSI_LANES
BLGND
3V3_LCD
3
4
5
G
SD
6
21
T4STT7P2UH7
1V8_LCD
3
4
5
G
SD
6
21
T6STT7P2UH7
+3V3
+5V
+1V8
100nFC52
3V3_LCD
I2C1_SCL
DSI_SPI_USART_CS
DSI_SPI_D/CXSPI2_MOSISPI2_CLK
In case SB7 is connected, pay attention thatDSI_USART_CK is also connected to the ARD_A3function linked to ARDUINO Sheet
SB7
SB13
MFX_GPIO10
DSI_SPI_USART_CS
PB14PB15
PH14PB13
PB10PB0
PA8
In case SB13 is connected, pay attention thatDSI_USART_TX may also be used by theSTMod+/PMOD function of page 13 as USART3_TX(going to PMOD#2 signal)
SB13 is exclusive with SB6
SB7 is exclusive with SB8
All DSI pairs are Differential 100 ohm
0
R118
0
R119
0
R120
C100
[N/A]
C101
[N/A]
C99
[N/A]
Sc
he
ma
tics
UM
227
1
64/7
7U
M2
271 R
ev 4
Figure 28. 32L4R9IDISCOVERY IDD measurement and Multi Function eXpander
Note: The STM32L4R9I-DISCO may use a different MB1311 board revision than C-01. Refer to Hardware Resources of STM32L4R9I-DISCO available on www.st.com for relevant documentation.
9 14
IDD measurement / MFX (Multi Function eXpander)
MB1311 C
28/08/2017
Title:
Size: Reference:
Date: Sheet: of
A3 Revision:
STM32L4R9I-DISCOProject:VDD_MCU
Currentdirection
to MCU
differentialamplifier
SH0 SH1 SH2
Shunts
3
4
5
G
SD
6
21
T2STT7P2UH7
3
4
5
G
SD
6
21
T8STT7P2UH7
3
4
5
G
SD
6
21
T10STT7P2UH7
3
4 5
G
S D
621
T7STT7P2UH7 decoupling capacitors
close to TSZ122
MFX_IRQ_OUT
IDD_MEAS
MFX_SWCLK
CAL
SH2SH1
MFX_SWDIO
IDD_MEAS
SH1_D SH2_DSH0_D
CAL_D
VDD1 one capacitor close to each MFX pins:VDD, VDD_1, VDD_2, VDD_3
SH0
VDD_MCU
MFX_WAKEUP
L6FCM1608KF-601T03
12
3
JP1
bypass
R551_1%_0805
R8124_1%_0805
R85620_1%_0805
R6210K_1%_0805
V+
V-
3
21
48
U27ATSZ122IST
5
67
U27BTSZ122IST
V+
V-
3
21
48 U25A
TSZ122IST
5
67
U25BTSZ122IST
decoupling capacitorsclose to TSZ122
MFX_I2C1_SCLMFX_I2C1_SDA
MFX_WAKEUP
MFX_IRQ_OUT
NRSTNRST
MFX_I2C1_SCL
MFX_I2C1_SDA
VDD1
VDD1
D3 BAT60JFILM
SDA
SCL
I2C
MFX_I2C
VDD
VDD
3
4 5
G
S D
621
T3STT7P2UH7
VDD
+5V
+5V
PI1
PB2
PG13
PB6
MFX_aGPIO1
CAL
MFX_aGPIO1
MFX_aGPIO1
T50_4 T50_6
AMP_VDD
AMP_5V
1 2 3 4
CN14[N/A]
MFX_SWCLK MFX_SWDIO
VDD1
3
4
5
G
SD
6
21
T9STT7P2UH7
3
4
5
G
SD
6
21
T11STT7P2UH7
100nFC84
100nFC88
100nFC83
100nFC89
100nFC90
100KR87
10KR96
510R95
0R79
100KR74
100KR49
100KR84
100KR89
100KR90
100nFC69
100nFC64
100nFC73
100nFC78
1uFC67
100R75
357KR77
11KR70
6K04R60
6K04R65 300KR66
300KR76
Default I2C Address:1000010
MFX_V3WAKEUP2
NRST7
TSC_XP/GPO010
TSC_XN/GPO111
TSC_YP/GPO212
TSC_YN/GPO313
USART_TX21
USART_RX22
SPARE14
SWDIO34
SWCLK37
I2C_SCL42
I2C_SDA43
BOOT044
I2C_ADDR45
IRQOUT46
IDD_CAL/GPO43
IDD_SH04
IDD_SH1/GPO55
IDD_SH2/GPO66
IDD_MEAS25
GPIO018
GPIO119
GPIO220
GPIO339
GPIO440
GPIO515
GPIO616
GPIO717
GPIO829
GPIO930
GPIO1031
GPIO1132
GPIO1233
GPIO1326
IDD_SH3/GPO738
GPIO1427
GPIO1528
IDD_VDD_MCU41
VD
D1
VD
DA
9
VD
D_1
24
VD
D_2
36
VD
D_3
48
VS
SA
8
VS
S_1
23
VS
S_2
35
VS
S_3
47
U29
0R97
VDD1
JP6 [N/A]
SB31
DSI_TOUCH_INT
JOY_UPJOY_DOWNJOY_RIGHTJOY_LEFT
JOYSTICK
JOYSTICK
DSI_RESET
DCMI_PWR_EN
uSD_Detect
USB_OVER
JOY_DOWNJOY_RIGHTJOY_LEFT
JOY_UPLED_ORANGE
USB_OTGFS_PPWR_EN
AUDIO_RST
EXT_RESET
10nFC86
[N/A]
STMOD+_SEL_0STMOD+_SEL_1
DSI_1V8_PWRON
DSI_PWR_ON
DSI_1V8_PWRON
DSI_3V3_PWRON
6.8KR117
56KR116 DSI_PWR_ONPA8 (MFX_GPIO8)
PA2 (MFX_aGPIO2)
22uFC75
UM
22
71S
chem
atics
UM
2271
Re
v 465
/77
Figure 29. 32L4R9IDISCOVERY microcontroller
Note: The STM32L4R9I-DISCO may use a different MB1311 board revision than C-01. Refer to Hardware Resources of STM32L4R9I-DISCO available on www.st.com for relevant documentation.
10 14
MCU
MB1311 C
28/08/2017
Title:
Size: Reference:
Date: Sheet: of
A3 Revision:
STM32L4R9I-DISCOProject:
OCTO SPI Flash
OCTOSPIM_P2_IO1OCTOSPIM_P2_IO0
OCTOSPIM_P2_CLKOCTOSPIM_P2_CS
OCTOSPIM_P2_IO2OCTOSPIM_P2_IO3OCTOSPIM_P2_IO4OCTOSPIM_P2_IO5OCTOSPIM_P2_IO6OCTOSPIM_P2_IO7
OCTOSPIM_P2_DQS
OCTOSPI
OCTOSPIM_P2_IO0OCTOSPIM_P2_IO1OCTOSPIM_P2_IO2OCTOSPIM_P2_IO3
OCTOSPIM_P2_CSOCTOSPIM_P2_CLK
D[0..15]
PSRAM_A[0..20]
PSRAMPSRAM_A[0..20]
PSRAM_NE1PSRAM_NBL0
PSRAM_WEPSRAM_OE
PSRAM_D[0..15]
PSRAM_NBL1
PSRAM_WAITPSRAM_CLKPSRAM_ADV
PSRAM
PSRAM_NE1PSRAM_NBL0PSRAM_NBL1PSRAM_WEPSRAM_OE
PSRAM
DSI_USARTDSI_USART_CKDSI_USART_TX
DSI_USART
DSI_SPI_USART_CSSPI2_MOSISPI2_CLK
DSI LCD
CODEC
SAI_SDB
SAI_FSASAI_MCKA
SAI_SDA
SAI_SCKA
SAISAI1_SCKASAI1_MCKASAI1_FSASAI1_SDASAI1_SDB
DFSDMDATIN1
CKOUT
DFSDMDF_CKOUT
CODEC&DFSDM
uSD_D0
uSD_CLK
uSD_D1
uSD_D2uSD_D3
uSD_CMD
SD
uSD_D0uSD_D1
uSD_D2uSD_D3
uSD_CLKuSD_CMD
SD
SD
JOYSTICK
VBUSDMDPID
USB_OTGUSB_OTGFS_VBUSUSB_OTGFS_DMUSB_OTGFS_DPUSB_OTGFS_ID
USB_OTG
USB_OTG
MFXMFX_IRQ_OUT
MFX_WAKEUP
MFX_IRQ_OUT
MFX_WAKEUP
ArduinoARD_A0
ARD_A0
SDASCL
I2C
MFX_I2CI2C1_SCLI2C1_SDA
ARD_A1ARD_A2ARD_A3ARD_A4ARD_A5
ARD_A1ARD_A2ARD_A3ARD_A4ARD_A5
ARD_D0ARD_D1ARD_D2ARD_D3ARD_D4ARD_D5ARD_D6ARD_D7ARD_D8ARD_D9
ARD_D10ARD_D11ARD_D12ARD_D13ARD_D14ARD_D15
ARD_D0ARD_D1ARD_D2ARD_D3ARD_D4ARD_D5ARD_D6ARD_D7ARD_D8ARD_D9ARD_D10ARD_D11ARD_D12ARD_D13ARD_D14ARD_D15
Camera
DCMI_HSYNC
DCMI_VSYNC
DCMI_D[0..7]
DCMI_PIXCLK
NRST
ST_LINKUSART2_TXUSART2_RX
USART_TXUSART_RX
SWCLKSWDIO
SWO
SWDIO
SWO
SWCLK
X1
NDK NX3215SA-32.768KHZ-EXS00A-MU00525
VDD_MCUVDDA
L3FCM1608KF-601T03
DCMI_D[0..7]
DCMI_VSYNC
DCMI_HSYNC
DCMI_PIXCK
STMOD+
STMOD+_SPIMISOMOSI
CLK
CS
SPISPI2_CLKSPI2_MISOSPI2_MOSIUSART3_CTS_SPI2_CS
DFDATIN1
MIC_VDD
OTHER CONTROL
STMOD+_UARTRXTX
RTS
CTS
UART
USART3_TXUSART3_RXUSART3_RTS
SDASCL
I2C
STMOD+_I2CI2C3_SCLI2C3_SDA
STMOD+_INTSTMOD+_RESETSTMOD+_ADC
DFDATIN3
STMOD+_PWM
DFDATIN1
DFDATIN3
STMOD+_INTSTMOD+_RESETSTMOD+_ADCSTMOD+_PWM
DCMI_D1
DCMI_D2DCMI_D3
DCMI_D5DCMI_VSYNC
OCTOSPIM_P2_IO0
DCMI_PIXCLK
I2C1_SCL
JOY_SEL
DCMI_D0
PSRAM_WEPSRAM_OE
D0D1
D2D3
D13D14D15
DSI_SPI_DCX
PSRAM_A0PSRAM_A1PSRAM_A2PSRAM_A3PSRAM_A4PSRAM_A5
PSRAM_A6PSRAM_A7PSRAM_A8PSRAM_A9
PSRAM_A16PSRAM_A17PSRAM_A18
USART2_RX
uSD_D0uSD_D1uSD_D2uSD_D3uSD_CLK
uSD_CMD
SPI2_CLKSPI2_MISO
DFDATIN3
DFDATIN1
STMOD+_MOSIsSTMOD+_MISOs
SPI2_MISOsSPI2_MOSIs
SPI2_MOSIs
ARD_A0
ARD_A1ARD_A2
ARD_A5
ARD_D3
ARD_D4
ARD_D8
ARD_D9
32
1
JP3
+3V3
VDD_MCU
VDD_MCU
DSI_TE OSC_IN_PH0OSC_OUT_PH1
LED_GREENLED_GREEN
VDD_MCU
RESETNRST
DCMI_CLKDCMI_CLK
STMOD+_INT
VREF+
VDD
USART3_CK
DF_CKOUT
DF_CKOUT
VDD
100nFC28
100nFC21
100nFC26
100nFC27
100nFC17
100nFC20
100nFC23
100nFC72
100nFC61
100nFC12
100nFC18
100nFC7
100nFC15
100nFC85
1K5R100
1K5R99
0R61
R14 [N/A]
5.6pFC11
DF_CKOUT
100nFC10
1uFC13
R16 [N/A]
100KR15
5.6pFC9
PSRAM_CLKPSRAM_ADV
PSRAM_WAIT
OCTOSPIM_P2_IO4OCTOSPIM_P2_IO5OCTOSPIM_P2_IO6OCTOSPIM_P2_IO7
OCTOSPIM_P2_DQS
R54 0R56 0
OSC32_IN
OSC32_OUT
SAI1_SCKA
I2C1_SDA
USART3_TX
DSI_TE
USART2_TX
SWDIO
SWO
SWCLK
USB_OTGFS_VBUS
USB_OTGFS_DMUSB_OTGFS_DP
USB_OTGFS_ID
SPI2_MOSI
STMOD+_ADC
DFDATIN1
ARD_A4ARD_D5
ARD_D10
ARD_D11ARD_D12ARD_D13
LED_GREENDCMI_CLK
DCMI_D6
SAI1_MCKA
SAI1_SDAD4D5D6D7D8D9D10D11D12PSRAM_NE1
PSRAM_NBL0PSRAM_NBL1
PSRAM_A10PSRAM_A11PSRAM_A12PSRAM_A13PSRAM_A14PSRAM_A15
ARD_D0ARD_D1
ARD_D2
ARD_D6
USART3_CTS_SPI2_CS
USART3_CTS_SPI2_CS
USART3_TX
DSI_SPI
DSI_SPI_CSDSI_SPI_MOSI
DSI_SPI_CKDSI_SPI_DCX
DSI_SPI
DSI_TE
USART3_RX
OCTOSPIM_P2_IO3
OCTOSPIM_P2_IO5
DSI_CK_P
DSI_D0_PDSI_D0_N
DSI_D1_PDSI_D1_N
DSI_CK_N
I2C3_SCLI2C3_SDA
ARD_D15
OCTOSPIM_P2_IO4
SPI2_MISOs
DCMI_HSYNC
MFX_IRQ_OUT
OCTOSPIM_P2_CLK
USART3_RTS
PSRAM_CLK
PSRAM_WAIT
OCTOSPIM_P2_IO6OCTOSPIM_P2_IO7
OCTOSPIM_P2_CS
OCTOSPIM_P2_DQS
PSRAM_ADV
BOOT0
ARD_A3USART3_CKDSI_BL_CTRLMFX_WAKEUP
MIC_VDD
DSI_SPI_USART_CS
OCTOSPIM_P2_IO1OCTOSPIM_P2_IO2
JOY_SELJOY_SEL
VDD_MCU
100nF
C24C25
2.2uF
OCTOSPI Flash
DSI_LANES
DSI_CK_PDSI_CK_NDSI_D0_PDSI_D0_N
DSI_D1_NDSI_D1_P
DSI_LANESDSI_CK_P
DSI_D0_PDSI_D0_NDSI_D1_PDSI_D1_N
DSI_CK_N
STMOD+_PWM
ARD_D14
SPI2_MISO
DSI_BL_CTRLDSI_BL_CTRL
MIC_VDD
DCMI_D7SAI1_FSA
PSRAM_A20 DCMI_D4PSRAM_A19
DSI_SWIRE
DSI_SWIREDSI_SWIRE
SAI1_SDB
ARD_D7
STMOD+_RESET
H3
H4 H1
H2
PC13-WKUPE1
PC0J2
PC1J3
PC2J4
PC3K1
PA0-WKUPK3
PA1M1
PA2-WKUPN1
PA3M2
PA4N2
PA5L3
PA6L4
PA7M4
PC4K4
PB0N4
PB1L5
PB2N5
PB10N9
PB11H7
PB12N12
PB13N13
PB14M12
PB15L10
PC6F11
PC7G11
PC8F9
PC9G13
PA8E11
PA9E12
PA10D11
PA11E13
PA12D13
PA13A11
PA14A10
PA15A9
PC10D9
PC11E9
PC12F8
PB3A6
PB4A5
PB5B5
PB6C5
PB7D5
PB8C4
PB9D4
PC14-OSC32_INF1
PC15-OSC32_OUTG1
PH0-OSC_INH1
PH1-OSC_OUTJ1
NRSTH3
PH3-BOOT0E5
PD8K10
PD9K9
PD10J10
PD11J9
PD12J8
PD13H8
PD14H11
PD15H10
PD0B8
PD1C8
PD2D8
PD3E8
PD4C7
PD5D7
PD6E7
PD7F7
PF0F5
PF1F4
PF2F3
PF3G3
PF4G4
PF5G5
PF10H4
PF11M5
PF12N6
PF13M6
PF14L6
PF15K5
U7A
STM32L4R9AII6U
PE2D3
PE3D2
PE4D1
PE5E4
PE6-WKUPE3
PE7L7
PE8K6
PE9J6
PE10H6
PE11N8
PE12M8
PE13L8
PE14K7
PE15J7
PE0A4
PE1B4
PG0J5
PG1H5
PG2H9
PG3G8
PG4G7
PG5G9
PG6G12
PG7G10
PG8F10
PG9B7
PG10D6
PG11E6
PG12F6
PG13G6
PG15C6
PI0A12
PI1B11
PI2B10
PI3C10
PI4D10
PI5E10
PI6B9
PI7B2
PI9B1
PI10A1
PI11C3
PH2A2
PH4K8
PH5L9
PH8N10
PH9C11
PH10M9
PH11M10
PH12B13
PH13C9
PH14A13
PH15B12
DSI_D0_PL11
DSI_D0_NL12
DSI_D1_PJ11
DSI_D1_NJ12
DSI_CK_PK11
DSI_CK_NK12
U7B
STM32L4R9AII6U
VBATE2
VSSA/VREF-K2
VREF+L1
VDD_1/9_0/10N11
VDDAL2
VDDUSBD12
VSS_1/IO_2A7
VDD_8/11H13
VDD_4N3
VDD_5G2
VDD_6/7N7
VDD_9A8
VSS_2C12
VSS_4/6H2
VSS_5F2
VSS_3/13B3
VSS_7M7
VSS_8/9_0/11H12
VSS_9M3
VSSIO_1F13
VDDIO_1F12
VDD_2C13
VDDIO_2B6
VDD_3/13A3
VDD_REGDSIM13
DSI_VSS_0J13
DSI_VSS_1K13
DSI_VCAP_0L13
VSS_10C2
VSS_12M11
VDD_12C1
U7C
STM32L4R9AII6U
4
13
2
X2
NX3225GA-16MHz-EXS00A-CG04815
6.8pF
C51
6.8pF
C50
OSC_IN_PH0HSE_STLINK
SB28
22uFC6
22uFC8
22uFC87
Sc
he
ma
tics
UM
227
1
66/7
7U
M2
271 R
ev 4
Figure 30. 32L4R9IDISCOVERY PSRAM
Note: The STM32L4R9I-DISCO may use a different MB1311 board revision than C-01. Refer to Hardware Resources of STM32L4R9I-DISCO available on www.st.com for relevant documentation.
11 14
PSRAM
MB1311 C
28/08/2017
Title:
Size: Reference:
Date: Sheet: of
A4 Revision:
STM32L4R9I-DISCOProject:
Synchronous PSRAM
PSRAM_D[0..15]
PSRAM_A[0..20]
PSRAM
PSRAM_A[0..20]
PSRAM_NE1PSRAM_NBL0
PSRAM_WEPSRAM_OE
PSRAM_D[0..15]
PSRAM_NBL1
PSRAM_WAITPSRAM_CLKPSRAM_ADV
PSRAM
PSRAM_NE1PSRAM_NBL0PSRAM_NBL1PSRAM_WEPSRAM_OE
PSRAM_NBL0PSRAM_NBL1
PSRAM_WEPSRAM_OE
PSRAM_A0PSRAM_A1PSRAM_A2PSRAM_A3PSRAM_A4PSRAM_A5PSRAM_A6PSRAM_A7PSRAM_A8PSRAM_A9PSRAM_A10PSRAM_A11PSRAM_A12PSRAM_A13PSRAM_A14PSRAM_A15PSRAM_A16PSRAM_A17PSRAM_A18
PSRAM_D0PSRAM_D1PSRAM_D2PSRAM_D3PSRAM_D4PSRAM_D5PSRAM_D6PSRAM_D7PSRAM_D8PSRAM_D9PSRAM_D10PSRAM_D11PSRAM_D12PSRAM_D13PSRAM_D14PSRAM_D15
PD5PD4
PD14PD15PD0PD1PE7PE8PE9PE10PE11PE12PE13PE14PE15PD8PD9PD10
PF0PF1PF2PF3PF4PF5PF12PF13PF14PF15PG0PG1
PD11PD12PD13
PG2PG3PG4PG5
PE0PE1
functional at 3.3V only
PSRAM_NE1
100nF
C16
100nF
C14
SB5
R17 0
JP2
+3V3PSRAM_VDD
PSRAM_VDD
PSRAM_VDD
VDD_LCD0R13
R11 [N/A]
PSRAM_A0PSRAM_A1PSRAM_A2PSRAM_A3PSRAM_A4PSRAM_A5PSRAM_A6PSRAM_A7PSRAM_A8PSRAM_A9PSRAM_A10PSRAM_A11PSRAM_A12PSRAM_A13PSRAM_A14PSRAM_A15PSRAM_A16PSRAM_A17PSRAM_A18
PF0PF1PF2PF3PF4PF5PF12PF13PF14PF15PG0PG1
PD11PD12PD13
PG2PG3PG4PG5
PSRAM_D0PSRAM_D1PSRAM_D2PSRAM_D3PSRAM_D4PSRAM_D5PSRAM_D6PSRAM_D7PSRAM_D8PSRAM_D9PSRAM_D10PSRAM_D11PSRAM_D12PSRAM_D13PSRAM_D14PSRAM_D15
PD14PD15PD0PD1PE7PE8PE9PE10PE11PE12PE13PE14PE15PD8PD9PD10
PSRAM_NBL0PSRAM_NBL1
PSRAM_WEPSRAM_OE
PD5PD4PE0PE1
PSRAM_CE_CS1
SB3PSRAM_A20
CRE_CS2
VDD_VDDQ
VDD_VDDQ
H6
Asynchronous PSRAM
3.3V I/Os only
PSRAM_CLKPSRAM_ADV
PSRAM_WAIT
PSRAM_CLKPSRAM_ADV
PSRAM_WAIT
SB3 and SB4 are only useful for U6 :
Double footprint for Async/Sync PSRAMs compatibility
iPSRAM_A
Matched Net Lengths [ Tolerance = 200 mil ]Impedance Constraint [Min = 40 Max = 60 ]
i PSRAM_D
Matched Net Lengths [ Tolerance = 200 mil ]Impedance Constraint [Min = 40 Max = 60 ]
i
PSRAM_A
i
PSRAM_A i
PSRAM_A i
PSRAM_A i
PSRAM_Ai
PSRAM_A
i
PSRAM_A
i
PSRAM_D
PSRAM_CE_CS1
PD3PD6
PB7
PD7
PSRAM_A19PE4
SB4H6
PSRAM_VDD
PE3
A4B4
A3B3
A2A5
A1A4
A0A3
CS1B5
I/O0B6
I/O1C5
I/O2C6
I/O3D5
VDDD6
GNDD1
I/O4E5
I/O5F5
I/O6F6
I/O7G6
WEG5
A16E4
A15F4
A14F3
A13G4
A12G3
A11H5
A10H4
A9H3
A8H2
I/O8B1
I/O9C1
I/O10C2
I/O11D2
VDDE1
I/O12E2
I/O13F2
I/O14F1
I/O15G1
LBA1
UBB2
OEA2
A7D4
A6C4
A5C3
A17D3
A18H1
GNDE6
CS2A6
NCE3
NCH6
IS66WV1M16EBLL-55BLI
A19G2
U5PSRAM_A19 PE3
IS66WVC2M16ECLL-7010BLI
A4B4
A3B3
A2A5
A1A4
A0A3
CEB5
I/O0B6
I/O1C5
I/O2C6
I/O3D5
VDDD6
VSSQD1
I/O4E5
I/O5F5
I/O6F6
I/O7G6
WEG5
A16E4
A15F4
A14F3
A13G4
A12G3
A11H5
A10H4
A9H3
A8H2
I/O8B1
I/O9C1
I/O10C2
I/O11D2
VDDQE1
I/O12E2
I/O13F2
I/O14F1
I/O15G1
LBA1
UBB2
OEA2
A7D4
A6C4
A5C3
A17D3
A18H1
VSSE6
CREA6
NCJ6
NCE3
NCJ4
A19G2
A20H6
WAITJ1
CLKJ2
ADVJ3
NCJ5
U6
[N/A]
SB3
U5 used U6 used
X
SB4 X
R8
R9
R10
R12
[N/A]
10K
10K
10K[N/A]
10K
10K
10K
[N/A]
0R
0R
[N/A]
If SB3 is fitted, CAMERA and PSRAM functions are exclusives; if SB4 fitted, PSRAM usable memory density is reduced to 16M bits
(Default)
10KR10
10KR9
10KR8
10K
[N/A]
R12
[N/A]U6
U5 [N/A]fitted
fitted
SB38
CRE_CS2
VDD_VCORE
VDD_VCORE
SB391V8_LCD
PSRAM_VDD
SB38
SB39
0R
[N/A] 0R
[N/A]
1.8V CORE only
32M bits
16M bits
SB39 for U6 only
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Figure 31. 32L4R9IDISCOVERY camera
12 14
Camera
MB1311 C
28/08/2017
Title:
Size: Reference:
Date: Sheet: of
A4 Revision:
STM32L4R9I-DISCOProject:
DCMI_D0DCMI_D1DCMI_D2DCMI_D3DCMI_D4DCMI_D5DCMI_D6DCMI_D7
DCMI_HSYNC
DCMI_VSYNC
DCMI_PIXCLK
Camera_CLK
DCMI_PWR_ENDCMI_NRST
DCMI_NRST
DCMI_D[0..7]DCMI_D[0..7]
DCMI_HSYNCDCMI_VSYNC
DCMI_PIXCLK
DCMI_PWR_EN
DCMI_VSYNCDCMI_HSYNCDCMI_PIXCK
123456789101112131415161718192021222324252627282930
CN2
FPU330ZH-BT1D3-CASDASCL
I2C
DCMI_I2C
VDD
VDD
PB8
PB6
PH5
PA4
PC7PH11
PG13
PC6
PH12PE4PI4
PI7
PI5
MFX_GPIO12
DCMI_CLK
DCMI_I2C1_SCLDCMI_I2C1_SDA
100nFC3
22R4
Camera is functional with 3V3 only
PA8
CAUTION : Following DCMI signals are multiplexed with otherfunctions. In case CAMERA module is plugged, take care that thecorresponding features are disconnected or well configured :
DCMI_D0 : STMod+_INTDCMI_D1 : DFDATIN3 (STMod+)DCMI_D4 : PSRAM_A20 (only in case of U6 PSRAM is used)DCMI_D6 : STMod+_PWMDCMI_D7 : STMod+_RESETDCMI_HSYNC/DE : STMod+_ADC and ARD_D7
CAMERA is exclusive with some STMod+ , PMOD and ARDUINO signals
22uFC46
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Figure 32. 32L4R9IDISCOVERY STMOD+ interface
Note: The STM32L4R9I-DISCO may use a different MB1311 board revision than C-01. Refer to Hardware Resources of STM32L4R9I-DISCO available on www.st.com for relevant documentation.
13 14
STMOD+ Interface
MB1311 C
28/08/2017
Title:
Size: Reference:
Date: Sheet: of
A4 Revision:
STM32L4R9I-DISCOProject:
GNDGND+5V+5V
STMOD+_INTSTMOD+_RESETSTMOD+_ADC
DF_CKOUT
STMOD+_PWMSTMOD+_UART RX
TX
RTS
CTS
UARTUSART3_CTSUSART3_TXUSART3_RXUSART3_RTS
STMOD+_SPI MISOMOSI
CLK
CS
SPI
SPI2_CLKSPI2_MISOpSPI2_MOSIpSPI2_CS
SDA
SCL
I2C
STMOD+_I2C
I2C3_SCL
I2C3_SDA
STMOD+_MOSIs
STMOD+_MISOsPI2
PA5 (*)PA4 (*)PI7 (*)
PB15 (*) PC2 (*)
PB13 (*)PB14 (*)
PI3
PB11
PA6
PA6
PA15
PC6 (*)PB10 (*)
PG7 (*)
12345678910
11121314151617181920
CN1
SQT-110-01-F-D-RA
GND GND+3V3 +3V3
123456
789
101112
CN3
SSW-106-02-F-D-RA
PMOD#1PMOD#2PMOD#3PMOD#4
PMOD#1PMOD#2PMOD#3PMOD#4
PMOD#11PMOD#12
PMOD#11PMOD#12
SB21SB17SB19
PMOD
D116
D25
1-2SEL3
D38
D413
1S21
1S115
2S26
2S14
3S29
3S17
4S214
4S112
VCC2
GND11
3-4SEL10
U21
STG3692QTR
PMOD#2
PMOD#3
PMOD#4VDD
PMOD_SEL_0STMOD+_SEL_0
R4610K
C471uF
PMOD_SEL_1STMOD+_SEL_1
R4510K
MOSIp/TX
MISOp/RX
SCK/RTS
STMOD+_SEL_0STMOD+_SEL_1
PMOD#2PMOD#3PMOD#4
0
MOSIpMISOpSCK
TXRXRTSSCK
TXRX
SPI UART
VDD
(*) default configuration to support MikroBus modules using MB1280 fan-out board
UART/SPI
0 0 (*)1 (*) 1
1
(*)STMOD+/PMOD USART3_TX (PB10) may also use DSI_USART_TX optionSTMOD+/PMOD SPI2_MOSIp (PB15) shared with ARD_D11 and DSI_SPI2_MOSI optionSTMOD+/PMOD SPI2_MISOp (PB14) shared with ARD_D12 and DSI_SPI_DCX optionSTMOD+/PMOD SPI2_SCK (PB13) shared with ARD_D13 and DSI_SPI2_SCK optionSTMOD+ I2C3 SCL (PG7) shared with ARD_D15 (I2C3_SCL)STMOD+ I2C3 SDA (PG8) shared with ARD_D14 (I2C3_SDA)
STMod+
USART3_TXSPI2_MOSIp
USART3_RXSPI2_MISOp
USART3_RTSSPI2_CLK
PG8 (*)
PB15 (*)
PB14 (*)
PB13 (*)
CTSCSCS
ATOM FH200210C-12000
ATOM FH254206C-1600
SB22
DFDATIN3PC7 (*)
DFDATIN1PB12 (*)
(*)STMOD+ INT (PC6) in conflict with DCMI_D0 (Camera)STMOD+ RESET (PI7) in conflict with DCMI_D7 (Camera)STMOD+ ADC (PA4) in conflict with ARD_D7 and DCMI_HSYNC (Camera)STMOD+ PWM (PA5) in conflict with ARD_A5STMOD+ DFDATIN1 (PB12) in conflict with MEMs microphones (use SB1 in audio page)STMOD+ DF_CKOUT (PC2) in conflict with MEMs microphonesDFDATIN3 (PC7) in conflict with DCMI_D1 (Camera)
SB20SB16SB18
PB10 (*)
PB11
PA15
PC2 (*)
PMOD#1 (PA6)
CAUTION : Following STMod+/PMOD signals are multiplexed or shared with other functions. In caseSTMod+/PMOD module is plugged, take care that the corresponding features are disconnected or well configured :
TTTT
MFX_GPIO6
MFX_GPIO7
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Figure 33. 32L4R9IDISCOVERY Audio and DFSDM
Note: The STM32L4R9I-DISCO may use a different MB1311 board revision than C-01. Refer to Hardware Resources of STM32L4R9I-DISCO available on www.st.com for relevant documentation.
14 14
Audio&DFSDM
MB1311 C
28/08/2017
Title:
Size: Reference:
Date: Sheet: of
A4 Revision:
STM32L4R9I-DISCOProject:
2
6
4
3 CN12
PJ3028B-3
AGND
CODEC
SAI_SDB
SAI_FSA
SAI_MCKA
SAI_SDA
SAI_SCKA
SAI
SDASCL
I2C
CODEC_I2CI2C1_SCLI2C1_SDA
SAI1_SCKASAI1_MCKA
SAI1_FSASAI1_SDASAI1_SDB
LRCK1
SDA/CDIN2
SCL/CCLK3
AD0/CS4
VA_HP5
FLYP6
GND_HP7
FLYN8
VSS_HP9
AOUTB10
AOUTA11
VA12
AGND13
DAC_FILT+14
VQ15
ADC_FILT+16
MICIN1/ AIN3A17
MICIN2/ BIAS/AIN3B18
AIN2A19
AIN2B/BIAS20
AFILTA21
AFILTB22
AIN1A23
AIN1B24
RESET25
VL26
VD27
GND28
SDOUT29
MCLK30
SCLK31
SDIN32
GND33
U26
CS42L51-CNZ
AGND
22nFC59AGND
10uFC54
150pF
C77
AGND
+1V8
AGND
AGND
AUDIO_RST
AGND
AGND
I2C address of CS42L51 is 0x94 (AD0=0)
MFX_GPIO15
PE5PE2
PB9PE6PB5
PB6PG13
100nFC81
1uFC82
1uFC71
1uFC63
1uFC68
low ESR ceramic capacitor
low ESR ceramic capacitor
1uFC621uFC56
1uFC55
100nFC74
100nFC57
100nFC80
100KR59
10KR83
10KR80
2K2R64
50R58
50R57
100nFC70
0R82
1V8_CODEC
1V8_CODEC
VDD
SB29
SB30
GND5
DOUT4
CLK3
VDD1
LR2
U2
MP34DT01TR-M
GND5
DOUT4
CLK3
VDD1
LR2
U1
MP34DT01TR-M
PB12
PC2
DFSDM
DATIN1
CKOUT
DFSDMCKOUT
DATIN1
MIC_VDDPH2
100nFC1
100nFC2
10KR1
SB1
MIC_VDD
150pF
C76
must be C0G
22nFC58
1 32
4 5
U3ESDALC6V1W5
MIC_VDD
CKOUTDATIN1
LR
LR
AGND
I/O11
GND2
I/O23
I/O34
GND5
I/O46
U22
ESDA6V1BC6
GND3
DOUT1
CLK4
VDD5
LR2
U20 [N/A]
GND3
DOUT1
CLK4
VDD5
LR2
U19 [N/A]
C45[N/A]
C44[N/A]
R44 [N/A]
CKOUTMIC_VDD
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Figure 34. Round DSI display board (MB1314)
Note: The STM32L4R9I-DISCO may use a different MB1314 board revision than B-01. Refer to Hardware Resources of STM32L4R9I-DISCO available on www.st.com for relevant documentation.
1 1
1.2" DSI LCD with Capacitive Touch
MB1314 B.1
6/1/2017
Title:
Size: Reference:
Date: Sheet: of
A4 Revision:
STM32L4Rx-EVAL Daughter boardProject:
I2C_SDA
I2C_SCL
DSI_INT
DSI_BL_CTRL
Connector for motherboard
HSSI_CLK_NHSSI_CLK_P
HSSI_D0_NHSSI_D0_P
DSI_TE
DSI_RST
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
3131
3232
3333
3434
3535
3636
3737
3838
3939
4040
4141
4242
4343
4444
4545
4646
4747
4848
4949
5050
5151
5252
5353
5454
5555
5656
5757
5858
5959
6060
6161
6262
6363
6464
CN1
QTH-030-02-F-D-A-K-TR
BLGND
GND1
XRES2
DSI_D0N3
SWIRE4
DSI_D0P5
OTP6
GND7
TE8
DSI_CLKN9
GND10
DSI_CLKP11
GND12
GND13
GND14
VDDIO15
VCI16
GND17
GND18
ELVSS19
ELVDD20
ELVSS21
ELVDD22
ELVSS23
ELVDD24
PAD25
PAD26
PAD27
PAD28
CN2
504208-2410
HSSI_CLK_NHSSI_CLK_P
HSSI_D0_NHSSI_D0_P
DSI_TE
DSI_RST
Touch panel connector for LCD panel
C7100nF
VDDDSI_RSTDSI_INT
VDD
R14K7
I2C_SDAI2C_SCL
FPC05008-09200(ATOM)
GND6
GND1
INT2
SCL4
SDA5
RESET3
VCC8
IOVCC7
CN3
FH19C-8S-05SH
C8100nF
+3V3
SWIRE
+3V3VDD
ELVDDELVSS
C1100nF
+3V3VDD
C2100nFSWIRE_MCU
PVINA1
LX
3A
2
LX1A3
LX2B1
AV
DD
B2
PG
ND
B3
VO2C1
AG
ND
C2
VO1C3
EN
D1
Sw
ire
D2
AVIND3
U1SM3321
BLGND
BLGND
BLGND
BLGND
BLGND
BLGND
ELVDD ELVSSBLGND
SWIRE
SWIRE_MCU
R3[N/A]
R2[N/A]
SB3
SB4
SB2
L1DFE201610E-4R7M=P2
C9
GRM188R61A106KE69D
H1
390x390 pixels DSI LCD
ZZ1
IEG1120TB103GF-001
R4[N/A]
BLGND
SB5
DSI_BL_CTRL
SB1
Rev B.1: BLVDD use +3V3, add L3, L4, C11 and C12, remove D1, D22. L1, L2 footprint update 0806L3. RevB, remove C11
C6100nF
C3100nF
L2
DFE201610E-4R7M=P2
C10GRM188R61A106KE69D
C5GRM188R61A106KE69D
C4GRM188R61A106KE69D
I2C address: 0x70 IC:FT3267
+3V3
L3BEAD(FCM1608KF-601T03)
C12100nF
L4BEAD(FCM1608KF-601T03) BLGND
C1110uF
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Figure 35. Fanout board (MB1280)
Note: The STM32L4R9I-DISCO may use a different MB1280 board revision than A-02. Refer to Hardware Resources of STM32L4R9I-DISCO available on www.st.com for relevant documentation.
1 1
Fanout Board
MB1280 A.2
10/10/2017
Title:
Size: Reference:
Date: Sheet: of
A4 Revision:
STM32H7-DK-DBProject:
12345678910
11121314151617181920
CN1
TMM-110-01-L-D-RA
STMOD#11-INTSTMOD#12-RSTSTMOD#13-ADCSTMOD#14-PWM
STMOD#17-DF-D3STMOD#18-DF-CK3STMOD#19-DF-D7STMOD#20-DF-CK7
+5V
STMOD#1STMOD#2STMOD#3STMOD#4
STMOD#11STMOD#12
STMod+
1234
5678
CN4
Header 4X2A
1234
CN3
1125S-SMT-4P
12345678910
CN12
PAD 1X8
STMOD#7STMOD#8STMOD#9STMOD#10
STMOD#13STMOD#14
STMOD#17STMOD#18STMOD#19STMOD#20
VCC
R1
4K7[N/A]
R24K7[N/A]
I2C_SCL
I2C_SDA
2
13
G
SD
T2BSN20[N/A]
2
13
G
SD
T1BSN20[N/A]
123456789
10
CN9
PAD 1X8
12345678
CN11
Header 8X1_Female
12345678
CN10
Header 8X1_Female
STMOD#1STMOD#2STMOD#3
STMOD#4STMOD#7
STMOD#8STMOD#9
STMOD#10
STMOD#1STMOD#2STMOD#3
STMOD#4STMOD#7
STMOD#8STMOD#9
STMOD#10
STMOD#11STMOD#12STMOD#13 STMOD#14
STMOD#17STMOD#18
STMOD#19STMOD#20
STMOD#11STMOD#12STMOD#13 STMOD#14
STMOD#3
STMOD#2STMOD#11STMOD#14
STMOD#12STMOD#13
STMOD#7
STMOD#10
I2C_SCLI2C_SDA
VCC
+5V
+5V+3V3
STMOD#1-NSS/CTSSTMOD#2-MOSIp/TXSTMOD#3-MISOp/RXSTMOD#4-SCK/RTS
STMOD#7-SCLSTMOD#8-MOSIsSTMOD#9-MISOsSTMOD#10-SDA
ANRSTCSSCKMISOMOSI+3.3VGND
PWMINTRXTXSCLSDA+5VGND
GNDGPIO2GPIO0TXD
RXDCH_PDRSTVCC
+5V +3V3
+3V3+5V VCC
+3V3
STMOD#7
STMOD#10
I2C_SCL
I2C_SDA
Only PAD for bread board connection
support Grove- Barometer sensor (BMP180)
Mikrobus connectors
Bread board connectors ESP-01 connector
Grove connector
32
1
JP1
TP1Ground
closed pin2 and pin3 for default
support Grove- LCD RGB Backlight
1234
CN2
1125S-SMT-4P
VCC
support Grove- NFC
STMOD#2STMOD#3
TXRX
SCLSDA
C2
1uF_X5R_0603
C510nF_X7R_0603
C31uF_X5R_0603
C1100nF
C4100nF
51
2
GND
3
4
BYPASSEN
Vin Vout
U1 LDK120M33R
SB2 Closed
SB1 Closed
ATOM: PH200210C-07000
+5V
+3V3
Only PAD for Power
12
CN5
PAD 2
12
CN6
PAD 2
+5V
+3V3
Only PAD for Power
12
CN7
PAD 2
12
CN8
PAD 2
Fanout board (MB1280) UM2271
72/77 UM2271 Rev 4
Appendix E Fanout board (MB1280)
The fanout board (Refer to Figure 36) is included in the 32L4R9IDISCOVERY kit. It is connectible to STMod+ connector (CN1) and it provides access to:
• MikroElektronika Click board compatible connectors (CN10 and CN11: two 1x8-pin female connectors)
• ESP-01 compatible connector (CN4: 2x4-pin female connector)
• Seeed Studio™ Grove compatible connectors (CN3 and CN2: two 1x4-pin male connectors)
• Reserved standard 2.54 mm pitch of STMod+ pin header for breadboard.
The main active component for this fanout board is the 3.3 V regulator U1 (200 mA).
Figure 36. STMod+ fanout module plugged into CN1 connector
E.1 MikroElektronika mikroBUS™ compatible connector (Fanout CN10 / CN11)The mikroBUS™ compatible connector is 2.54 mm pitch with a pair of 1x8-pin female
connectors. Table 34 shows the definition of the pins.
MSv48400V1
Breadboard connectors
mikroBUSconnectors
ESP-01 Wi-Fi connector
Grove UART connector
STMod+ female Discovery
board connector
VCC selection (3V3 by default)
Grove I2C connector
Fanout STMod+ male
connector
Table 34. Description of the mikroBUS™ connectors (CN11 and CN10)(1)
STMod+ connector CN11 number
Function of mikroBUS
Pin
number
Pin
numberFunction of mikroBUS
STMod+ connector CN10 number
STMod+#13-ADC AN 1 1 PWM STMod+#14-PWM
STMod+#12-RST RST 2 2 INT STMod+#11-INT
UM2271 Rev 4 73/77
UM2271 Fanout board (MB1280)
76
The mikroBUS™ pinout assignment is available at the: http://mikroe.com website.
E.2 ESP-01 Wi-Fi® board compatible connector
The ESP-01 Wi-Fi board connector is 2.54 mm pitch with 2x4-pin female connectors. Table 35 shows the definition of the pins.
E.3 Compatible connectors for the Grove boards
The two connectors of the Grove board are 2.54 pitch with 1x4-pin male connectors, the part number is 1125S-SMT-4P.
E.3.1 Compatible connector for I2C Grove boards (Fanout CN3)
The CN3 connector is compatible with Grove- Barometer sensor (BMP180) and Grove-LCD RGB Backlight boards using a cable for connection. Table 36 shows the definition of the pins.
STMod+#1-CS CS 3 3 RX STMod+#3-RX
STMod+#4-SCK SCK 4 4 TX STMod+#2-TX
STMod+#9-MISOs MISO 5 5 SCL STMod+#7-SCL
STMod+#8-MOSIs MOSI 6 6 SDA STMod+#10-SDA
- +3.3 V 7 7 +5 V STMod+#6#15 +5V
STMod+#5#16 GND GND 8 8 GND STMod+#5#16 GND
1. Refer to Appendix C to check STMod+ pin sharing with other functions of the 32L4R9IDISCOVERY
Table 34. Description of the mikroBUS™ connectors (CN11 and CN10)(1) (continued)
STMod+ connector CN11 number
Function of mikroBUS
Pin
number
Pin
numberFunction of mikroBUS
STMod+ connector CN10 number
Table 35. Description of the ESP-01 Wi-Fi board connector pins(1)
1. Refer to Appendix C to check STMod+ pin sharing with other functions of the 32L4R9IDISCOVERY.
STMod+ connector number
Function of ESP-01
Pin
number
Pin
numberFunction of
ESP-01STMod+ connector
number
STMod+#5#16 GND GND 1 8 TXD STMod+#3-RX
STMod+#14 GPIO2 2 7 CH_PD STMod+#13
STMod+#11 GPIO0 3 6 RST STMod+#12-RST
STMod+#2-TX RXD 4 5 VCC -
Fanout board (MB1280) UM2271
74/77 UM2271 Rev 4
Note the following limitations linked to Grove connector:
• MB1280A & MB1280B Grove connector does not support the 5V I2C interface.
• MB1280C can support the 5V I2C interface for the Grove connector, but users must solder the MOSFETs and related matched resistors by themselves.
• MB1280C board only supports 3V3 to 3V3 or 3V3 to 5V I2C interface.MB1280A & MB1280B Grove connector does not support the 5V I2C interface.
E.3.2 Compatible connector for UART Grove boards (Fanout CN2)
The CN2 connector is compatible with Grove-NFC boards using a cable for connection. Table 37 shows the definition of the pins.
Table 36. Description of the I2C Grove board connector pins (CN3)(1)
1. Refer to Appendix C to check STMod+ pin sharing with other functions of the 32L4R9IDISCOVERY.
STMod+ connector NO. Function of Grove CN3 Pin number
STMod+#7-SCL SCL 1
STMod+#10-SDA SDA 2
STMod+#6#15 +5 V VCC 3
STMod+#5#16 GND GND 4
Table 37. Description of the UART Grove board connector pins (CN2)(1)
1. Refer to Appendix C to check STMod+ pin sharing with other functions of the 32L4R9IDISCOVERY.
STMod+ connector Function of Grove CN2 Pin number
STMod+#3-RX RX (Grove TX) 1
STMod+#2-TX TX (Grove RX) 2
STMod+#6#15 +5 V VCC 3
STMod+#5#16 GND GND 4
UM2271 Rev 4 75/77
UM2271 Federal Communications Commission (FCC) and Industry Canada (IC) Compliance
76
Appendix F Federal Communications Commission (FCC) and Industry Canada (IC) Compliance
This kit is designed to allow:
1. Product developers to evaluate electronic components, circuitry, or software associated with the kit to determine whether to incorporate such items in a finished product and
2. Software developers to write software applications for use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product does not cause harmful interference to licensed radio stations and that this product accepts harmful interference. Unless the assembled kit is designed to operate under part 15, part 18 or part 95 of 47 CFR, Chapter I (“FCC Rules”), the operator of the kit must operate under the authority of an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
Revision history UM2271
76/77 UM2271 Rev 4
Revision history
Table 38. Document revision history
Date Revision Changes
17-Oct-2017 1 Initial version
26-Oct-2017 2
Updated:
– Chapter 10.6.1: clarification on SW1 use
– Table 4: pin name ARD-5V
– Table 5: JP4 CHGR position description
– Table 28: Unused functions
– Table 30: Reserved solder bridges
4-Jan-2018 3
Updated:
– Figure 4: JP1 description
– Section 8: bootloader limitation
– Section 10.5 and Table 3: SW1
– Section 10.6.1 and Table 4: ARD and JP1
– Section 10.9: boot configuration
– Table 12, Table 27, Table 28
– Appendix F
Added:
– Section 10.13.2 and Section 11.3: limitation
Removed:
– Appendix G
12-Feb-2020 4
Reorganized the entire document:
– Updated: Features, Ordering information, and Development toolchains
– Added Codification
Added:
– Compatibility and limitations with Grove I2C connector in Section E.3.1
– Notes under Figure 20 to Figure 35 schematics regarding latest versions available on www.st.com
UM2271 Rev 4 77/77
UM2271
77
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