ts-3 single-phase grid-connected photovoltaic system using rectified sinusoidal hysteresis current...

8/10/2019 Ts-3 Single-phase Grid-connected Photovoltaic System Using Rectified Sinusoidal Hysteresis Current Control.thesis

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SINGLE-PHASE GRID-CONNECTED PHOTOVOLTAIC SYSTEM USING RECTIFIED

SINUSOIDAL HYSTERESIS CURRENT CONTROL

MR. CHAINON CHAISOOK

A THESIS SUBMITTED IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR

THE DEGREE OF MASTER OF ENGINEER (ELECTRICAL ENGINEERING)

FACULTY OF ENGINEERING

KING MONGKUTS UNIVERSITY OF TECHNOLOGY THONBURI

2002


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Single-Phase Grid-Connected Photovoltaic System U sing Rectified Siilusoidal

Hysteresis Current Control

Mr. Chainon Chaisook B.Eng. (Control System Eng ineering)

A The sis Submitted in Partial Fulfillment of the Re quirem ents for

the Degree

of

Master o Engineering (Electrical Engineering)

Faculty of E ngineering

King Mongkut7sUniversity of Technology Tho~lburi

2 2

Thesis C oillinittee

Chairman

(A ssoc . Prof. A ke Cha isawad, P11.D.)

Co-Chairman

(Veerapol Monyaltul, Ph.D.)

b l e m i i

...................................... ....,l :.............................

-

Member

(Asst. Prof. Udomsak Yangyuen)

...........................................

..................................

Member

(As soc. Prof. Pitikhate Sooraksa, Ph. D.

)

Copyright reserved

I S B N 974 456 186 6


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Thesis Title Single-Phase Grid-Connected Photovoltaic System Using

Rectified Sinusoidal Hysteresis Current Control

Thesis Credits 12

Candidate Mr. Chainon Chaisook

Thesis Advisors Assoc. Prof. Dr. Ake ChaisawadDr. Veerapol Monyakul

Program Master of Engineering

Field of Study Control System and Instrumentation Engineering

Department Control System and Instrumentation Engineering

Faculty Engineering

B.E. 2545

Abstract

In most of grid-connected photovoltaic power system, a DC-DC converter boosts PV

voltage to be the DC voltage that exceeds grid voltage at high switching frequency. An

inverter then shapes the current into the sinusoidal waveform at high switching

frequency and injects the current into the grid. Unlike this research, a two-switch

forward converter has many obligations. The converter boosts PV voltage to exceed

grid voltage and shapes the output current to be rectified sinusoidal waveform at high

switching frequency; it also isolates PV voltage from the grid. The four-MOSFET

bridge inverter is only used to unfold the rectified sinusoidal current to be the sinusoidal

current at the exact grid frequency (50 5 Hz). An ADMC331, a DSP made by Analog

Device Inc., and a number of HCPL788J optical isolated sensors are used as the brain of

the system. Four variables must be measured and sent to the DSP, these variables arePV voltage (Vpv), PV current (Ipv), output current (Io) and grid voltage (Vgrid). By using

HCPL788J these variables are isolated and measured. At the beginning of the process,

ADMC331 generates a rectified sinusoidal waveform (Isine) from Vgrid. The processor

simultaneously tracks the maximum power point of the PV panels from Vpvand Ipvby

controlling the output current so that dP/dV = 0. At the maximum power point, the

processor calculates a maximum current and generate a reference current (Iref) by

scalingIsinewith the maximum current. The processor then uses hysteresis controller in

order to shapeIoto matchIref. As the result, the output current has exact the same phase

and frequency as the grid voltage; the amplitude of Iois varied to match the maximum

power in which the photovoltaic array can provide. The processor is also programmed

to stop all process whenever the grid power is fail and/or the frequency of Io is overrange (50 5 Hz). This power system was tested during noon until 4 P.M. of February

and March, 2003. The system was connected with 120-W photovoltaic array which was

installed in the opened space and was reached by sunlight. The performance of the

systems (converter, inverter, control scheme and total system) was calculated and was

set as the performance table.

Keywords: Grid-Connected / Photovoltaic / Double Forward Converter / Hysteresis /

Current Control / Digital Signal Processor


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ACKNOWLEDGEMENTS

This thesis is dedicated to my father and my mother who always dream that their

children would, at least, graduate the master!s degree. Deeply thank to them for yearsof support. The author wishes to express deepest gratitude to his advisors (Assoc. Prof.

Ake Chaisawad, Ph.D. and Dr. Veerapol Monyakul) for their continuing advice,

encouragement and dedication to this thesis. Both of them have instructed and given a

lot of significant advice to the author for years. Moreover, they also kindly provided

equipment and laboratory support. The author would like to show his appreciation to all

of the thesis committee, which includes Asst. Prof. Udomsak Yangyuen and Assoc.

Prof. Pitikhate Sooraksa, Ph.D. Not only being members of the committee, they also

provided several considerable suggestions and knowledge to the author. Moreover, the

author wishes to acknowledge Mr. Dumrong Amorndechapon, a lecturer of the Dept. of

Electrical Engineering. KMUTT; whose his technical supports the thesis are a great help

for the thesis to complete.

Thanks to friends (Keng, Sith, Murf and Nok) who always help the author challenge

many problems. Special appreciation must be demonstrated to Linzey Yeaung for the

best moral support. Without these people, the author would not have fulfilled the

master!s degree.


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CONTENTS

PAGE

ENLIGSH ABSTRACT ii

THAI ABSTRACT iii

ACKNOWLEDGEMENTS iv

CONTENTS v

LIST OF TABLES vii

LIST OF FIGURES viii

LIST OF SYMBOLS xi

CHAPTER

1. THESIS OVERVIEW 1

1.1 Thesis Overview 11.2 Literature Review 1

1.3 Thesis Objectives 6

1.4 Thesis Procedures 6

1.5 Thesis Concepts 6

2. THEORIES 8

2.1 The Basic of Photovoltaics 8

2.2 Maximum Power Point Tracking (MPPT) 10

2.3 Forward Converter 12

2.4 Hysteresis Current Control 19

2.5 The Characteristics of ADMC331 Digital Signal Processor 20

3. SYSTEM DEVELOPMENT 25

3.1 Hardware Development 25

3.1.1 System Overview 25

3.1.2 Photovoltaic Array 26

3.1.3 ADMC331 DSP Board 27

3.1.4 Rectified Sinusoidal Hysteresis Controller 30

3.1.5 Two-Switch Forward Converter 313.1.6 Single Phase Inverter 33

3.1.7 Gate Drivers 35

3.1.8 Sensors 37

3.1.9 Zero-Crossing Detector 41

3.2 Software Development 42

3.2.1 System Overview 42

3.2.2 Analog-To-Digital Converting Algorithm 42

3.2.3 Current Sink Algorithm 43

3.2.4 Maximum Power Point Tracking (MPPT) Algorithm 443.2.5 Iref Generating Algorithm 46

3.2.6 Islanding Algorithm 46


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4. THE EXPERIMENTS AND RESULTS 48

4.1 Experiment 1: System Characteristics 48

4.1.1 Objectives 48

4.1.2 Instruments 48

4.1.3 Procedures 48

4.2 Experiment 2: System Performance 59

4.2.1 Objectives 59

4.2.2 Instruments 59

4.2.3 Procedures 59

4.2.4 Experimental Results 60

5. CONCLUSIONS 64

5.1 Conclusions 64

5.2 Future Improvements 665.2.1 Current Controller 66

5.2.2 Harmonics Elimination 67

REFERENCES 69

APPENDIX 71

A Specification Sheets of MSX-Lite 30 Solar Module 71

B Transformer Design 74

C Inductor Design 79

CURRICULUM VITAE 83


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LIST OF TABLES

TABLE PAGE

4.1 Measured Voc andIscon March 2, 2003 60

4.2 Measured Vmp,Imp, andPmaxon March 2, 2003 61

4.3 Measured Vpv,Ipv, andPpvon March 3, 2003 62

4.4 Measured Vgrid,Igrid, andPgridon March 3, 2003 62

4.5 Performance of the system 63


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LIST OF FIGURES

FIGURE PAGE

1.1 (a) Grid-interactive VCI; (b) Grid-interactive CCI 2

1.2 Line-commutated single-phase inverter 3

1.3 Self-commutated inverter with PWM technique 4

1.4 PV inverter using high-frequency transformer 4

1.5 Noninsulated current source 5

1.6 Flyback converter with a thyristor inverter 5

1.7 Buck converter with half-bridge transformer link 6

1.8 Conceptual diagram of the grid-connected PV system for this thesis 7

2.1 Principle of the operation of a solar cell [3] 8

2.2 Current vs voltage (I-V) and current vs power (I-P) characteristics for 9

a solar cell

2.3 PV in various configurations 9

2.4 Effect of temperature on a solar cell 10

2.5 TypicalI-Vcharacteristic curves for different radiation levels 10

2.6 Typical power vs voltage characteristics for increased radiation levels 11

2.7 PV array and load characteristics 11

2.8 Basic forward converter 12

2.9 Basic forward converter with its equivalent circuit model 13

2.10 Waveforms of the forward converter 13

2.11 Forward converter; (a) during subinterval 1 (b) during subinterval 2

(c) during subinterval 3 14

2.12 Two-switch forward converter 16

2.13 Secondary side forward converter switching waveforms 17

2.14 Hysteresis current control 20

2.15 Functional block diagram of ADMC331 21

2.16 ADSP-2100 core block diagram 22

2.17 ADC block diagram 23

2.18 The operation of ADC system 23

2.19 Programmable interval timer architecture 24

3.1 Block diagram of grid-connected power system 25

3.2 Configuration of a 120-Watt PV array 27

3.3 Diagram of control algorithms inside ADMC331 28

3.4 Schematic of the ADMC331 and TLV5618A circuit board 29

3.5 Diagram of the rectified sinusoidal hysteresis controller 30

3.6 Schematic of the rectified sinusoidal hysteresis controller 303.7 Hysteresis gap and the output of TLV5618A 31

3.8 Diagram of the two-switch forward converter 31


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3.9 Schematic of the two-switch forward converter 33

3.10 Diagram of the single phase inverter 34

3.11 A voltage-bidirectional two-quadrant switch 34

3.12 Schematic of the single phase inverter 35

3.13 Diagram of the converter gate drive circuit 35

3.14 Schematic of the converter gate drive circuit 36

3.15 Diagram of the inverter gate drive circuit 36

3.16 Schematic of the inverter gate drive circuit 37

3.17 Diagram of where sensors are positioned 37

3.18 Function diagram of HCPL-788J 38

3.19 Diagram of VgridSensor 39

3.20 Diagram of Vpvsensor 39

3.21 Diagram ofIpvSensor 403.22 Diagram ofIosensor 41

3.23 Diagram of zero-crossing detector 41

3.24 Diagram shows control algorithms which are programmed into 42

ADMC331

3.25 Diagram of the ADC algorithm 43

3.26 Diagram of the current sink algorithm 44

3.27 Diagram of the MPPT algorithm 44

3.28 Characteristic diagram ofv pvdP dV versus Vpv 45

3. 29 Diagram of the maximum power point tracking algorithm 45

3.30 Diagram of theIrefgenerating algorithm 46

3.31 Diagram of the islanding algorithm 47

4.1 Positions of probes which were installed to investigate VpriandIpri 49

of the isolated transformer

4.2 Voltage and current of the primary side of the isolated transformer 49

4.3 Positions of probes installed to investigate VsecandIsecof the 50

transformer

4.4 Voltage and current of the secondary side of the isolated transformer 50

4.5 Positions of voltage-different probe and current probe 51

4.6 Voltage and current across the output inductor 52

4.7 Positions of probes installed to measure VOandIOof the output 52

inductor

4.8 Output voltage and output current of the two-switch forward 53

converter

4.9 Positions of probes which were connected to measure the voltage and 54

current of the distribution line.

4.10 Voltage and current which was transferred to grid. 54

4.11 Positions of probes which were installed to determinefsminandDmin. 55

4.12 Minimum switching frequency which was generated by hysteresis 55


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controller

4.13 Minimum duty cycle which was generated by hysteresis controller. 56

4.14 Positions of probes which were installed to determinefsmaxandDmax. 57

4.15 Maximum switching frequency which was generated by hysteresis 57

controller

4.16 Maximum duty cycle which is generated by hysteresis controller. 58

4.17 (a) Vocmeasurement, (b)Iscmeasurement, and (c)Pmaxmeasurement. 60

4.18 Positions of probes which were used to investigate the system 61

efficiency

5.1 The conventional grid-connected PV system. 64

5. 2 The grid-connected PV system designed in this thesis. 65

5.3 Basic current control scheme using SPWM. 66

5.4 Sinusoidal pulse-width modulation. 675.5 Harmonic trap filters; (a) the diagram (b) equivalent circuits. 68


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LIST OF SYMBOLS

"iL = peak-to-peak inductor ripple current (A)

"vc = peak-to-peak capacitor ripple voltage (V)"vo = peak-to-peak output ripple voltage of a converter (V)

C = capacitor (F)

Ci = capacitor connected in parallel the PV array (F)

Co = output capacitor of two-switch forward converter (F)

D = duty cycle (%)

Dmax = maximum duty cycle (%)

Dmin = minimum duty cycle (%)

fs = switching frequency (Hz)fsmax = maximum switching frequency (Hz)fsmin = minimum switching frequency (Hz)

HB = hysteresis bandiL(t) = current of an inductor (A)

iM(t) = magnetizing current (A)

K = magnitude of the reference current calculated by MPPT (A)

N = turn ratio of a transformer

Npri = turn number of the primary winding (Turn)

Nsec = turn number of the secondary winding (Turn)

Ierr = error current (A)

Inorm = normalized grid voltage (V)

Imp = current at which solar cells generate the maximum power (A)

Io = output current of the forward converter (A)

Iph = photocurrent which is current internally generated in solar cell (A)Ipri = current flows through the primary side of the isolated transformer (A)

Ipv = output current of the photovoltaic array (A)

Iref = full wave sinusoidal reference current generated by DSP (A)

Isc = short circuit current of the solar cell (A)

Isec = current flows through the secondary side of the isolated transformer (A)

L = inductor (H)

LM = magnetization inductance of a transformer (H)

Lo = output inductor of two-switch forward converter (F)

P = average power (W)

Pgrid = power which is transferred to the distribution line or grid (W)

Pmax = maximum power (W)Ppv = power of PV array which is tracked by MPPT (W)

Rsense1 = sensing resistance chosen to measure the PV array current (A)

Rsense2 = sensing resistance chosen to measure the PV array voltage (V)

Rsense3 = sensing resistance chosen to measure the converter output current (A)

tck = the ADMC331 processing cycle which equals 38.5 ns at 13 MHz input

clock (s)

T = switching period (s)

TCRST = PWMSYNC pulse width which by default is 1.54 #s. (s)

Tmax = maximum switching period (s)

Tmin

= minimum switching period (s)

ton = turn-on time of a switching element (s)

toff = turn-off time of a switching element (s)

TPWM = PWM period defined in ADMC331 (s)


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vc(t) = capacitor voltage (V)

Vg = input voltage of a converter (V)

Vgrid = 220V single phase grid voltage (V)

vL(t) = voltage across an inductor (V)

VIN+ = positive input voltage of HCPL-788J (V)VIN- = negative input voltage of HCPL-788J (V)

Vmp = voltage which solar cells generate the maximum power (V)

Vo = output voltage of the forward converter (V)

Voc = open circuit voltage of the solar cell (V)

Vpri = secondary side voltage of a transformer (V)

Vpv = output voltage of the photovoltaic array (V)

Vsec = secondary side voltage of a transformer (V)

$ = phase shift (Rad)

% = firing angle (Deg)

&mppt = efficiency of the maximum power point tracking algorithm (%)

&inv = efficiency of converter and inverter (%)&sys = overall efficiency which includes MPPT, converter, and inverter (%)


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CHAPTER 1 THESIS OVERVIEW

The Kyoto agreement on global reduction of greenhouse gas emissions has prompted

renewed interest in renewable energy system world wide. Many renewable energy

technologies today are well developed, reliable, and cost competitive with the

conventional fuel generators. The cost of renewable energy technologies is on a falling

trend as demand and production increases. There are many renewable energy sources

such as solar, biomass, wind, and tidal power. The solar energy has several advantages

for instance clean, unlimited, and its potential to provide sustainable electricity in area

not served by the conventional power grid. As a consequence of these reasons and the

tropical climate, solar energy is the most suitable renewable energy source in Thailand.

However, the solar energy produces the dc power, and hence power electronics andcontrol equipment are required to convert dc to ac power. There are two types of the

solar energy system; stand-alone power system and grid-connected power system. Both

systems have several similarities, but are different in terms of control functions. The

stand-alone system is used in off-grid application with battery storage. Its control

algorithm must have an ability of bidirectional operation, which is battery charging and

inverting. The grid-connected system, on the other hand, inverts dc to ac and transfers

electrical energy directly to power grid. Its control function must follow the voltage and

frequency of the utility-generated power presented on the distribution line. However,

this thesis only scopes on the grid-connected power system. Several inverter topologies

can be applied to the system; they all have the same objectives but are different in the

principles. Section 1.2 covers many research literatures in grid-connected applications.The basic principles applied to achieve the thesis objectives are stated in section 1.5.

Several theories which involve in this thesis are presented in chapter 2. Those theories

include the basics of photovoltaic (PV), the forward converter, rectified sinusoidal

hysteresis current control, and the characteristics of ADMC331 digital signal processor.

In chapter3, those theories are first applied; the mathematical model of the system is

then built. The digital control functions are designed so that they follow the voltage and

frequency of the distribution line. MATLAB/SIMULINK is utilized to predict the

dynamic behavior of the system. The simulation results are presented at the end of

chapter 3. In chapter 4, the experiment is built following the simulation concept. All of

the control functions are programmed to ADMC331; a digital signal processor ofAnalog Devices Inc. The experimental results are also presented at the end of the

chapter. Chapter 5 covers the conclusions and future works which can be adapted to

this thesis.

The inverters used for grid interfacing are classified as voltage-source inverter (VSI)

and current-source inverter (CSI). Each type of the inverters can be subdivided based

on the control schemes; which are voltage-control inverter (VCI) and current-control

inverter (CCI) [1]. In VSI, the dc side is made to appear to the inverter as a dc source.

The voltage-source inverters have a capacitor in parallel with the dc input. The current-

source inverters, on the contrary, have an inductor in series with the dc input.

1.1 Thesis Overview

1.2 Literature Review

1.2.1 Inverter Classifications


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Photovoltaic arrays are fairy good approximation to a current source. However, most of

PV inverters are voltage-source inverters. Solar arrays in this thesis are also

implemented as a voltage source.

Figure 1.1(a) shows a single-phase full bridge bidirectional voltage-source inverter witha voltage control and phase shift () control. The active power transfer from the PV

panels is accomplished by controlling phase angle between the inverter voltage and the

grid voltage. Therefore, the inverter voltage follows the grid voltage.

Figure 1.1b shows the VSI operated as a current-control inverter (CCI). The objective

of this control scheme is to control active and reactive components of the current fed

into the grid.

Figure 1.1(a) Grid-interactive VCI; (b) Grid-interactive CCI

In this thesis, solar arrays are implemented as a voltage source, the inverter are designed

based on CCI. The output current of the inverter are controlled to follow phase angleand frequency of the grid. As the consequences, this inverter appears as a current

source in parallel with the grid.

Various types of inverter are in use for grid-connected power system, including the

following:

- Line-commutated inverter

- Self-commutated inverter

- Inverter with high-frequency transformer

-

Other PV inverter topologies

1.2.2 Inverter Types


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The basic diagram for a single-phase line-commutated inverter is shown in Figure 1.2

[2]. The control scheme has to change the firing angle (!) from the rectifier operation

(0o< !< 90o) to the inverting operation (90o


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Figure 1.3 Self-commutated inverter with PWM technique

The 50-Hz transformer for a standard PV inverter with pulse width modulation (PWM)

switching scheme can be very heavy and costly. When the switching frequency is

greater than 20 kHz, a ferrite core transformer can be a better option [2]. A circuit

diagram of a grid-connected PV system using high-frequency transformer is shown inFigure 1.4.

The high-frequency inverter with PWM is used to produce a high-frequency ac across

the primary winding of the high-frequency transformer. The high-frequency rectifier

rectified the voltage across the secondary winding. The dc is interfaced with a thyristor

inverter through a low-pass inductor filter and hence connected to the grid. The line

current is required to be sinusoidal and in phase with line voltage. To achieve this, the

grid voltage must be measured to establish the reference waveform for the line current.

This reference current is then multiplied by the transformer ratio gives the reference

current at the output of the high-frequency inverter. Current-control technique can be

applied in order to control the output of the inverter. Most of PV inverters appear at

present, including this thesis, are based on PV inverter with high-frequency transformer.

However, the inverter presented in Figure 1.4 has too many high-frequency switching

elements; this thesis tends to decrease the number of switching elements as many as

possible.

Figure 1.4PV inverter using high-frequency transformer

1.2.2.3 Inverter with High-Frequency Transformer


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In this section, a number of PV inverters are discussed in various research papers.

This type of topology is shown in Figure 1.5. The PV panels are configured to be acurrent source by connecting with two inductors in series. The PV current is controlled,

through high-frequency MOSFET/IGBT inverter, so it has the same phase angle and

frequency with the distribution line. This configuration involves low cost and can

provide better efficiency compare to the noninsulated voltage source. Appropriate

controllers can be applied to reduce current harmonics. Moreover, this topology

provides an important idea of paralleling a current source with the grid. Paralleling the

current source with the voltage source avoids the problem such as imbalance voltage in

paralleling two voltage sources. Unfortunately, this topology lacks of the appropriate

step-up converter therefore it cannot be operated whenever the voltage across PV panels

is less than rated grid voltage [3].

Figure 1.5Noninsulated current source

With a proper PWM control scheme, this converter [4] steps up the PV voltage to dc

bus voltage. The higher dc bus voltage is interfaced with a thyristor inverter through a

low-pass inductor filter and hence connected to the distribution line, Figure 1.6. This

scheme is less complex, less cost and has fewer high-frequency switching elements. Its

compact size made it suitable for remote PV applications. Unfortunately, it is

commonly used at the 50 to 100 W power range [4].

Figure 1.6 Flyback converter with a thyristor inverter

1.2.2.4 Other PV Inverter Topologies

a. Noninsulated Current Source

b. Flyback Converter with a Thyristor Inverter


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Low voltage PV panels are connected to grid via a buck converter and half-bridge as

shown in Figure 1.7. In this scheme, the buck converter uses PWM to generate an

attenuated rectified 100-Hz sine wave current waveform [5]. The half-wave bridge is

only used to convert this rectified output to a 50-Hz current waveform which is feasiblefor grid interconnection. The advantage of this configuration is the requirement of

only one high-frequency switching element. To step up the output voltage, the low-

frequency transformer is required. The output voltage is quite low because buck

converter steps down the PV voltage; the turn ratio of the transformer is therefore high.

As these consequences, the low-frequency transformer is heavy and costly.

Figure 1.7Buck converter with half-bridge transformer link

- Design and construct a system that can convert the solar energy into the

electrical energy and transfer this energy to the distribution line.

-

Design and construct the inverter which can convert the direct current to thealternating current by using a rectified sinusoidal hysteresis current control.

-

Tend to reduce the number of the high frequency switching elements as

many as possible.

- Design a controller in which it can control the system to operate at the

maximum power the photovoltaic array can provide.

- Study the characteristics of the PV array.

- Design a two-switch forward converter and a single phase inverter.

-

Study and design controllers which include the hysteresis current control, the

maximum power point tracking (MPPT), and the islanding algorithm.-

Program the controllers and download them into the ADMC331 16-bit

digital signal processor.

In most of the grid-connected PV applications, a DC-DC converter tracks the maximum

power point in which the PV is able to provide. The converter also boosts the PV array

voltage to be a dc voltage which exceeds the grid voltage at high switching frequency.

In the mean time, a single phase inverter shapes the output current into the sinusoidal

waveform; which matches the frequency and phase of the distribution line; at high

switching frequency. As the consequence, the system converts the solar energy and

transfers the maximum energy into the distribution line.

c. Buck Converter with Half-bridge Transformer Link

1.3 Thesis Objectives

1.4 Thesis Procedures

1.5 Thesis Concepts


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In this thesis, however, the DC-DC converter tracks the PV"s maximum power point

and shapes the PV array voltage into the rectified sinusoidal current at high switching

frequency. Because the converter consists of a high frequency transformer, the

converter hence isolates the distribution line from the PV array and the rest of the

system. The single phase inverter is only used to unfold this rectified current to be a50 Hz sinusoidal current, the switching frequency is also 50 Hz. Note that this thesis

reduces high switching components from five components (one is for the converter,

others are for the inverter) to two components for the converter.

Figure 1.8 Conceptual diagram of the grid-connected PV system for this thesis


21/97

CHAPTER 2 THEORIES

Several theories involving in this thesis are discussed in details in this chapter. Those

theories include:

2.1 The Basic of PhotovoltaicsThe density of power radiated from the sun (referred to as the solar energy constant!)

at the outer atmosphere is 1.373 kW/m2. Part of this energy is absorbed and scattered

by the earth#s atmosphere. The final solar energy that reaches the earth#s surface has

the peak density of 1 kW/m2 at noon in the tropics. The technology of photovoltaic

(PV) is essentially concerned with the conversion of the solar energy into suitable

electrical energy. The basic element of PV system is a solar cell. By settling solar cells

under the sunlight, they can convert solar energy directly to electricity. This electricity

can be modified to any consumer applications such as lighting, water pumping,refrigeration, telecommunications, and so on. Solar cells rely on a quantum-mechanical

process known as the photovoltaic effect! to produce electricity. A typical solar cell

consists of ap-njunction formed in a semiconductor material similar to a diode. Figure

2.1 shows a schematic diagram of the cross section structure through a crystalline solar

cell. It consists of a 0.2-0.3 mm thick monocrystalline or polycrystalline silicon wafer

having two layers with different electrical properties formed by doping! it with other

impurities (e.g., boron and phosphorus). An electric field is established at the junction

between the negatively doped (using phosphorus atoms) and the positively doped (using

boron atoms) silicon layers [3]. If sunlight impacts the solar cell, the energy from the

sunlight (photons) creates free charge carries, which are separated by the electrical field.

An electrical voltage is generated at the external contacts, so that current flows when aload is interfaced. The photocurrent (Iph), which is internally generated in solar cell, is

proportional to the radiation intensity.

Figure 2.1 Principle of the operation of a solar cell [3]

A number of semiconductor materials is suitable for the manufacture of solar cells. The

most common types using silicon semiconductor material (Si) are:

- Monocrystalline Si cells

- Polycrystalline Si cells

- Amorphous Si cells

Each type of these Si cells can deliver maximum electrical energy in the different period

time of the day; dues to the different wave length of the sunlight.


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9

A solar cell can be operated at any point along its characteristic current-voltage curve,

as shown in Figure 2.2. There are two important points on this curve; the open circuit

voltage (Voc) and the short circuit current (Isc). The Voc is the maximum voltage which a

solar cell can provide at zero current, whereas theIsc is the maximum current which a

solar cell can provide at zero voltage. For a silicon solar cell under a standard testcondition, Voc is typically 0.6-0.7 V, and Isc is typically 20-40 mA for every square

centimeter of the cell area. To a good approximation, Isc is proportional to the

illumination level, whereas Vocis proportional to the logarithm of the illumination level.

A plot of power (P) against voltage (V) for this device shows that there is a unique point

on the I-V curve in which the solar cell generates the maximum power at any

illumination level. This is known as the maximum power point (Vmp,Imp). Note that the

maximum power condition always occurs at the knee of the characteristic curve.

Therefore, every PV application should be able to operate at the maximum power point.

Figure 2.2Current vs voltage (I-V) and current vs power (I-P) characteristics

for a solar cell

Because silicon solar cells typically produce only about 0.5 V per cell, a number of cells

needs to be connected in series (called PV module!). A PV panel is a collection of PV

modules physically and electrically grouped together on a support structure. A PV array

is a collection of PV panels.

Figure 2.3PV in various configurations

The effect of temperature on the performance of a silicon solar cell is described in

Figure 2.4. Note that,Iscslightly increases in temperature, but Vocand maximum power

majority decrease in temperature.


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10

Figure 2.4Effect of temperature on a solar cell

Figure 2.5 shows the variation of PV current and voltage at different solar radiation

levels. According to Figure 2.4 and Figure 2.5, it can be concluded that the

characteristic of a solar cell at a given radiation level and temperature consists of a

constant-voltage segment and a constant-current segment. Its current is limited at the

short circuit current and its voltage is limited at the open circuit voltage. The maximum

power condition always occurs at the knee of theI-V characteristic curve.

Figure 2.5TypicalI-Vcharacteristic curves for different radiation levels

2.2 Maximum Power Point Tracking (MPPT)In Figure 2.6, the PV power output is plotted against the PV voltage for the radiation

level from 200 W/m2 to 1000 W/m2. The points of maximum power form a curve

termed as the maximum-power-point locus. A controller that tracks the maximum-

power-point locus of the PV array is termed as a MPPT. Because of the high cost of PV

array, it is necessary to operate the system at its maximum-power-point locus. For

overall optimal operation of the system, the load line must match the PV array#s

maximum-power-point locus.


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11

Figure 2.6Typical power vs voltage characteristics for increased radiation levels

Referring to Figure 2.7, the load characteristics can be either curve OA or curve OB,

depending on the load#s current and voltage requirement. If load curve OA isconsidered and the load is only coupled to the solar array, the array will operate at point

A1, which will delivery only power P1. However, the maximum power available at the

given radiation is P2. In order to utilize the array at P2, a power conditioner coupled

between the PV array and the load is needed.

Figure 2.7PV array and load characteristics

There are two possibilities to operate PV arrays at the maximum power point:

-

Open-loop control.-

Closed-loop control.

The open-loop control scheme based on an assumption that the maximum-power-point

voltage (Vmp) is a linear function of Voc. For example, Vmp= 0.75*Voc. This assumption

is reasonably accurate even for large variations in Isc and temperature. This type of

MPPT is probably the most common type. A variation in this scheme involves

periodically measuring Voc.

With the closed-loop control scheme, more accurate maximum power point can be

tracked. It involves in varying the input voltage around the optimal value by giving it a

slightly increment or decrement alternately. As the consequences, the output power isthen assessed and a small correction is made to both input voltage and input current.

This method is also called a hill-climbing algorithm!. The power output of PV array is


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12

sampled at a proper sampling period and compared with the previous value. In the

event where the power is increasing, the solar array voltage is increased while the array

current is slightly decreased. On the contrary, if the power is decreasing, the array

voltage is decreased while the array current is slightly increased. The output power is

finally tracked around the maximum power point. Note that, the array current also canbe sampled and monitored as the system variable instead of monitoring the array

voltage.

The output power of the PV array can be expressed as

pv pv pv*P V I= (2.1)

The conventional MPPT algorithm used dP/dV = 0 to obtain the maximum output

power point, hence the maximum output power of the PV array is also determined by

pv pv

pv pvpv pv

*dP dI

I VdV dV = +

(2.2)

Therefore, the MPPT software algorithm can be developed by based on (2.2) [8].

Moreover, a PI controller or another AI controller can be merged with the conventional

MPPT. As the consequence, this hybrid MPPT algorithm will have faster settling time

compared with the conventional one.

2.3 Forward ConverterThe forward converter is illustrated in Figure 2.8. This is a transformer isolated

converter based on the buck converter. It requires a single MOSFET. Its nonpulsating

output current, shared with other buck-derived converter, makes the forward converter

well suited for applications involving high output currents. The maximum switch dutycycle is limited in value; for the common choice n1= n2, the duty cycle is limited to the

range 0 0.5D .

Figure 2.8 Basic forward converter

The transformer magnetizing current is reset to zero while the switch is off-state. How

this phenomenon occurs can be understood by substituting the three-winding

transformer in Figure 2.8 with its equivalent circuit. The result is illustrated in Figure

2.9, and the typical waveforms of the converter are given in Figure 2.10. The

magnetizing inductance LM, in conjunction with D1, must operate in the discontinuous

conduction mode. The output inductor L, may operate either in discontinuous orcontinuous conduction mode. The waveforms in Figure 2.10, however, are sketched in


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13

the continuous conduction mode of the output inductor. According to Figure 2.10, three

switching intervals are then sketched in Figure 2.11.

Figure 2.9Basic forward converter with its equivalent circuit model

Figure 2.10 Waveforms of the forward converter

During subinterval 1, switch Q1conducts and the circuit of Figure 2.11(a) is obtained.

Diode D2becomes forward-biased, while D1and D3are reverse-biased. Voltage Vg is

applied to the transformer primary winding, and hence the transformer magnetizing

current iM(t) is increased in the slope of Vg/LM as shown in Figure 2.10. The voltage

across D3is equal to Vgmultiplied by the turn ratio of the transformer.


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14

Figure 2.11Forward converter

(a) during subinterval 1

(b) during subinterval 2

(c) during subinterval 3

The second subinterval begins when the switch Q1is in off-stated. The circuit of Figure2.11(b) is then obtained. The transformer magnetizing current iM(t) at this instant is

positive, and it continues to flow in the same direction. Since switch Q1is switched off,

the equivalent circuit predicts that iM(t) must flow into the primary winding of the ideal

transformer. It can be seen that n1 iM flows out of the polarity mark of the primary

winding. An equal amount of current must flow into the polarity marks of the winding

2. The current iM*n1/n2 must flow into the polarity mark of winding2. Diode D1

becomes forward-biased; while D2 is reverse-biased and hence prevents current to flow

into the winding3. Voltage Vg is applied to winding 2, and voltage across the

magnetizing inductance is -Vgn1/n2, referred to the winding 1. This negative voltage

causes the magnetizing current to decrease with a slope -Vgn1/n2LM. In the mean time,

diode D3turns on to conduct the output inductor current i(t).


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15

Subinterval 3 begins when the magnetizing current reaches zero and hence diode D1

becomes reverse-biased. Components Q1, D1, and D2operate in the off state and the

magnetizing current remains zero for the balance of the switching period.

By applying the principle of inductor volt-second balance to the transformermagnetizing inductance, the primary winding voltage v1(t) must have zero average.

Referring to Figure 2.10, the average of v1(t) is

( ) ( )1 1 2 3/ (0) 0g gv D V D V n n D= + + = (2.3)

Solution for D2is given by

22

1

nD D

n= (2.4)

Since 2 3 1D D D+ + = , and D3can not be negative. Therefore

3 21 0D D D= (2.5)

Substitute (2.4) into (2.5) leads to

23

1

1 1 0n

D Dn

= +

(2.6)

Therefore

2

1

1

1

Dn

n

+

(2.7)

So the maximum duty cycle is limited. For the common choice n1 = n2, the limit

becomes

1

2D (2.8)

If this limit is violated, then the switch off-time is insufficient to reset the transformer

magnetizing current to zero before the end of the switching period. Transformer

saturation may occur.

The converter output voltage can be found by applying the inductor volt-second balance

to the output inductorL. The voltage across inductorLmust have zero dc component,

and therefore the dc output voltage Vis equal to the dc component of diode D3 voltage

vD3(t).

33

1

D g

nV V DV

n= = (2.9)

It can be seen from (2.7) that the maximum duty cycle can be increased by decreasing

the turn ratio n2/n1. This will cause iM(t) to decrease more quickly during subinterval 2,

and hence resetting the transformer faster. Unfortunately, this also increases the stress

across the switch Q1. The maximum voltage across the switch during subinterval 2 may

be stated as


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16

( ) 112

max 1Q gn

v Vn

= +

(2.10)

Note that, if n1= n2the voltage across the switch Q1equals 2Vg. Therefore, decreasing

the transformer turn ratio n2/n1allows increasing the maximum duty cycle, at theexpense of increasing the switch blocking voltage.

Figure 2.12 illustrates the two-switch version of the forward converter. The switch Q1and Q2are controlled by the same gate drive signal, they both conduct during

subinterval 1 and are switched off during subinterval 2 and 3. During subinterval 2, the

magnetizing current iM(t) forward-biases diodes D1and D2. The primary winding is

then connected to Vgwith the polarity opposite that of subinterval 1. The iM(t) then

decreases with slope -VgLM. When iM(t) reaches zero, diode D1and D2 is therefore

reverse-biased. The iM(t) then remains at zero for the balance of the switching period.

The secondary side of the converter is identical to the single-switch forward converter.Diode D3conducts during subinterval 1, while diode D4conducts during subintervals 2

and 3. So the operation of the two-switch forward converter is similar to the single-

switch forward converter, in which n1= n2. The duty cycle is also limited to D $0.5.

This converter has the advantage that the switch peak blocking voltage is limited to Vginstead of 2*Vg. It also has the advantage that the transformer requires only two

windings.

Figure 2.12Two-switch forward converter

Two-switch forward converter is also a transformer isolated converter based the buckconverter. The secondary side of the converter identically operates as a buck converter.

Its operations can be described as follow:

Mode 1 (0 < t$ton)

At the beginning of a switching during mode 1, the switches Q1 and Q2switch on, the

diode D2 becomes forward-bias, whereas the diode D3 is reverse-biased. Mode 1

equivalent circuit is illustrated as the secondary side equivalent circuit of two-switch

forward converter shown in Figure 2.11. The secondary side voltage of the transformer

Vsec connects with the output inductor L, and hence the output inductor current iL(t)

increases linearly fromI1toI2during ton. Therefore,


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17

2 1sec( )

LL O

on on

I I iv t V V L L

t t

= = = (2.11)

Note that iL(t) increases with a positive slope of

sec OL

on

V ViSlope

t L= = (2.12)

Thus, mode1 is characterized by inductor charging and the storage of electrical energy

in magnetic form in the inductor.

Mode 2 (ton < t$toff)

Mode 2 equivalent circuit is illustrated as the secondary side equivalent circuit of two-

switch forward converter shown in Figure 2.11. Mode 2 begins when the switching

elements are both switched off. Since it is not possible to change the current flowing

through the inductor instantaneously, the voltage polarity across the inductorimmediately reverses in an attempt to maintain the same current which is flowing just

prior toff. Hence, the diode D2is reverse-biased, while the diode D3becomes forward-

bias. The secondary side of the isolated transformer disconnects from the output

inductorL. The inductor current decreases as the electrical energy stored in the inductor

is transferred to the output capacitor Cand load. From Figure 2.11, the voltage acrossL

is

1 2O

off

I IV L

t

= (2.13)

Notice that iL(t) decreases with a negative slope of

OL

off

ViSlope

t L

= = (2.14)

Figure 2.13 Secondary side forward converter switching waveforms


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18

Figure 2.13 illustrates voltage and current waveforms of components on the secondary

side of the two-switch forward converter.

According to Figure 2.13, the current ripple Li is the same during mode 1 and mode 2

hence

sec( ) O offO onL

V tV V ti

L L

= = (2.15)

Substituting ont DT= and (1 )offt D T= into (2.15) gives

2sec

1

O g

nV DV DV

n= = (2.16)

The output voltage VOof the forward converter is the product of the duty cycle D, turn

ratio2 1

/n n , and the input voltage Vg. The duty cycle periodically changes in order to

maintain the desired output voltage during a load change and/or an input voltage

fluctuation. This periodic change ofDis accomplished using a proper control scheme

such as, in this thesis, the rectified sinusoidal hysteresis current control. Theon

t and

offt are defined as

sec

andL Lon off O O

L i L it t

V V V

= =

(2.17)

The switching period Tis the sum of ont and offt :

sec

sec

1( )

Lon off

s O O

LV iT t tf V V V

= = + = (2.18)

Therefore, for the steady-state operation, the current ripple in the output inductorLcan

be expressed as

sec sec

sec

( ) (1 )o oL

S

V V V T DV Di

LV Lf

= = (2.19)

Thus, the current ripple in the output inductor is inversely proportional to the inductance

and switching frequency Sf .

According to Figure 2.13, the average capacitor current is zero for a switching period

since the output capacitor is charged and discharged by the same amount during steady-

state operation. However, the average capacitor current during 2 3 4T t T is

4

LC

ii

= (2.20)

The capacitor voltage vc(t) during 2 3 4T t T is


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19

3 / 4

/ 2

(3 4) ( 2)2 2

1

C CC C O O

C

T

C

T

v vv T v T V V

v

i dtC

= +

=

=

(2.21)

The voltage ripple of the capacitor Cis given by

3 / 4

/ 2

1 T

C C

T

v i dt C

= (2.22)

Substituting (2.20) into (2.22), therefore the voltage ripple is

3 / 4

/ 2

1

4 8 8

T

L L LC

ST

i T i iv dt

C C Cf

= = = (2.23)

Finally, substituting Li from (2.19) into (2.23), the capacitor ripple voltage is

sec sec

2

(1 ) (1 )

16C O

S S

DV D V D Dv v

f L LCf

= = = (2.24)

Notice that, %vcis also equal to the output ripple voltage %vosince the output capacitor

is connected directly across the load. It can be seen that the %vo is inversely

proportional to fs2 and LC product. Hence, to decrease the output ripple voltage, the

product LC should be large and the switching frequency should be high. Since the

output inductorLand output capacitor Cform a low-pass filter, the choice of the value

ofL and Cdetermines the cutoff frequency of the output low-pass filter and ultimatelydetermines the amount of switching ripples and spikes in its output.

2.4 Hysteresis Current ControlIn applications such as grid-connected system, dc and ac motor servo drives, it is the

output current that needs to be controlled, even though a VSI is often used. The current

control scheme has the advantage of limiting the output current.

Hysteresis current control is illustrated by Figure 2.14. For a sinusoidal reference

current iA*, the actual output iA is compared with the tolerance band around the

reference current associated with that phase. If the actual current in Figure 2.14 tries togo beyond the upper tolerance band, TA- is turned on and TA+ is turned off. The

opposite switching occurs if the actual current tries to go below the lower tolerance

band. This control scheme is shown in a block diagram form in Figure 2.14.

The switching frequency depends on how fast the current changes from the upper limit

to the lower limit and vice versa. This depends on Vd, the load back-emf, and the load

inductance. Moreover, the switching frequency does not remain constant but varies

along the current waveform.


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Figure 2.14 Hysteresis current control

ADMC331 is a 16-bit digital signal processor manufactured by Analog Devices Inc.,

U.S.A. Its specifications and features are mentioned in its specification datasheet and

its user#s manual [6]. This section only describes its functions that involved in the

thesis. Figure 2.15 shows functional block diagram of ADMC331. ADMC331 is a

digital signal processor (DSP) based on ADSP-2100 architecture. ADMC331 consists

of the ADSP-2100 processor, analog-to-digital converters, a three-phase 16-bit PWM

generator, timers and communication ports. It is a fine designed DSP which is suitablefor motor drive applications. Its features are beyond needs for this thesis. However,

dues to the limited resources; this DSP is chosen for the thesis.

2.5 The Characteristics of ADMC331 Digital Signal Processor


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Figure 2.15Functional block diagram of ADMC331

There are only three functions of ADMC331 required for this thesis:

2.5.1 ADSP-2100 Base ArchitectureFigure 2.16 is an overall block diagram of the DSP core of the ADMC331, which is

based on the fixed-point ADSP-2171. Noted that the ADSP-2171 is the later version of

ADSP-2100, it is ADSP-2100 family code compatible. The flexible architecture and

comprehensive instruction set of the ADSP-2171 allows the processor to performmultiple operations in parallel. In one processor cycle (38.5 ns with a 13 MHz CLKIN)

the processor core can:

-

Generate the next program address.

- Fetch the next instruction.

- Perform one or two data moves.

- Update one or two data address pointers.

- Perform a computational operation.

These all take place while the processor continues to:

- Receive and transmit through the serial ports.

-

Decrement the interval timer.- Generate three-phase PWM waveforms for a power inverter.

-

Generate two signals using the 8-bit auxiliary PWM timers.

- Acquire four analog signals.

- Decrement the watchdog timer.

The processor contains three independent computational units:

-

The arithmetic and logic unit (ALU).

- The multiplier/accumulator (MAC).

- The shifter.

The ALU performs a standard set of arithmetic and logic operations; primitivesdivisions are also supported. The MAC performs single-cycle multiply, multiply/add


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22

and multiply/subtract operations with 40 bits of accumulation. The shifter performs

logical and arithmetic shifts, normalization, denormalization and derive exponent

operations. The shifter can also be applied to efficiently implement numeric format

control including floating-point representations. The internal result (R) bus directly

connects the computational units so that the output of any unit may be the input of anyunit on the next cycle.

Two data address generators (DAGs) provide address for simultaneous operand fetches

from data memory and program memory. Each DAG maintains and updates four

address pointers (I registers). Whenever the pointer is used to access data, it is post-

modified by the value in one of four modify (M registers). A length value may be

associated with each pointer (L registers) to implement modulo addressing for circular

buffers.

Figure 2.16ADSP-2100 core block diagram

2.5.2 Analog-To-Digital Converter (ADC)The ADC of the ADMC331 is a 7-channel single slope analog data acquisition system

with 12-bit resolution. Data conversion is performed by timing the crossover betweenthe analog input and saw-tooth reference ramp. A simple voltage comparator detects

the crossover and latches the timed counter value into a channel-specific output register.

Figure 2.17 shows the functional block diagram of ADC in ADMC331.

The ADC system comprised of seven input channels to the ADC of which three (V1,

V2, V3) have dedicated comparators. The remaining four channels (VAUX0, VAUX1,

VAUX2, and VAUX3) are multiplexed into the fourth comparator and selected using

ADCMUX0 and ADCUX1 bits of the MODECTRL register. This allows four

conversions to be performed by ADC between successive PWMSYNC pulses.


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Figure 2.17ADC block diagram

The operation of ADC system may be explained by reference to Figure 2.17 and Figure

2.18. The reference ramp is connected with one input of all four comparators. This

reference is generated by charging an external timing capacitor with a constant current

source. On the falling edge of PWMSYNC, the capacitor begins to charge at a rate

determined by the capacitor and the current source value. The four input comparators

of the ADC system continuously compare the values of the four analog inputs with the

capacitor voltage. Each comparator output will go high when the capacitor voltage

exceeds the respective analog input voltage. The capacitor voltage is reset at the start of

PWMSYNC pulse, which by default is held high for forty CLKOUTs.

Figure 2.18The operation of ADC system

The ADC timer block consists of a 12-bit counter clocked at either a rate of twice

CLKOUT period or a rate of CLKOUT period. Thus at the maximum CLKOUT

frequency of 26 MHz, this gives a timer resolution of 76.9 ns or 38.5 ns. The counter

resets during the high PWMSYNC pulse so that the counter commences at the

beginning of the reference voltage ramp. When the output of a given comparator goes


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high, the counter value is latched into the appropriate 12-bit ADC registers. There is a

pair of four ADC registers (ADC1, ADC2, ADC3 and ADCAUX) corresponding to

each of the four comparators. Each pair is organized as master/slave. At the end, the

reference voltage ramp, which is prior to the next PWMSYNC, all four master registers

have been loaded with the new conversion count. At the rising edge of thePWMSYNC, the registered conversion count for each channel is loaded into the DSP

readable shadow registers, ADC1, ADC2, ADC3 and ADCAUX. The processor will

then read these shadow registers containing the previous conversion count, while

internally the master registers will be loaded with the current conversion count.

Because the operation of the ADC is intrinsically linked to the PWMSYNC interrupt

[6], the effective resolution of the ADC is a function of PWM switching frequency. For

a CLKOUT period of tckand a PWM period of TPWM, the maximum count of the ADC

is given by:

( )( )min 4095, / 2PWM CRST ckaxCount T T t = at MODECTRL bit 7 = 0 (2.1)( )( )min 4095, /PWM CRST ckaxCount T T t = at MODECTRL bit 7 = 1 (2.2)

2.5.3 TimersA programmable interval timer is also included in the DSP core and can be used to

generate periodic interrupts. These periodic interrupts are generated; based on theprocessor#s cycle time. The timer architecture is shown in Figure 2.19.

Figure 2.19Programmable interval timer architecture

The timer includes two 16-bit registers, TCOUNT and TPERIOD and one 8-bit register,

TSCALE. TSCALE is the scaling register; with a given scaling factor the timer will

decrease the counting value every n-cycle of processor#s cycle time. TCOUNT stores

the counting value. TPERIOD contains the value in which the interrupts will occur.

When the timer is enabled, TCOUNT is first loaded with TPERIOD. The timer will

decrease TCOUNT value every n processor cycles. When the TCOUNT reaches zero, a

timer interrupt thus occurs. TCOUNT is then reloaded with TPERIOD and the timer

start decrement again.


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CHAPTER 3 SYSTEM DEVELOPMENT

3.1

Hardware Development

3.1.1 System OverviewFigure 3.1 illustrates the block diagram of grid-connected power system which is

designed in the thesis.

Figure 3.1Block diagram of grid-connected power system

A 120-Watt PV array is paralleled with a 4700F input capacitor (Ci) so that the PV

array acts as a voltage source. The current sensor CS1 senses the PV array current

throughRsense1while the voltage sensor VS1 senses the PV array voltage across Rsense2.

Both voltage and current of PV array are monitored by an ADMC331 DSP and then are

controlled in order that the PV array always transfers the maximum power to the

system. A two-switch forward converter receives the maximum electrical energy from

PV array. A 6.5 turn ratio isolated transformer, a part of the converter, amplifies the

input voltage so that the output voltage of the converter is larger than grid voltage. The

ADMC331 DSP is again utilized to generate a rectified sinusoidal reference waveform,Iref, the magnitude ofIrefcorrelates with the maximum power transferred from PV array.

The current sensor CS2 senses the output inductor currentIothroughRsense3. Hysteresis


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26

controller compares Iowith Iref and shapes the output inductor current to match Iref at

high switching frequency. This rectified sinusoidal current is finally unfold and

transferred to the distribute line by a single phase inverter.

3.1.2

Photovoltaic ArrayIn this thesis, four 30-Watt PV modules are connected in series to form a 120-Watt PV

array. Figure 3.2 illustrates the configuration of this PV array. Each PV module is

manufactured by Solarex Inc., USA and is named as !MSX-30 LITE". Each module

has the typical electrical characteristics of :

- Maximum power (Pmax) = 30 W

-

Voltage@Pmax(Vmp) = 17.1 V

- Current@Pmax(Imp) = 1.75 A

- Guaranteed minimumPmax = 27 W

- Short-circuit current (Isc) = 1.90 A

- Open-circuit voltage (Voc) = 21.1 V

The further details of MSX-30 LITE are shown in the specification sheets in appendixA.

According to Figure 3.2, four MSX-30 LITEs are connected in series to provide a 120-

Watt PV array. A 4,700F capacitor (Ci) is paralleled the PV array so that the PV array

has the characteristic of a voltage source. This capacitor also has the obligation of

limiting the input ripple voltage. With this configuration, the PV array has the electrical

characteristics of :

- Maximum power (Pmax) = 120 W

- Voltage@Pmax(Vmp) = 68.4 V

-

Current@Pmax(Imp) = 1.75 A

-

Guaranteed minimumPmax = 108 W

- Short-circuit current (Isc) = 1.90 A

- Open-circuit voltage (Voc) = 84.4 V

Note that, first, the array voltage at Pmax is approximately 81.0% of the array open-

circuit voltage, and hence

mp OC0.81V V (3.1)

Second, the array current atPmaxis about 92.1% of the array short-circuit current, hence

mp SC

0.921I I (3.2)

Therefore, equations (3.1) and (3.2) can be applied to estimate VmpandImpof VocandIsc

at the instantaneous array power. The change of array power depends on the solar

energy, as mentioned in Chapter1 and Chapter2, Iscalways varies as the solar radiation

varies. Voc, on the other hand, slightly varies as the radiation doses but it significantly

decreases while the operating temperature rises.


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Figure 3.2 Configuration of a 120-Watt PV array

3.1.3

ADMC331 DSP BoardADMC331, a 16-bit digital signal processor (DSP) manufactured by Analog Devices

Inc., U.S.A, is chosen to implement the control algorithm in this thesis. Its advantagesare mentioned earlier in Chapter 2. Its specifications and features are mentioned in the

specification sheet and the user$s manual [6]. This thesis needs only three significant

functions of ADMC331; which are a fixed-point ADSP-2171 core processor, analog-to-

digital converters, and timers. These three DSP functions perform important roles in

controlling the system. Control algorithms are well designed and programmed into the

DSP.

Figure 3.3 presents the diagram of control algorithms inside the ADMC331. The DSP

receives four measured signals from the system, which are the PV array voltage (Vpv),

the PV array current (Ipv), the grid voltage (Vgrid), and the zero-crossing signal. The

DSP receives the zero-crossing signal through an input/output port, PIO1.6; this signaltells DSP the conditions of the grid voltage. These conditions include the frequency of

grid voltage and the grid voltage is a positive signal. The DSP always waits for the first

zero-crossing signal, PIO interrupt occurs, and then starts executing the control

algorithms. At the beginning of the algorithm, the DSP enables PMWSYNC interrupt

which allows DSP to sample the analog inputs at the sampling frequency of 25 kHz.

Note that the procedure used to set the desired sampling frequency is mentioned in

Section 2.5.2, [6] and [7]. Three of analog signals (Vpv,Ipv, andVgrid) are digitalized by

ADC and stored in three registers (ADC1, ADC2, and ADCAUX respectively). Vpvand

Ipv are inputted to the maximum power point tracking algorithm (MPPT). MPPT

calculates the instance power of the PV array and estimates the magnitude of the

reference current (K)that will draw the maximum electrical energy from the PV arrayand transfer this energy to the converter. Vgrid is then normalized to be Inorm. By

multiplying Inorm with K, the DSP generates the digitalized reference current Iref.


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TLV5618A, a digital-to-analog converter manufactured by TI, converts the digitalized

Irefback to be the analog Irefwhich is applied by the hystersis controller. In the mean

while, the current sink algorithm receives the digitalized Vgrid, then calculates the death

time and finally generates the gate drive commands for the inverter via PIO0.6 and

PIO0.7. PIO0.6 is responsible for driving the inverter during the positive Vgrid. PIO0.7,on the contrary, has the responsibility of driving the inverter during the negative Vgrid.

The islanding algorithm is programmed for the security precaution; it monitors the grid

voltage via the zero-crossing signal. In the other words, this algorithm must monitor

two fault conditions, which are over/under grid frequency and zero grid voltage. The

zero-crossing signal, itself, is generated at every rising edge of the grid voltage. As the

consequence, the zero-crossing signal has the exact frequency as the Vgridhas, and this

signal will not be generated if the Vgridis equal to zero. Hence, the islanding algorithm

uses a DSP timer to monitor the frequency of the zero-crossing signal. If there is no

fault condition, the islanding algorithm will allow the program to resume its duties.

However, if any fault conditions occur, the algorithm will halt the program and thenwill use the watchdog timer to reinitiate all parameters and finally will wait for a proper

grid condition.

Figure 3.3 Diagram of control algorithms inside ADMC331

Figure 3.4 illustrates the full detail schematic of the ADMC331 and TLV5618A circuitboard. The printed circuit is basically constructed on this schematic.


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Figure 3.4Schematic of the ADMC331 and TLV5618A circuit board


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3.1.4 Rectified Sinusoidal Hysteresis ControllerThe rectified sinusoidal hysteresis controller has an obligation of controlling and

shaping the output current in such it matches the reference current. Figure 3.5 presents

the conceptual diagram of the rectified sinusoidal hysteresis controller.

According to Figure 3.5, the controller receives two inputs, the reference current (Iref)

and the output current (Io). Iref is generated by the DSP and TLV5618A, as mentioned in

section 3.1.3. The output current (Io) is measured and signal-conditioned by

HCPL788J, an optical isolated sensor. A difference amplifier, OP-07D with unity gain,

then subtracts both inputs; hence the error signal is generated by

err O ref I I I= (3.3)

Figure 3.5Diagram of the rectified sinusoidal hysteresis controller

The hysteresis controller, THS4021ID, compares the error signal whether it is out of the

allowance gap or not, as referred in Figure 3.6. This allowance gap, referred to Figure

3.7, is also called !hysteresis gap"or hysteresis band (HB)", and is defined by

Hysteresis band * , where 12 V.i DD DDi f

RHB V V

R R= = =

+ (3.4)

Figure 3.6Schematic of the rectified sinusoidal hysteresis controller

If the error signal goes beyond the hystersis band, the controller will command theconverter switching elements to switch off. On the contrary, if the error signal goes

below the hyteresis band, the controller will switch on the switching elements of the


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converter. Otherwise, the controller commands the switching elements to remain their

prior statuses. Finally, a 2N7000, a general purpose MOSFET, converts the output

signal from the hysteresis controller to a TTL signal. This TLL signal is the gate drive

command for the two-switch forward converter.

Figure 3.7Hysteresis gap and the output of TLV5618A

3.1.5 Two-Switch Forward ConverterThis section informs the procedures used to design the components of the two-switch

forward converter. Figure 3.8 illustrates the diagram of the forward converter.

The converter consists of three passive components; which are the isolated transformer,

the output inductor and the output capacitor; two switching elements and four recoverydiodes.

Figure 3.8Diagram of the two-switch forward converter.


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3.1.5.1 The Isolated TransformerThe isolated transformer not only isolates the PV array voltage from the grid voltage,

but it also amplifies the PV array voltage so that the output voltage of the converter can

be greater than the grid voltage. Therefore, the proper turn ratio must be investigated.

Considering the primary stage of the converter, the switches, Q1 and Q2, always turn on

and off at the switching frequency fS, the voltage across the primary side of the

transformer (Vpri) is hence given by

pri pv*V D V= (3.5)

Whereas,Dis the duty cycle and Vpvis the PV array voltage. IfNis defined as the turn

ratio of the isolated transformer, the voltage across the secondary side of the transformer

is therefore defined as

sec pri*V N V= (3.6)

And because the two-switch forward transformer is based on the step-down converter

(buck converter), hence the output stage of the converter is given by

O sec*V D V= (3.7)

Substitute (3.5) and (3.6) into (3.7), hence

2

O sec pri pv pv* * * * *( * ) * *V D V D N V D N D V D N V = = = = (3.8)

Finally, rewriting (3.8) yields

O

pv*

V

D N V=

(3.9)

O

2

pv*

VN

D V= (3.10)

In order to determine the turn ratio (N), letting Vois the grid voltage, the duty cycle (D)

is 50% and the PV array voltage is the voltage at the maximum power point (Vmp) which

is 68.4 V. Therefore,

Turn ratio ( ) 6.5N = (3.11)

With the desired turn ratio, the proper turn number (NpriandNsec) of the transformer can

be determined as showing in Appendix B.

3.1.5.2 The Output InductorThe output inductor (L) is the output current ripple limiter. The larger the inductor is,

the smaller the current ripple will be. Unfortunately, if the inductor is too large, the

output current will not be shaped as the sinusoidal waveform because there will be too

much energy stored in the inductor. To determine the value of the output inductance,

the equation 2.19 is first calculated but the inductance still has not been the proper one

yet. Several trials should be taken, yields

Output inductor ( ) 6 mHL = (3.12)


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The output current ripple and the slope of the current trail can be determined, referred to

section 2.3. Whereas, Appendix C presents the algorithm which is used to determine

the turn number and the air gap of the inductor.

3.1.5.3

The Output CapacitorThe output voltage ripple is limited by the output capacitor. Similar to the inductor, the

larger the capacitor is, the smaller the voltage ripple will be. However, the output

current will not be shaped as the sinusoidal waveform if the capacitor is too large.

Again, in order to determine the value of the capacitance, the equation 2.23 but, still,

several trials must be taken for the proper value. Hence

Outputcapacitor ( ) 1FC = (3.13)

The output voltage ripple also can be determined in equations presented in section 2.3.

3.1.5.4 The Switching ElementsTwo IRFP450s, n-channel power MOSFET, are chosen as the switches Q1 and Q2.They can withstand the voltage of 450 V across their terminals and the current of 14 A.

They can also operate over hundred kilohertz of switching frequency.

3.1.5.5 The Recovery DiodesThe recovery diodes must be able to operate at the same switching frequency with the

switches Q1 and Q2. Hence, MUR4100s, ultra fast recovery diodes, are chosen. Please

refer to their specification sheets for further details.

Figure 3.9Schematic of the two-switch forward converter

3.1.6

Single Phase InverterThe main purpose of the single phase inverter is to unfold the 100-Hz rectified

sinusoidal current so that the current can become a 50-Hz sinusoidal current. This

inverter, illustrated in Figure 3.10, consists of four switching elements and four fast

recovery diodes in which they are constructed four voltage-bidirectional two-quadrant

switches.


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Figure 3.10Diagram of the single phase inverter

The voltage-bidirectional two-quadrant switch, shown in Figure 3.11 and referred to [3],

has the properties of blocking both positive and negative voltage, but conducts only

positive current. When the switch is intended to be in the off state, the controller turns

the MOSFET off. The diode then blocks negative voltage, and the MOSFET blocks

positive voltage. The series connection can block negative voltages up to the diodevoltage rating, and positive voltages up to the MOSFET voltage rating. However, the

positive current will flow from the converter to the distributed line only if when the

converter output voltage is greater than the grid voltage plus diode forward-biased

voltage.

Figure 3.11A voltage-bidirectional two-quadrant switch

(a) Implementation circuit

(b) Idealized switch characteristics

In this thesis, four power MOSFETs, IRFP450, and fours fast recovery diodes, FR407,

are chosen to construct the inverter. The full detail schematic of single phase inverter isillustrated in Figure 3.12. However, IGBTs should be chosen instead of MOSFETs in

order to construct a larger scale of the system because IGBTs are cost effective as the

rated power increases.


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Figure 3.12Schematic of the single phase inverter

3.1.7 Gate DriversBecause six switching elements are required in this system, two are for the forward

converter and the others are for the inverter, hence six gate drive circuits are also

required. However, these circuits are divided into two groups and are separately

grounded; the first group is for the converter and another is for the inverter as illustrated

in Figure 3.13 and Figure 3.15, respectively. All of the gate drive circuits are based on

TLP250, the optical isolated gate drive circuits. TLP250 has the maximum operating

frequency of 25 kHz and the maximum isolated voltage of 2500 Vrms which is

sufficient for this thesis. For further details, please refer to its specification sheets.

3.1.7.1

Gate Drivers for Two-Switch Forward ConverterFigure 3.13 illustrates the diagram of the gate drive circuit for the converter. The

hi-side circuit is powered by VDD1, a +12Vdc voltage source respects to an analog

ground !COM", and has an obligation of controlling the switch Q1 via the !SW1"

command. The switch Q2, however, is controlled by the lo-side circuit which is

powered by VDD2, a +12Vdc voltage source respects to an analog ground !1". The full

detail of the converter gate drive circuit is shown in Figure 3.14.

Figure 3.13Diagram of the converter gate drive circuit


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Figure 3.14Schematic of the converter gate drive circuit

3.1.7.2 Gate Drives for InverterThe single phase inverter comprises of four switching elements, hence two hi-side gate

drive circuits and two lo-side gate drive circuits are required. Each of hi-side circuit

must be separately powered and grounded, as shown in Figure 3.15, because the switch

Q3 and Q4 are not electrically connected. The first hi-side circuit is powered by VDD3

and provides !Hi1"command, while another hi-side circuit is powered by VDD4 and

commands the switch Q4 via !Hi2"command. In contrast, both of the low-side circuit

can be powered and grounded by the same power supply, which is VDD5 respected to

an analog ground !2", because both of switches Q5 and Q6 are electrically connected.

Further details of the gate drive circuit are illustrated in Figure 3.16.

Figure 3.15Diagram of the inverter gate drive circuit


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Figure 3.16Schematic of the inverter gate drive circuit

3.1.8

SensorsFigure 3.17 illustrates the diagram of where sensors are positioned in the system. Two

voltage sensors are required in order to measure two voltage variables, which are the PV

array voltage and the grid voltage. Other two current sensors are applied to measure the

PV array current and the output current. The HCPL-788Js, optical isolated amplifiers,

are chosen to measure the PV array voltage, the PV array current, and the output

current. The grid voltage, however, is measured by using a 50-Hz voltage transformer.

Figure 3.17Diagram of where sensors are positioned

3.1.8.1 HCPL-788J (Optical Isolated Amplifier with Short Circuit and

Overload Protection)

The HCPL-788J is an optical isolated amplifier; its internal function diagram isillustrated in Figure 3.18. At the beginning, it converts the analog input to a digital

signal using a sigma-delta analog-to-digital converter (%-&ADC). This ADC samples

the input six million times per second and generates a high speed 1-bit output

representing the input very accurately. The encoder encodes this 1-bit data stream and

transmits data via a light emitting diode over the optical barrier. The detector converts

the optical signal back to a bit stream. This bit stream is decoded and drives a 1-bit

digital to analog-to-digital converter (DAC). Finally, a low pass filter and output buffer

drive the output signal which linearly represents the analog input signal. The output

signal full-scale range is determined by the external reference voltage. Another output,

the rectified output (ABSVAL), is also provided. The short-circuit fault output

(FAULT) is activated when the analog input exceeds 256 mV.


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Equation (3.14) shows that the output voltage of HCPL-788J is proportional to the

analog input. If a positive analog input is applied, the output voltage then becomes

greater than a half of the reference voltage. However, if the input is zero, the output is

equal to the reference voltage. Otherwise, the output voltage is less than the reference

voltage.

ref IN+ IN-out

*( )

504mV

V V VV

= (3.14)

The ABSVAL represents only the magnitude of the analog input signal and is

determined by

ref IN+ IN-2* *( )ABSVAL504mV

V V V= (3.15)

For further details, please refer to HCPL-788J specification sheets.

Figure 3.18Function diagram of HCPL-788J

3.1.8.2

Voltage SensorsTwo voltage sensors must be used in the thesis.

a. VgridSensorThis sensor has an obligation of measuring the grid voltage. The 220-Vrms grid voltage

is attenuated to be a 9-Vrms voltage by using a 50-Hz voltage transformer. This

9-Vrms voltage is signal-conditioned by a difference amplifier, OP-07D, in order to

match the ADC specification of ADMC331. Finally the signal is inputted to ADCAUX,

the auxiliary ADC channel of ADMC331.


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Figure 3.19Diagram of VgridSensor

b.VpvSensorTypically, the PV array provides the open-circuit voltage (Voc) of 84.4 V. This Vocmust

be voltage-divided to be 252 mV and is inputted to the HCPL-788J, therefore a

2,994.7 'resistor is chosen as Rsense2, referred to (3.16).

sense2pv

sense2

sense2

*84.4 V1M'+

2,994.7

RV

R

R

=

(3.16)

However, the PV array provides the voltage of 68.4 V at typical maximum power

rating; hence the input voltage of the sensor is approximate 204 mV, referred to (3.17) .

sense2pv sense2

sense2

*68.4V 2

ts-3 single-phase grid-connected photovoltaic system using rectified sinusoidal hysteresis current...

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