top-down fabrication of 1d devicesnanoparticles.org/pdf/samuelson.pdf · lars samuelson qds in...

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QDs in semiconductor nanowires

Lars SamuelsonLund University, Solid State Physics/the Nanometer Structure Consortium

http://www.nano.ftf.lth.se/ Email: [email protected]

What types of quantum devices do we talk about?

What may be the advantages of using nanowire techniques?

How do we grow semiconductor nanowires by VLS-mode & what quality of materials and structures can we achieve?

Examples of quantum-dot devices achieved by August 2004

What kind of progress can we expect in the future?

Many colleagues and students have contributed to this work, e.g.:

Lars Samuelson

Jonas Ohlsson, Ann Persson & Sören Jeppesen in CBE-growth

Werner Seifert, Magnus Borgström & Kimberly Dick in MOVPE

Knut Deppert, Martin Magnusson, Martin Karlsson & Brent Wacaserin aerosol nanoparticle technology

Reine Wallenberg, Torsten Sass & Magnus Larsson in TEM studies

Anders Mikkelsen & Edvin Lundgren in cross-sectional STM

Nicolay Panev, Niklas Sköld & Patrik Svensson in PL studies

Mikael Björk, Claes Thelander & Adam E. Hansen in device processingand studies of tunneling and single-electron devices

Thomas Mårtensson, Patrick Carlberg & Lars Montelius in array formation

Hongqi Xu, Martin Persson, Mats-Erik Pistol & Carina Fasthin electronic structure and transport theory


- and with financial support from:

Lars Samuelson



Devices with their functionality based on controlled designand performance based on quantum phenomena, such as:

– One-dimensional structures with quantized conductance

– Tunneling via quantum dots resulting in 1D–0D–1D character

– Incorporation of optically active single or coupled QDs

Lars Samuelson



– Extremely small devices fabricated via top-down methodsare often dominated by damage induced during processing

Lars Samuelson

– while nanowires form in a self-organized fashion, with atomicperfection in lateral direction as well as in the growth direction


A top-down approach to making one-dimensional quantumdevices. like resonant tunneling via quantum dots. Method pioneered by Randall and Reed at Texas instruments in the late 1980s. However, rather unsatisfactory device properties due to fabrication induced damage and poor lateral control.

TOP-DOWN fabrication of 1D devices

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Alternative No. 2: BOTTOM-UP fabricationPlant a seed and control bottom-up growthof a perfectly functioning Bonsai tree.

Alternative No. 1: TOP-DOWN fabricationStart with a block of wood and carve a small wooden mini-tree with trunk and branches.

Comparison between top-down & bottom-up fabrication of complex structures

Formation of size-controlled GaAs nanowires using aerosolgold particles as seeds for vapor-liquid-solid (VLS) growth

5 nm

Au aerosol particle

Low eutectic temperatures

Deposition of size selected catalytic goldaerosol nano-particles

Creation of an alloy bet-ween gold and gallium(close-up)

VLS growthof nanowires using e.g. CBE, MBE or MOVPE

- Au/Ga 339°C- Au/In 454°C

R. S. Wagner, Whisker Technology, Wiley, NY, 1970

K. Hiruma, first growth of nanowires in early-mid 90’s

10 nm

30 nm

InAs <111>

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Growth occurs in most cases in the <111>B-direction, as also found

in the early work of Hiruma et al., J. Appl. Phys. 74, 3162 (1993).We also see stacking-sequence related defects and extended regions of the wires with either cubic or hexagonal structure.

HRTEM image of a 30 nm wide GaAs nanowire


– Extremely small devices fabricated via top-down methodsare often dominated by damage induced during processing

– Top-down fabrication, when pushed down to the 10nm level,require extremely expensive fab-investments, while complexand high-performance nanowire devices may be fabricated via simple patterning techniques in combination with self-assembly in the device formation

Lars Samuelson

– while nanowires form in a self-organized fashion, with atomicperfection in lateral direction as well as in the growth direction


SEM micrographs of NIL-defined InP nanowire arrays.The nanowires are 1.5 m long, with a diameter of 290 nm. The dimensions are chosen for a photonic

crystal structure operating at wavelengths of 1 m..

Tilted view SEM micrograph of the monolithic SiNIL stamp used. The stamp was fabricated froma one-inch Si wafer using Cr as dry etching mask.

InP nanowire array grown by MOVPE(metal-organic vapor phase epitaxy)

InAs nanowire arrays grown by CBE(chemical beam epitaxy)

Growth from patterned catalysts

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Diffusion length of In-species on InAs(111)B is 650nm, independent of wire Diameter, and on {110}-facets >10 m

To appear in October-issue of NanoLetters Formation of heterostructure interfaces between lattice mis-matched materials, e.g. InAs/GaAs (7%) & InAs/InP (3.5%):a comparison between 2D epitaxial growth and wire growth

Lattice mis-match SK-islands &dislocations

Growth by2D epitaxy

Wire geometry Radial strainrelaxation

1D wire growth

Switching of growth speciesin an optimal fashion allowsabrupt interfaces to form

High-resolution TEMimages of 40 nm InAsnanowire containing aseries of InP barriers,ranging in thickness from 2-3 mono-layers,8 nm, 28 nm to 100 nm.Growth direction <001>.

TEM-images by T. Sassand L.R Wallenberg

From Björk et al., ”One-dimensional heterostruc-tures in semiconductornanowhiskers”,Appl. Phys. Lett. 80,1058 (2002)

Lars Samuelson



How do we grow semiconductor nanowires by VLS-mode & what quality of materials and structures can we achieve?

Examples of quantum-dot devices achieved by August 2004



Voltage (mV)

Transport in InAs nanowires

Device configuration

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~ 100 nm

EF > Level splitting

Coulomb blockadeeffects will dominate

~ 15 nm

EF < Level splitting

RTD effects dominateResonant tunneling diode

Single-electron transistor

Increasing the size of the InAs dot

EC=e2/C

EF

~ 15 nm

RTD

EF

~ 100 nm

EC=e2/C

SET

InAs

InP

Electrical characterization

Modelling of the SET

100 nm

InAs

InP

20

±20

-20

0 0.2

VSD (mV)

0

0

20

-20

0

VG (V)-0.97 -0.70

EC constant

the shape of

the confining

potential is

unaffected by

the gate voltage

(in contrast to

GaAs/AlGaAs)

To appear in September-issue of NanoLetters

HAADF of DB-RTD

(Reine Wallenberg & Magnus Larsson, nCHREM)

HAADF: High-Angle Annular Dark-Field (in STEM)

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QD based single-photon

sources for quantum in-

formation technology

Few-particle configurations in a single QD Single-photon emission from a single QD

InGa Ga Ga

GaAs

InAs

1 ,3 1 ,4 1 ,5 1 ,6 1 ,7 1 ,8 1 ,9 2

10 W/cm2 180s

Lu

min

esce

nce

Inte

nsi

ty /

arb

. un

its

Energy / eV

MOVPE-grown co-axial GaAs nanowires with shells of AlGaAs

AlGaAs

20 nm

GaAs

Recent progress in the formation of complex 3DStructures using multiple branching into tree- & forest-like structures

Lars Samuelson

QDs in semiconductor nanowiresA forest of nanotrees with multiply seeded trunks, branches and leaves, with the entire tree being single-crys-talline and monolithic.

Each level of branches is seeded by Au aerosol nanoparticles, allowingcontrol of: – diameter – length – compositionincluding formation ofheterostructures insidebranches or at branch-leaf interfaces.

Kimberly Dick et al.

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Top view

Side view

Au aerosol particlesdeposited on <111>B- oriented nanowires(low density)

Epitaxial III-V Nanowires on Silicon

Thomas Mårtensson, C. Patrik T. Svensson, Brent A. Wacaser, Magnus W. Larsson,

Werner Seifert, Knut Deppert, Anders Gustafsson, L. Reine Wallenberg, and Lars Samuelson

Ideal epitaxial nucleation and controlled oriented growth of III-V

semiconductor nanowires on silicon substrates has been achieved.

Efficient room-temperature generation of light on Si is demonstrated

by the incorporation of double heterostructure segments in nanowires.

We expect that advanced hetero-structure devices, such as resonant

tunneling diodes, superlattice device structures and heterostructure

photonic devices for on-chip communication, could now become available

as complementary device technologies for integration with Si.

To appear in October-issue of NanoLetters

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Growth of epitaxially nucleated

and vertically growing GaP nano-

wires on Si (111)-substrates.

(A) A 45° tilt SEM micrograph of GaP

nanowires growing vertically from the

Si (111) surface in the [111] direction.

The wires were grown using 40 nm

seed Au nanoparticles. Top wire dia-

meter is close to 40 nm.

(B) Top view of the same sample

showing the perfection in the vertical

alignment. Scale bar 1 m.

(C) HRTEM image of the Si substrate

– GaP nanowire interface. The crystal

directions from the Si substrate are

transferred to the nanowire.

Scale bar 10 nm.

To appear in October-issue of NanoLettersEpitaxial III-V Nanowires on Si

Formation of ideal GaP – GaAsP – GaP double heterostructures in GaP nano-wires grown on silicon substrates.

The luminescence from these nanowiresis as bright as from those grown on GaPsubstrates and show negligible thermalquenching up to room-temperature.

To appear in October-issue of NanoLetters


Since nanowires can form ideal RTDs and SETs, as well assingle quantum dot emitters, single photon on demand devicesmay soon become available using nanowire techniques

Nano-photonic light-sources on silicon and, in general, hetero-structure devices on silicon can be expected, based on epitaxialquality III-V nanowires & heterostructures now realized on Si

With the development of a wrap-gate technology for nano-wires, high-performance FET devices can be fabricated

Nanowires are likely candidates to give ideal 1D superlattices


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