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Timer A Last updated 6/17/19

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Page 1: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

Timer A

Last updated 6/17/19

Page 2: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

2 © tjEE 2920

Timer A

• Advanced Timer Functions

• Output Compare• Sets a flag and/or creates an interrupt when the counter value

matches a value programmed into a separate register

• Input Capture• Captures the counter value when a trigger event occurs

• Sets a flag and/or creates an interrupt

• Pulse Width Modulation (PWM)• Creates an automated PWM signal

Page 3: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

3 © tjEE 2920

Timer A

• Advanced Timer Function

• Output Compare• Sets a flag and/or creates an interrupt when the counter value

matches a value programmed into a separate register

• Delay Counter – in Periodic Mode• Count up or down - to or from – the Max Value

• Compare Register • Holds the value to compare with the counter value

• When matched – create a flag/interrupt

Page 4: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

4 © tjEE 2920

Timer A

• Advanced Timer Function

• Output Compare

ProgrammableUp/Down Counter

Overflow Flag

Action

Interrupt

up/down

clock

Compare Register

time

Flag

(Max Value)

cou

nt

comparevalue

Flag Flag

Page 5: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

5 © tjEE 2920

Timer A

• Advanced Timer Function

• Input Capture• Captures the timer count when an input event occurs

• Sets a flag and/or creates an interrupt

• Delay Counter – in Periodic Mode• Count up or down - to or from – the Max Value

• Capture Register • Holds the value of the counter when an input event occurs

Page 6: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

6 © tjEE 2920

Timer A

• Advanced Timer Function

• Input Capture

ProgrammableUp/Down Counter

Overflow Flag

Action

Interrupt

up/down

clock

Capture Register

time

(Max Value)

cou

nt

InputEvent

event

Flag/InterruptCount stored in register

Page 7: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

7 © tjEE 2920

Timer A

• Advanced Timer Function

• Pulse Width Modulation (PWM)• Create an output waveform based on two counter values

• Many variations

• Delay Counter – in Periodic Mode• Count up or down - to or from – the Max Value

• Compare Register(s)• Holds the value to compare with the counter value

• When matched – create a flag/interrupt

• Waveform Generator• Creates output transitions based on timer events

Page 8: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

8 © tjEE 2920

Timer A

• Advanced Timer Function

• PWM

ProgrammableUp/Down Counter

Overflow Flag

Event

Interrupt

up/down

clock

Compare Register

WaveformGenerator

Output

Signal

Flag

(Max Value)

cou

nt

comparevalue

Flag Flag

ou

tpu

t

manyvariations

clear on flag

set on wrap

Page 9: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

9 © tjEE 2920

Timer A

• MSP432 Timer A

Page 10: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

10 © tjEE 2920

Timer A

• MSP432 Timer A

• ARM (AMBA Compliant) timer

• 4 – 16 bit timers

• 3 Timer Modes• Up

• Continuous

• Up/Down

• 4 Capture/Compare Modes• Timer

• Capture

• Compare

• PWM

Page 11: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

11 © tjEE 2920

Timer A

• MSP432 Timer A• 4 Timers - each with

5 capture/compare

blocks

Timer

1 of 5Capture/Compare

Blocks

Page 12: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

12 © tjEE 2920

Timer A

• MSP432 Timer A

• Timer - Up mode• Max count value is 216

• TAxCCR0 register – holds the upper limit for the count

• 2 Flags• CCIFG – set when counter reaches TAxCCR0value

• TAIFG – set when the counter wraps around to 0

TAIFGFlag

TAxCCR0 value

cou

nt

TAIFGFlag

TAIFGFlag

CCIFGFlag

CCIFGFlag

CCIFGFlag

1 clock separationbetween the two flags

Page 13: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

13 © tjEE 2920

Timer A

• MSP432 Timer A

• Timer - Continuous mode• Count value is 216

• TAIFG – set when the counter wraps around to 0

TAIFGFlag

Count Value 216

cou

nt

TAIFGFlag

TAIFGFlag

Page 14: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

14 © tjEE 2920

Timer A

• MSP432 Timer A

• Timer - Up/Down mode• Max count value is 216

• Allows for 2x period

• TAxCCR0 register – holds the upper limit for the count

• 2 Flags• CCIFG – set when counter reaches TAxCCR0value

• TAIFG – set when the counter reaches 0

TAxCCR0 value

cou

nt

TAIFG Flag TAIFG Flag

CCIFGFlag

CCIFGFlag

Page 15: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

15 © tjEE 2920

Timer A

• MSP432 Timer A

• Capture/Compare Block – Capture Mode• 5 Capture blocks in each timer

• 2 trigger inputs• CCIxA, CCIxB

• Can be tied to internal or external signals (pins)

• Can select rising edge trigger, falling edge trigger or both

• Captured timer value stored in TAxCCRn

• CCIFG flag is set

• Input value is visible as the CCI bit

• Overflow bit (COV) to indicate a second trigger has been received prior to clearing the first trigger

Page 16: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

16 © tjEE 2920

Timer A

• MSP432 Timer A

• Capture/Compare Block – Compare Mode/PWM Mode• 5 Compare blocks in each timer

• Desired Compare values stored in TAxCCRn (n = 0:4)

• CCIFG flag is set

• Internal signal EQUn is set – modifies output modes

• Input signal CCI is latched into SCCI

• Used to create periodic interrupts or PWM signals

Page 17: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

17 © tjEE 2920

Timer A

• MSP432 Timer A• Timer Output Block• Automatically create output signals

• 8 modes – set by OUTMODx bits

• Outputs based on EQU0 (count matches CCR0) and EQUn (count matches CCRn)

Page 18: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

18 © tjEE 2920

Timer A

• MSP432 Timer A

Timer in UP mode

n

Page 19: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

19 © tjEE 2920

Timer A

• MSP432 Timer A

Timer in Continuousmode

n

Page 20: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

20 © tjEE 2920

Timer A

• MSP432 Timer A

Timer in Up/Downmode

n

Page 21: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

21 © tjEE 2920

Timer A

• MSP432 Timer A

• Interrupts• 2 interrupt vectors

• TAxCCR0 vector• Used for the CCIFG flag for TAxCCR0 only

• TAxIV vector• CCIFG flag set in capture mode on TAxCCRn

• CCIFG flag set in compare mode on TAxCCRn

• TAIFG flag

Page 22: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

22 © tjEE 2920

Timer A

• MSP432 Timer A

• Interrupts• TAxIV vector generator

• CCIFG and TAIFG flags are combined into a single interrupt vector

• The highest priority enabled interrupt generator is stored in the TAxIVregister

• Can be evaluated or added to PC to execute the ISR

• Reading TAxIV clears the current interrupt flag and activates the next highest pending interrupt

Page 23: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

23 © tjEE 2920

Timer A

• MSP432 Timer A

• Calculation examples• Desire a 1KHz 50% duty cycle square wave

• Timer in UP mode

• Tclk = 12MHz

12MHz clk→ 83.33ns/clk

1KHz → 1ms period

→12,000 12MHz clks / 1KHz period

for a square wave – 6000 12MHz clks low, 6000 12MHz clks high

12,000 clks is well within our 65,536 maximum limit

Page 24: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

24 © tjEE 2920

Timer A

• MSP432 Timer A

• Calculation examplesfor a square wave – 6000 12MHz clks low, 6000 12MHz clks high

Choose set/reset mode

Max = 12,000 clks

Target = 6000 clks

Up mode

Fcounter = 12MHz

TA0CCR0 = 12000

TA0CCR1 = 6000

→ 1KHz Square wave

n

Page 25: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

25 © tjEE 2920

Timer A

• MSP432 Timer A

• Calculation examples• Timer in UP mode

• Tclk = 12MHz

• Desire a 1KHz 25% duty cycle square wave

Solution

Page 26: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

26 © tjEE 2920

Timer A

• MSP432 Timer A

• Calculation examples• Timer in UP mode

• Tclk = 12MHz

• Desire a 100Hz 75% duty cycle square wave

Solution

Page 27: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

27 © tjEE 2920

Timer A

• MSP432 Timer A

• Timer A Registers

Page 28: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

28 © tjEE 2920

Timer A

• MSP432 Timer A

• Control Register

Page 29: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

29 © tjEE 2920

Timer A

• MSP432 Timer A• Control Register

Fclk = CLKsrc / 2ID / TAIDEX

Page 30: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

30 © tjEE 2920

Timer A

• MSP432 Timer A• Counter Register

Page 31: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

31 © tjEE 2920

Timer A

• MSP432 Timer A• Capture/Compare Control Register

4

4

Page 32: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

32 © tjEE 2920

Timer A

• MSP432 Timer A• Capture/Compare Control Register

Page 33: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

33 © tjEE 2920

Timer A

• MSP432 Timer A• Capture/Compare Control Register

Page 34: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

34 © tjEE 2920

Timer A

• MSP432 Timer A• Capture/Compare Register

4

4

Page 35: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

35 © tjEE 2920

Timer A

• MSP432 Timer A• Interrupt Register

Page 36: Timer A - Milwaukee School of EngineeringJun 17, 2019  · EE 2920 12 © tj Timer A •MSP432 Timer A •Timer - Up mode •Max count value is 216 •TAxCCR0 register –holds the

36 © tjEE 2920

Timer A

• MSP432 Timer A• Clock Divider Register

Fclk = CLKsrc / 2ID / TAIDEX