theses copyright undertaking · 2020. 6. 29. · 1.7 thesis layout ... plcc plastic leadless chip...

I

Abstract of thesis entitled:

‘A feasibility study on manufacturing of embedded capacitors and resistors in multi-

layer printed circuit boards’ submitted by Lee Hung-fai

For the degree of Master of Philosophy

At The Hong Kong Polytechnic University in June 2006

Abstract

Embedding capacitors and resistors into printed circuit boards (PCB) offers

many benefits over Surface Mount Technology (SMT) and Through-Hole Packaging

(PTH). These benefits include improvement in electrical performance and reliability,

and potential cost reduction. Embedded devices also enable signal integrity at speeds

over 1 GHz. Also, replacement of surface mounted discrete passives with an

embedded passives layer allows for tighter component spacing, fewer via hole

counts and a larger routing area. All these are essential for board miniaturization.

However, the goals of reliability improvement, space conservation, performance

enhancement and solder joint reduction by using embedded passives can only be

realized if the PCB fabricator can produce quality boards in a practical production

environment in a timely manner.

This project investigated the manufacturing of embedded resistors and

capacitors on a prototype basis with the possibility of it being extendable to normal

mass production. The sequential lamination technique has been applied to form a

PCB with embedded passives in this project. To verify the manufacturing capability,

samples of integrated planar resistors and buried capacitors were fabricated on

specially designed PCB test panels. The results showed that by using the 50 Ω/□

Ohmega-Ply resistivity material, resistors with a 0.5 mm minimum size dimension

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could be produced with a yield rate of 99%. The average tolerance was below 4% at

the resistor core fabrication stage and the embedded resistors after integration

showed increments in resistance of around 5% to 20%. In terms of embedded

capacitors, the capacitive material namely C-Ply with a capacitance of 0.775 nF/cm2

(5 nF/in2) was used. The results were satisfactory as the measurements showed a

maximum average tolerance of 5.7% before integration and a slight improvement to

4.5% after integration. In conclusion, the embedded resistors and capacitors were

successfully built with a high yield rate to 99% and the tolerance of embedded

resistor and capacitor were maintained at around 5% to 20% before and after PCB

lamination.

III

Acknowledgements

The author would like to take this opportunity to express his sincere thanks

to his project supervisor, Dr. C.Y. Chan. His support, guidance and encouragement

made this thesis possible. Thanks also go to Dr. K.C. Yung for his invaluable advice

and suggestions.

Moreover, the author would also like to thank his colleagues in Topsearch

Printed Circuits Ltd. Special thanks to Mr. C.S. Ng, Mr. Bosco Chow, Mr. Greg

Lucas and Greg Link, for their thoughtful discussions and valuable ideas. The

technical assistance provided by Mr. Peter Tan and Mr. Han Xue Feng is also much

appreciated.

Last, but not the least, the author wishes to express his thanks to his wife and

son, for their continuous encouragement and patience during the past two years.

IV

Table of Contents

Abstract.......................................................................................................................I

Acknowledgements..................................................................................................III

List of Abbreviations ............................................................................................ VII

List of Figures..........................................................................................................IX

List of Tables ........................................................................................................XIII

Chapter 1 Introduction to Embedded Passives ...................................................... 1 1.1 Introduction to the Development of Electronic Components...................................................... 2 1.2 Electronic Component Classification......................................................................................... 4 1.3 Electronic Components: Packaging and Utilization .................................................................. 6 1.4 Benefits of Using Embedded Passives ........................................................................................ 8 1.5 Limitations on Using Embedded Passives.................................................................................. 9 1.6 Project Objectives .................................................................................................................... 11 1.7 Thesis Layout............................................................................................................................ 11

Chapter 2 The Development of Embedded Passives............................................ 14 2.1 The Fabrication of Embedded Passives ................................................................................... 15

2.1.1 The Low Temperature Co-fired Ceramics Technology .................................................... 15 2.1.2 The Lamination Approach ................................................................................................ 17 2.1.3 Thin Film Deposition Method .......................................................................................... 19 2.1.4 The Plating Approach for Embedded Resistors................................................................ 19

2.2 Materials for Embedded Passives ............................................................................................ 20 2.2.1 The Resistive Materials .................................................................................................... 20 2.2.2 The Properties of Ohmega-Ply ......................................................................................... 22 2.2.3 The Capacitive Materials .................................................................................................. 24 2.2.4 Inductors ........................................................................................................................... 26

2.3 Research Focus ........................................................................................................................ 28

Chapter 3 Methodology for Embedding Passives ................................................ 30 3.1 The Sequential Lamination Technique ..................................................................................... 31 3.2 Resistor Core Fabrication........................................................................................................ 34 3.3 Embedded Resistor Test Pattern Design .................................................................................. 36 3.4 Capacitor Core Fabrication..................................................................................................... 40 3.5 Embedded Capacitor Test Pattern Design ............................................................................... 41 3.6 Summary................................................................................................................................... 43

Chapter 4 Implementation of Embedded Passives Fabrication ......................... 44 4.1 Film Artwork Master Design for Embedded Passives.............................................................. 44 4.2 Embedded PCB Fabrication..................................................................................................... 47

4.2.1 Inner Layer Core Fabrication............................................................................................ 47

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4.2.2 Lamination of Embedded Resistor and Capacitor Cores .................................................. 51 4.2.3 Outer-layer Test Pattern Fabrication................................................................................. 52

4.3 Embedded PCB Testing............................................................................................................ 53 4.3.1 Test Applications and Facilities........................................................................................ 53 4.3.2 Characteristics of EPT PCB Tests .................................................................................... 56

Chapter 5 Fabrication and Testing of Embedded Resistor Core ....................... 60 5.1 Embedded Resistor Sample Preparation .................................................................................. 60 5.2 Result and Discussion (Trial Run)............................................................................................ 69

5.2.1 Trial Run Resistor Dimension and Resistance Value Relationship Analysis ................... 69 5.2.2 Trial Run of Embedded Resistor Analysis........................................................................ 75

5.3 Process Modification................................................................................................................ 77 5.4 Results and Discussion (Post Trial Run) .................................................................................. 78

5.4.1 Post Trial Run Result and Analysis .................................................................................. 79 5.5 Summary................................................................................................................................... 87

Chapter 6 Fabrication and Testing of Embedded Capacitor Core .................... 88 6.1 Embedded Capacitor Sample Preparation............................................................................... 88 6.2 Results and Discussion (Embedded Capacitor)........................................................................ 94 6.3 Summary................................................................................................................................... 99

Chapter 7 Embedded Passives Integration......................................................... 100 7.1 Embedded Passives Integration.............................................................................................. 100 7.2 Result and Discussion on Embedded Passives Integration .................................................... 105 7.3 Microstructure Analysis after Integration .............................................................................. 111 7.4 Verification of Resistors and Capacitors after Integration .................................................... 114 7.5 Discussion on Embedded Resistor and Capacitor Integration............................................... 122 7.6 SEM and EDX Analysis after Integration............................................................................... 124 7.7 Summary................................................................................................................................. 128 7.8 The Limitations of Embedded Passives .................................................................................. 129 7.9 Some Further Work ................................................................................................................ 130

Chapter 8 Conclusion ........................................................................................... 131

References .............................................................................................................. 133

Appendices ............................................................................................................. 140 Appendix I: The Specification of Laser Plotter ............................................................................ 140 Appendix II: The Specification of Capacitance Meter.................................................................. 141 Appendix III: The Specification of CAT Module Test System: ..................................................... 142 Appendix IV: Material Properties of C-Ply Embedded Capacitor:.............................................. 143 Appendix V: Specifications and Properties of Ohmega-Ply Resistor Conductor Material .......... 144 Appendix VI: Drilling Data File for Target Holes ....................................................................... 147 Appendix VII: Embedded Resistors Trial Run Data..................................................................... 148 Appendix VIII: Embedded Resistors Post Trial Run Data ........................................................... 156

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Appendix VIII: Embedded Capacitors Data Before Integration .................................................. 180 Appendix IX: Embedded Resistors Data after Integration ........................................................... 184 Appendix XI: Embedded Capacitors Data after Integration ........................................................ 192 Appendix XII: Verification Embedded Resistors Data Before Integration................................... 194 Appendix XIII: Verification Embedded Resistors Data after Integration..................................... 203 Appendix XIV: Verification Embedded Capacitor Data before Integration................................. 211 Appendix XV: Verification Embedded Capacitor Data after Integration..................................... 213 Appendix XVI: Conventional PCB Fabrication Processes........................................................... 215

VII

List of Abbreviations

AC Alternating-Current

A Area

C Capacitance of a Planar Capacitor

CAT Conductor Analysis Testing (For resistivity testing)

CAD Computer Aided Design

CAM Computer Aided Manufacturing

Dk Dielectric Constant

DC Direct Current

DES Develop-Etch-Strip

DPU Defects per Unit

EPT Embedded Passive Technology

EMI Electro-Magnetic Interference

HiDEC High Density Electronics Center

HIC Hybrid Integrated Circuits

h Thickness of Resistor

IC Integrated Circuits

IPD Integrated Passive Devices

L Length

L/W Length to Width Ratio

LTCC Low Temperature Co-fired Ceramics

MTBF Mean Time Between Failure

NCMS National Center for Manufacturing Science

Ω/□ Ohm per Unit Square

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PLCC Plastic Leadless Chip Carrier

PCB Printed Circuit Board

PCBA Printed Circuit Board Assemblies

PP Pattern Plating

PTH Through-Hole Packaging

QFP Quad Flat Pack

RF Radio Frequency

RFI Radio Frequency Interference

RTC Reverse Treated Copper

Rs Sheet Resistivity

SES Strip-Etch-Strip

SEM Scan Electronic Microscope

SMD Surface Mount Devices

SMT Surface Mount Technology

TCR Temperature Coefficient of Resistance

t Dielectric Thickness

W Width

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List of Figures

Figure 1.1 The Growth of SMT ............................................................................... 3

Figure 2.1 SMT and EPT Schematics ................................................................... 14

Figure 2.2 Embedded Resistor Fabricated by LTCC .......................................... 17

Figure 2.3 Embedded Capacitors Fabricated by LTCC ..................................... 17

Figure 2.4 Embedded Resistors Fabricated by Lamination................................ 18

Figure 2.5 Embedded Capacitors Fabricated by Lamination ............................ 19

Figure 2.6 Embedded Resistor Fabricated by Plating Technology .................... 20

Figure 2.7 BC2000 Construction ........................................................................... 25

Figure 3.1 Integration Processes of Embedded Resistors and Capacitors ........ 31

Figure 3.2 Typical Multi-layer PCB Stack-up for Hydraulic Lamination ........ 32

Figure 3.3 The Six Layers PCB Lay up Structure ............................................... 32

Figure 3.4 Schematic of Resistor Core Fabrication Sequence ............................ 35

Figure 3.5 Embedded Resistors Test Pattern ....................................................... 36

Figure 3.6 Test Patterns in a Module .................................................................... 37

Figure 3.7 Resistor Sizes in a Module.................................................................... 37

Figure 3.8 Resistor with Resistance Value at Three Times of the Sheet

Resistivity ......................................................................................................... 39

Figure 3.9 Embedded Resistors Test Panel Layout ............................................. 39

Figure 3.10 Schematic of Capacitor Core Fabrication Sequence ....................... 41

Figure 3.11 Embedded Capacitors Test Pattern .................................................. 42

Figure 4.1 SUN Blade 100 CAD/CAM system...................................................... 45

Figure 4.2 Orbotech LP-7008 Film Plotter ........................................................... 45

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Figure 4.3 Film Developing System ....................................................................... 46

Figure 4.4 Internal Sections of a Film Developer................................................. 46

Figure 4.5 Dry Film Laminator ............................................................................. 47

Figure 4.6 Pre-treatment Machine ........................................................................ 48

Figure 4.7 ORC Exposure Machine ...................................................................... 48

Figure 4.8 The Develop-Etch-Strip Line (DES line) ............................................ 49

Figure 4.9 Resistive Etching Tank ......................................................................... 50

Figure 4.10 Special Design Rack for Holding Test Panel .................................... 51

Figure 4.11 Hydraulic Press Machine ................................................................... 52

Figure 4.12 CAT Module Test System for Measuring Resistance Values ......... 54

Figure 4.13 LEICA Microscope ............................................................................. 55

Figure 4.14 Scanning Electron Microscope (SEM) (Leica Cambridge

Stereoscan 400I) .............................................................................................. 56

Figure 5.1 Resistor Core Fabrication Procedures................................................ 60

Figure 5.2 Resistor Test Panel Artwork Design ................................................... 61

Figure 5.3 Resistor Test Panel Circuit Film Artwork ......................................... 61

Figure 5.4 Resistor Location Film Artwork ......................................................... 62

Figure 5.5 Resistor Core before and after Dry Film Lamination....................... 63

Figure 5.6 Exposed Panels...................................................................................... 64

Figure 5.7 Developed Panels .................................................................................. 65

Figure 5.8 Resistor Pattern before Resistive Etching .......................................... 66

Figure 5.9 Resistor Pattern after Resistive Etching ............................................. 66

Figure 5.10 Resistor Pattern after Photoresist Film Stripping ........................... 67

Figure 5.11 Resistor Pattern after Second Etching.............................................. 68

Figure 5.12 Resistance Value against Length/Width Ratio (Panel 1) ................ 72

XI


Figure 5.14 Resistance Tolerance against L/W Ratio (Panel 1).......................... 75


Figure 5.16 The Normal UV Light Strikes the Artwork Film ............................ 77

Figure 5.17 The Co-light strikes the Artwork film in one direction................... 78



Figure 5.20 Resistance Value against Length/Width Ratio (All Panels)............ 83


Figure 5.22 Resistance Tolerance against L/W Ratio (Panel 4r) ........................ 86

Figure 5.23 Resistance Tolerance against L/W Ratio (All Panels) ..................... 87

Figure 6.1 Capacitor Core Fabrication Procedures............................................. 88

Figure 6.2 Capacitor Test Panel Artwork............................................................. 89

Figure 6.3 Artwork for Hole Openings ................................................................. 89

Figure 6.4 Panel Carrier for Handling of Embedded Capacitor Core .............. 90

Figure 6.5 The Embedded Capacitor after First Etching ................................... 91

Figure 6.6 Three Layer Board Structure .............................................................. 92

Figure 6.7 Heat-up Cycle Temperature Profile.................................................... 93

Figure 6.8 Dielectric Thickness Measurement by SEM ...................................... 96

Figure 6.9 Capacitance Distribution (Panel 1c) ................................................... 97

Figure 6.10 Capacitance Distribution (Panel 2c) ................................................. 97



Figure 7.1 Embedded Passives Integration Procedures .................................... 100

Figure 7.2 The Six Layer Embedded Resistor and Capacitor Structure PCB 101

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Figure 7.3 Outer Layer Test Pad Artwork ......................................................... 104

Figure 7.4 EPT Sample PCB ................................................................................ 104

Figure 7.5 Resistance Value against L/W Ratio after Integration (Panel 1) ... 109

Figure 7.6 Resistance Value against L/W Ratio after Integration (Panel 2) ... 109

Figure 7.7 Capacitance Distribution after Integration (Panel 1s) .................... 110

Figure 7.8 Capacitance Distribution after Integration (Panel 2s) .................... 111

Figure 7.9 100x Cross-section of Integrated Resistor and Capacitor............... 112

Figure 7.10 200x Cross-section of Integrated Resistor and Capacitor............. 113

Figure 7.11 2000x SEM Cross-section of Integrated Resistor........................... 113

Figure 7.12 Resistance Value against L/W Ratio after Integration (Panel V1)

......................................................................................................................... 118

Figure 7.13 Resistance Value against L/W Ratio after Integration (Panel V2)

......................................................................................................................... 118

Figure 7.14 Capacitance Distribution before Integration (Panel V1c) ............ 120

Figure 7.15 Capacitance Distribution after Integration (Panel V1cs) ............. 120

Figure 7.16 Capacitance Distribution before Integration (Panel V2c) ............ 121

Figure 7.17 Capacitance Distribution after Integration (Panel V2cs) ............. 121

Figure 7.18 200x SEM Photo of Integrated Structure ....................................... 125

Figure 7.19 1000x SEM Photo of Embedded Resistor Layer............................ 126

Figure 7.20 800x SEM Photo of Embedded Capacitor ...................................... 126

Figure 7.21 EDX Result of Dielectric Material .................................................. 127

Figure 7.22 EDX Result of Resistive Material.................................................... 127

XIII

List of Tables Table 1.1 Current Product Passive to Active Ratios ................................................. 7

Table 2.1 Characteristics and Suppliers of Embedded Resistors Material ............ 21

Table 2.2 The Properties of Ohmega-Ply Material ................................................. 23

Table 2.3 Characteristics and Suppliers of Embedded Capacitors Material ......... 26

Table 4.1 Resistor Sizes and Expected Resistance Values in a Module................. 57

Table 5.1 Resistance Values at Different L/W Ratios and Orientations (Panel 1

&Panel 2).......................................................................................................... 71

Table 5.2 Resistance Tolerances (Panel 1) ............................................................. 73

Table 5.3 Resistance Tolerances (Panel 2) ............................................................. 74

Table 5.4 Resistance Values at Different L/W Ratios and Orientations using Co-

light Exposure (Panel 3 &Panel 4) ................................................................. 80

Table 5.5 Resistance Values at Different L/W Ratios and Orientations using Co-

light Exposure (All Panels).............................................................................. 81

Table 5.6 Resistance Tolerance using Co-light Exposure (Panel 3 & Panel 4) .... 84

Table 5.7 Resistance Tolerance using Co-light Exposure (All Panels) ................. 85

Table 6.1 Capacitance Characteristics of Capacitor Core (All 4 Panels).............. 96

Table 7.1 Resistance Values before and after Integration (Panel 1) ................... 107

Table 7.2 Resistance Values before and after Integration (Panel 2) ................... 108

Table 7.3 The Capacitance Results Before and After Integration ....................... 110

Table 7.4 Resistance Values before and after Integration (Panel V1) ................ 116

Table 7.5 Resistance Values before and after Integration (Panel V2) ................ 117

Table 7.6 The Capacitance Results before and after Integration ........................ 119

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Chapter 1 Introduction to Embedded Passives

Resistors, capacitors, inductors, and their combinations are categorized as

passive components, which do not introduce gain or have directional functions.

Traditionally, there are two manufacturing techniques for passive components:

Through-Hole Packaging (PTH), and the Surface Mount Technology (SMT). PTH

technology started sometime around the 1950s and SMT was being investigated at

the beginning in the 1980s, and has gradually been taking the place of PTH. Today,

SMT is the most commonly used mounting technique for discrete passives. However,

the demand for faster bus speeds (say, larger than 100MHz), down sizing of

electronic equipment, and better reliability of Printed Circuit Board Assemblies

(PCBA) are driving the advance of new technology [1]. Thus, embedded

components are being developed to meet the requirements. Embedded components

are sometimes called integral components, to distinguish them from integrated

Surface Mount Devices (SMD) and to reflect the nature of embedding within a

substrate. Compared with SMT, the implementation of embedded passives can

further miniaturize the physical size of a PCBA and this is very important for

electronic appliances such as cellular phones, Personal Data Assistants, camcorders,

etc. In addition, the reduction of solder joints by applying the Embedded Passive

Technology (EPT) can enhance the reliability of a PCBA, and improves the

electrical performance of a circuit. In reality, embedded capacitors are an effective

means of reducing noise in PCB power buses. Unlike surface-mounted capacitors,

embedded capacitors provide effective decoupling well above 1 GHz.

Embedded components are placed within or on the interconnecting substrates

of a PCB. They are distinguished from discrete passives (chips) and integrated

2

passives (multiple passive functioning within a single package) [2] in that instead of

being externally mounted on the PCB. Embedded passives are physically part of the

PCB, being set in some material to form resistors and capacitors in a board. The

advantages of embedded components are: reduction in the number of discrete

components on the board surface, lower parasitic inductances and cross-talk among

active components, reduction of waste, and potentially decreased cost.

With the rapid developments of computer and telecommunication

technologies, embedded resistors and capacitors can be considered as the Holy Grail

in terms of integration. The ability to free surface area to add more silicon devices

can substantially increase the functions on small electronic systems. However, this

technology will only be beneficial to the PCB fabricators if they are capable of

manufacturing quality boards in the production environment in a timely manner.

1.1 Introduction to the Development of Electronic Components

In the 1950s, soldering of leaded components directly onto the circuit board

could be seen as the initial mode for electronic components. Today, SMD are still

being widely used in PCBs. In the earlier period, surface mount components were

first applied to high reliability military products and the component connections

were gold plated. However, due to the expense of the material and processing costs,

they were not popular at that time. In the 1960s, the fast growth of semi-conductor

devices produced another movement in electronic components; the leaded

components were constantly becoming smaller and the surface mounted devices

began to be commercially adopted. Household electronic appliances such as color

televisions and mini-radios were some of the typical products. In early 1970s, Japan

started to use a new plastic packing technique for making calculators call the Quad

3

Flat Pack (QFP). The QFP is a square integrated circuit component that has wing

shaped leads on all sides. The pitch between the centers of the leads can be as large

as 1.0 mm (40 mils) and as small as 0.65 mm (25 mils), and the number of leads can

exceed 160 pins. The United States also fabricated plastic chip carrier (PLCC)

components with leads in the form of a “J" and the pitches were within 1.27 mm (50

mils). Along with the gradual of hybrid integrated circuits (HIC), SMT applications

increased quickly. Until 1980s, different kinds of SMT film resistors, film capacitors

and inductive devices successfully dominated the electronic component market

while sensors, relays, switches, and integral components were all continuously

researched. Moreover, electronic component modernization also accelerated the

assembly technology development as time went by. Nowadays, SMD have more

than 50% of the market share. In Figure 1.1, we can see that SMD only contributed

5% of all the electronic components in the market in 1981 but an amount of over

80% had been recorded for the SMT [3] and mixed boards in 2002 ; in comparison,

the leaded component market shrank rapidly. As the use of SMDs become

increasingly popular, the price dropped due to competition.

components% usage in new designs

0%

20%

40%

60%

80%

100%

80 82 84 86 88 90 92 94 96 98 2000 2002Time (yr)

Pure SMT assemblies mixed assemblies (SMT/PHT) Pure PHT assemblies

Figure 1.1 The Growth of SMT

4

By comparing SMD with traditional PTH components, SMD are smaller,

lighter, more reliable, and capable of handling a higher signal transmission rate.

Currently, the USA, Japan and Europe use a lot of SMDs in their products; Japan

most widely uses SMD in household appliances and entertainment equipment, while

the military is the main SMD user in the USA. SMD is now the pillar of modern

electronics. As electronic product manufacturers are squeezing more functionality

into smaller spaces such as in many portable products, more passive components are

needed to manage buses, decouple integrated circuits and signal filtering, etc. Today,

embedding passives in PCB have attracted a lot of attention although the practical

manufacturing processes of EPT still need some fundamental investigation.

1.2 Electronic Component Classification

Active electronic components are semi-conductor components that replaced

the previous generation of vacuum tube devices. Examples are discrete diodes,

transistors, thyristors and ICs. However, they cannot be embedded in organic PCBs

at the moment. This project focuses only on embedding passive electronic

components in organic PCBs. On the other hand, passive components manipulate

electronic signals but do not amplify, rectify, or switch the signal. For example

resistors, capacitors, transformers all belong to this category. Among these,

capacitors, resistors and inductors are typical components that are embedded in a

board.

Each capacitor is a primary element in an electronic circuit. Its simplest form

consists of two conducting plates separated by an insulating material called the

dielectric. The capacitance value is directly proportional to the face areas of the

plates, and is inversely proportional to the separation distance between these plates.

5

Capacitance also depends on the dielectric constant of the substance in between the

plates. In a circuit board, capacitors are mainly for:

(a) Storing energy to provide short time high power electricity and to provide a

constant voltage or constant current.

(b) Filtering energy and direct current (DC) to provide better defined, cleaner

signals.

(c) Eliminating unwanted frequencies and limiting the low frequency in radio

frequency (RF) circuits.

(d) Controlling electro-magnetic interference (EMI) / Radio Frequency

Interference (RFI) in noisy environments.

(e) Sensing signals to transmit information between circuits.

(f) Providing timing, to delay or synchronize with other circuits

Resistors are used to regulate the flow of electrical current in an electronic

circuit. In a direct-current (DC) circuit, the current through a resistor is inversely

proportional to its resistance, and directly proportional to the voltage across it. This

is the well-known Ohm's Law. In alternating-current (AC) circuits, this rule also

applies as long as the resistor does not contain inductance or capacitance. Resistors

have existed for more than 90 years and they are fabricated in a variety of ways. The

most common type is the carbon-composition resistor which is fabricated by mixing

fine granulated carbon (graphite) with clay. The resistance depends on the

proportion of carbon to clay; the higher this ratio, the lower the resistance. Other

types of resistors are made from winding Nickel Chrome or similar wires onto

insulating forms. They are also called wire wound resistors and are able to handle

higher currents than carbon-composition resistors of the same physical size.

However, because the wire is wound into a coil form, a winding resistor also acts as

6

an inductor as well as exhibiting resistance. This does not affect performance in a

DC circuit, but can have an adverse effect in an AC circuit since inductance renders

the device sensitive to changes in frequency.

An inductor is also a passive electronic component that stores energy in the

form of a magnetic field. It consists of a wire loop and the inductance is directly

proportional to the number of turns in the coil. Inductance also depends on the

radius of the coil and the type of material around which the coil is wound. For a

given coil radius and number of turns, air cores reduce the inductance while

Ferromagnetic substances such as iron can greatly increase the inductance. The

shape of the core is also a significant factor; a toroidal (doughnut-shaped) core

normally provides more inductance than a solenoid (rod-shaped) core.

1.3 Electronic Components: Packaging and Utilization

Today, most of the passive devices are in the form of discrete SMDs. Table

1.1 on the next page summaries the use of passive and active components in typical

electronic products [4]. As observed, the passives to actives ratios can vary from less

than 10:1 to nearly 50:1. In fact, the passives always dominate the component

population and any advancement in passive packaging technology will have a

significant impact on the PCB assembly industry. Furthermore, the growth of inputs

and outputs (I/O) of IC encourages manufacturers to address the question of

miniaturization, and so also usually improves reliability and functionality. Therefore,

the ratio of passives to actives is continually increasing. Apart from the discrete

passive components, the passive arrays and networks, integrated passive devices

(IPD) and embedded passives have attracted a lot of interest.

7

System Total Passives Total ICs Ratio Cellular Phones

Ericsson DH338 Digital 359 25 14:1 Ericsson E237 Analog 243 14 17:1 Philips PR93 Analog 283 11 25:1 Nokia 2110 Digital 432 21 20:1

Motorola MRL 1.8 GHz 389 27 14:1 Casio PH-250 373 29 13:1

Motorola StarTAC 993 45 22:1 Matsushita NTT DoCoMo 492 30 16:1

Consumer Portables Motorola Tango Pager 437 15 29:1

Casio QV10 Digital Camera 489 17 29:1 1990 Sony Camcorder 1226 14 33:1

Sony Handy Cam DCR-PC7 1329 43 31:1 Other Communication Motorola Pen Pager 142 3 47:1

InfoTAC Radio Modem 585 24 24:1 Data Race Fax-Modem 101 74 7:1

PDA Sony Magic Link 538 74 7:1

Table 1.1 Current Product Passive to Active Ratios

A passive array combines several passive elements of the same function (e.g.,

either capacitors or resistors) to form in a single SMD. A passive network groups

several passives of various functions or values (e.g. capacitors plus resistors) into a

single component. Each network typically contains 4 to 12 elements. The key

applications for passive arrays are mobile and cordless phones, digital satellite top

boxes, computer motherboards and peripherals as well as automotive applications,

RF modems, networking products, etc. A Passive array/network offers the

opportunity to reduce the placement cost through lower component count per board,

and to reduce electronic circuit real estate requirements. This results in increased

throughput and translates into savings on machine time. Inventory levels are lowered

and further savings are made on soldering materials, etc. Obviously board space

savings can be quite dramatic when compared to the use of discrete devices. An IPD

consists of multiple passive components and it may sometimes include active

8

element(s) to perform designated actions. It has advantages similar to that of a

passive array/network. Other names of an IPD are the “super component” and the

“functional module”. However, the availability of IPD is not as good as discrete

components and passive array/network because of the lack of standards among

suppliers. The manufacturing cost is also higher. The values of the resistors are

limited because, in most cases, components are limited to single sheet resistivity; so

a large shop floor area is required to fabricate high value resistors. Nevertheless,

even with the use of smaller dimensional discrete passives, judicious insertion of

network and array passives, many applications are still struggling to overcome the

performance and the sizing problems. Although IPD has been introduced to address

the needs, there is still room for improvement and the EPT provides a potential

alternative.

1.4 Benefits of Using Embedded Passives

Replacing discrete components, which can account for 90% of the

component population places, will also enhance reliability and yields [5]. Solder

joint failure is the highest defect type in electronic products and discrete components

currently account for more than 30% of all solder joint defects. Moving to embedded

passives eliminates two joints per component. For instance, the Defect per Unit

(DPU) will decrease when embedded devices are substituted for discretes. Also, the

Mean Time Between Failure (MTBF) of a product will be better if decoupling

capacitors are replaced by embedded capacitors. The actual MTBF values can be

obtained from DoD MIL-HDBK-217 or Bellcore FR-NWT-000978; these

handbooks contain the MTBF calculation methods for components.

9

A single board computer is generally composed of 5% ICs, 4% connectors,

40% capacitors, 33% resistors and 18% miscellaneous parts [6]. Therefore, the

application of embedded passives can save the surface area for other functions.

Since the number of passive components is usually large, the area saved can be very

significant. For example, once discrete components are removed from the surface of

a PCB, the board can be made smaller or provide more signal routing areas.

The electrical performance of embedded passives is considerably better than

discrete passives in many high-speed applications [7], especially when the frequency

reaches the 1 GHz range (e.g., RF devices and workstations). When components are

buried underneath an IC, both the lead length and the inductance due to the

connection loops can be avoided. When an embedded capacitor is utilized to bypass

a high frequency signal, it can reduce the EMI generation as long as the capacitor

can be located close to the target component. At high frequencies, this means the

inductance of the system must be carefully controlled. A system using discrete

capacitors will have inductance contributed from the power/ground planes via holes

accessing the planes, the inherent inductance of capacitors, pads for capacitors

mounting, and traces connecting capacitors to other components. The last two

inductance contributors can be eliminated when embedded capacitors are used.

1.5 Limitations on Using Embedded Passives

Embedded passives do not allow for quick design changes. Thus, they would

reduce the engineering and the manufacturing flexibility. A set of comprehensive

design rules are needed. Besides the design inflexibility of integral passive substrate,

the manufacturing should be mature to allow for mass production. If the product

design is changed frequently, it could easily out weigh the probable benefits of using

10

embedded passives. Therefore, a new family of design software is required to enable

engineers to design the integral components and the interconnection substrate

simultaneously, and this software must be able to determine the parasitics produced

by metal adjacencies, and back-annotate the schematic with these parasitics.

In fact, all advanced passives technology approaches suffer from component

density and tolerance limitations compared to discretes. Commercially available

resistive materials for making resistors for PCB applications have sheet resistivity

from 25 to 100 Ω/square although the 10 kΩ/square material is still being developed

[8]. A full range of resistive values for embedded passives is still not yet available.

Indeed, the existing resistive materials have tolerances from 5% to 10% and the

typical resistors produced today have a tolerance range from 10% to 15%. Although

the laser trimming technique [9] can be employed to reduce the tolerance of an

embedded resistor, it is not widely used as the cost is very high [10].

Most discrete capacitors and resistors cost less than half a cent at the moment

so it is a big challenge to create both new materials and processes cheaply enough so

that they will be adopted by manufacturers. With a PCB cost added of $0.06 to

$0.07/cm2/layer, this can be an expensive proposition compared to discrete passives.

On applying certain developed embedded technologies, a PCBA manufacturer needs

to pay a royalty to obtain the manufacturing license; and the flexibility will also be

limited. To solve these problems and to support EPT development, new materials

and low cost fabrication processes are surely desirable.

11

1.6 Project Objectives

To squeeze more functions into a product without increasing the size,

methods of burying components in the inner layers of a circuit board are of great

interest to PCB manufacturers, especially for those who produce portable products.

Embedding passives in a PCB is one of the developing technologies and it is

becoming more enticing for PCB manufacturers. Currently, the productions of

embedded passive boards are in laboratory-scale to medium size. In terms of mass

production, there is still no efficient approach for making embedded passive boards.

The key objective of this project is to determine suitable manufacturing processes

for the fabrication of embedded passives on a large scale. This includes investigation

of the materials to be used and the fabrication techniques with corresponding

tolerances that can be achieved. In this project, we will focus on embedding

capacitors and resistors because the demand for inductors on a PCB is relatively less

apart from those products require filtering functions and more, embedded inductors

are currently very difficult to fabricate.

1.7 Thesis Layout

This project mainly focuses on the fabrication processing of embedded

resistors and capacitors. Lamination applied to integrate both embedded resistors

and capacitors into a PCB has never been studied before. So the research is highly

original. The layout of this thesis is as follows:

In Chapter 2, a comprehensive literature review is presented to show what

types of embedded materials and which processes have been researched during the

past 20 years. Since 1980s’, much work have been done on both embedded capacitor

and resistor material and the processes involved. All kinds of method and material

12

for fabricating embedded resistors and capacitors are summarized in this chapter.

However, most of them have remained at the lab-scale, which means that they have

been realized on a small scale. Little work has been done on a production scale and

the integration of both of them in a PCB. It is very difficult to handle some material

in the real production stage.

Chapter 3 introduces the proposed sequential lamination method for

integrating both embedded resistors and capacitors together in a PCB. Sequential

lamination differs from “normal” lamination in that the substrate is laminated

multiple times, progressively. The main reason for this procedure is to overcome the

problem of handling the extremely thin dielectric layer that is needed for the

capacitors. Also processes are developed to fabricate both embedded resistor and

capacitor material in a large production manner. The pattern design considerations

for both resistive and capacitive materials are discussed in this chapter.

Chapter 4 is about the implementation of embedded passive fabrication. The

proposed sequential lamination methodology with selected resistive and capacitive

materials will be used. The experimental set-up for fabricating the necessary

components will be demonstrated in order to prove the feasibility of producing

integrated embedded resistors and capacitors in a PCB. All the related embedded

capacitors and resistors, PCB manufacturing facilities, and testing equipment will be

demonstrated in this chapter.

In Chapter 5, the procedures for preparing the embedded resistor core

samples are presented. The detailed procedures for making embedded resistors and

are explained in this chapter. These include the fabrication processes and process

parameters. Also the procedures for testing the samples will be formulated. Then,

13

the testing results of embedded resistors before and after trial run will be compared

and discussed.

The presentation of Chapter 6 is in line with Chapter 5 but is in the

preparation of the embedded capacitor core samples. Similarly, both the fabrication

processes and process parameters are discussed. Lastly, fabrication of samples and

testing results are also introduced.

In Chapter 7, the integration of embedded passives is presented. The

procedures for integrating embedded capacitors and resistors are explained.

Processing details will be presented and the testing results of both the embedded

resistors and capacitors before and after integration will be elaborated. The micro-

sections and SEM photos of the embedded panels will also be shown. The problems

of processing embedded passives are also investigated in depth in this chapter.

Thereafter, special processes will also be proposed to improve the fabrication of thin

film resistor cores and capacitor cores. Finally, some suggestions for future work are

presented.

Chapter 8 is the conclusion chapter where the contributions of this project

are highlighted. Finally, the key technical data obtained from this research are

summarized for referencing purposes.

14

Chapter 2 The Development of Embedded Passives

This project is to examine the fabrication of embedding resistors and

capacitors between the interconnecting substrates of a PCB. Figure 2.1 shows the

schematics of an SMT board and the corresponding EPT board with components

implanted. By burying resistors and capacitors in the inner layers of a PCB, these

components can be placed directly below active devices like ICs. The shorter the

distance between an embedded passive and an surface mounted active component

the better the signal transmissions, the lower the losses, and the lesser the cross-talks

and noises. These give better electrical performance and are especially important for

high frequency applications. Besides this, as mentioned before, a cutback in SMD

can free up more PCB space to allow higher component density to be

accommodated.

Figure 2.1 SMT and EPT Schematics

Currently, the fabrication of PCBA with embedded passives is being

investigated by several well-known research groups such as the National Center for

Manufacturing Science (NCMS), 3M, Dupont, Ohmega, Shipley, and Hadco (now

owned by Samina). The materials and characteristics of the different embedded

Embedded resistor Embedded capacitors Copper trace

Resistor Capacitor Capacitor

15

passive techniques [11] are quite different; as well as their methods of fabrication.

Designers should no longer regard the PCB as an intricate provider of connections,

but instead they should learn to see it as a sophisticated and integral part of a system.

As this is a new method for the PCBA, a lot of research work need to be done before

the embedded passives can be put to practical use.

2.1 The Fabrication of Embedded Passives

There are several ways of fabricating embedded passives, but no method is

conclusive at the moment. A great deal of effort has been put into research and the

techniques that have been developed are still being refined. Currently, the leading

technologies for embedded passives are the Low Temperature Co-fired Ceramics

approach, the Lamination approach, the Thin Film Deposition and the Plating

method [12, 13]. All these use dissimilar materials and different fabrication methods.

Besides, there are some limitations in the existing techniques and therefore, only

small-scale productions are done for some designated products, at this stage.

2.1.1 The Low Temperature Co-fired Ceramics Technology

The Low Temperature Co-fired Ceramics (LTCC) technology is a thick film

method of fabricating embedded passives [14, 15]. It combines the advantages of

both co-fired ceramics (a durable hermetic package) and low temperature sintering

(without a refractory metal system). The processes of fabricating embedded resistors

and capacitors by LTCC are quite similar except that with regard to the former

operations of drying and firing in nitrogen, the embedded capacitors require one

more drying and firing in nitrogen due to the need for additional electrodes. Prior to

these operations, the screen printing of polymer thick film resistive paste on copper

16

foil is performed to embed the resistors, but screen ceramic paste is needed for

capacitors. Indeed, the printed material used acts as a double agent: it is both the

resistive material for resistors and capacitive material for capacitors. Two classes of

material are currently being used. One is ferroelectronic material such as barium

titanate while another is paraelectronic material like tantalum pentoxide, silicon

dioxide, organic material, and so forth. In addition, at the beginning, the shapes of

embedded passives are determined by screen-printing and the composite is co-fired

at 850 to 900°C surrounded by nitrogen for oxidation protection in a furnace [14,

15]. As mentioned, since two electrodes are needed for a capacitor, the processes of

screening and co-firing are performed once more. The later processes for embedded

passives are similar to normal PCB manufacturing such as using photolithography to

produce electrodes. Finally, the embedded devices are enrolled by dielectric material

(e.g., FR-4) to form a PCB with internal components. The cross-sectional structure

of PCBA with embedded resistors and capacitors by LTCC are shown in Figures 2.2

and 2.3.

In comparison to other techniques, LTCC provides a hermetic product with

good thermal management. It shows significant advantages in RF and high-density

fast digital applications. In addition to the common benefits of EPT, LTCC offers a

large range of resistance, from 0.1 Ω to 10 MΩ, with a tolerance under 25%. In

terms of capacitors, it covers 4 pF to 0.04 µF, with 5% to 10% tolerance; and up to

15nH for inductors with a magnitude of over three orders and a tolerance of around

5% [16]. Consequently, LTCC seems a potential solution for fabricating embedded

components; but further studies are required to satisfy the practical requirements.

These include the ranges of capacitance and resistance values, the reliability, and the

fabrication cost.

17

Figure 2.2 Embedded Resistor Fabricated by LTCC

Figure 2.3 Embedded Capacitors Fabricated by LTCC

2.1.2 The Lamination Approach

The manufacturing of embedded passives by lamination is performed by

shaping and embedding layers of dielectric material with electrode/resistive layers.

At present, it is a frequently used method and is a way of fabricating embedded

passives that has commercial potential [13, 16, 17]. The construction used by the

lamination method is a sandwiching structure, which may have four layers for a

board with embedded resistors; two layers of copper foil (top and bottom), a film of

18

resistive layer, and a dielectric layer (e.g., FR-4). In case of embedded capacitors,

two copper foil layers are needed to form a plane capacitor with a very thin

dielectric layer (mostly less than 50.8 µm) in between the electrodes.

The thin film resistive layer sandwiched between copper and laminate can be

selectively etched to form discrete embedded resistors. Similarly, the dielectric layer

and the shape of the electrodes of a capacitor are also produced by etching to form

discrete embedded capacitors. The subsequent fabrication processes are similar to

LTCC. For capacitors, only etching printing and etching are required on both sides

of the copper foil. The dielectric layer is a whole layer, which is quite different from

the screening shapes fabricated by LTCC (See Figure 2.3). The cross-sectional

structures of a PCBA with embedded components fabricated by the lamination are

shown in Figures 2.4 and 2.5. Although there are companies that tend to use the

lamination method to produce embedded capacitors, this technique is still in its

infancy and provides only a limited range of capacitance values.

Figure 2.4 Embedded Resistors Fabricated by Lamination.

19

Figure 2.5 Embedded Capacitors Fabricated by Lamination

2.1.3 Thin Film Deposition Method

Thin film deposition is comparable to the lamination method in fabrication

and the structure received, but the dielectric layer is thinner. Moreover, the dielectric

and resistive layer are often prepared by deposition and sputtering rather than

lamination. Because the dielectric layer is a thin film, this method can receive a

larger capacitance value for a capacitor in comparison to the lamination method.

However, the thin film deposition method is an expensive method as it involves the

expensive sputtering process [18, 19].

2.1.4 The Plating Approach for Embedded Resistors

Plated embedded resistor is a new approach for applying electroless plating

technology to form embedded resistors on the laminate of a circuit board [20], and

readers can refer to the reference on the detailed fabrication processes. Figure 2.6

shows a cross-sectional diagram of this technology. One interesting feature about the

fabrication of plating embedded resistors is the laser trimming [21], which is done

when less than 5% tolerance is needed. The trimming is carried out in two stages for

a resistor; a cross cut followed by a horizontal move to fine-tune the final resistance

value, which is done under closed loop control. The rest consists of the standard

20

operations for PCB lamination. By successive imaging and plating steps, it is

possible to compose 25 to 100 Ω/square resistors on the same layer.

Figure 2.6 Embedded Resistor Fabricated by Plating Technology

2.2 Materials for Embedded Passives

The materials used for resistors are different in different research

groups/companies. As mentioned before, most fabrication methods are undergoing

investigation, and the materials used are still being refined at present. Thus, it is

worthwhile for PCBA manufacturers to have a good awareness of recent

developments.

2.2.1 The Resistive Materials

The resistive materials for manufacturing embedded resistors should have

high electrical resistivity, low Temperature Coefficient of Resistance (TCR) and

easy to be processed. Higher resistivity reduces the size of a resistor with the same

resistance value and a low TCR minimizes the effect due to temperature so the

accuracy of a resistor can be better maintained. To summarize, Table 2.1 shows the

characterizations of different fabrication methods and the corresponding supplying

FR-4

Conductor

Plated embedded resistor

Copper foil

Plated embedded resistor

FR-4

21

companies. For example, Ohmega-Ply offers four resistive sheets at 25, 50, 100, 250

Ω/square with dielectric thicknesses of 0.4, 0.2, 0.5, 0.05 µm respectively; and the

TCR ranges from 100 to 300 PPM/°C. Boeing makes 20 Ω/square resistive sheets

with a thickness of 0.2 µm and the TCR is less than 200 PPM/°C. Studies from

Arkansas University’s High Density Electronics Center (HiDEC) have revealed that

the TCR of NiCr is about 20 PPM/°C and of CrSi is around 40 PPM/°C [22].

The thin film deposition [8] and lamination methods are not much different

in terms of fabrication and neither are the structures of PCBA. The materials used to

fabricate them include TiW, TaN, NiCr, CrSi, MoSi2, Ni/Cr/Al/Si, and so forth. In

terms of LTCC [12, 14], a large range of resistance values can be provided. The

materials used can be thick film resistive paste or glass/ceramic.

Resistive material

Fabrication methods

Materials used Supplier Characterizations Ref.

TiW,TaN,NiCr,CrSi,MoSi2 - 20-500 Ω/square [12]RS 3710 alloy - 50-3000 Ω/square [12]

Ni-P

Ohmega-Ply 50,100,250 Ω/square

[23]

Deposition

A thin film of doped-Platinum

SHIPLEY 50-1000 Ω/square [24]

Lamination Cr,NiCr,Ni-P/Ni-W-P - 5-50 Ω/square [12]

LTCC A glass/ceramic - Accuracy15-30%, 10-1M Ω/square

[12]

Plated NiP MacDermid 25-100 Ω/square [20]Table 2.1 Characteristics and Suppliers of Embedded Resistors Material

22

2.2.2 The Properties of Ohmega-Ply

Ohmega-Ply is an embedded resistor material. Ni-P metal alloy is deposited

on copper foil that is laminated to a dielectric material and subtractively processed to

produce planar resistors and further is the multi-layer PCB lamination process.

Ohmega-Ply has been exhibiting excellent performance and dependability.

The resistive material of Ohmega-Ply is a very thin layer of Nickel Phosphate. This

alloy possesses high electrical resistivity, which make it practical for use in a variety

of applications. It also has good temperature stability and a low thermal coefficient

of resistance (TCR). Table 2.2 illustrates the different properties of this material [23].

A thin film resistive layer based on nickel phosphate alloys is deposited

continuously onto rolls of copper foil to create a material for embedded resistor

applications. The thin film resistive layer sandwiched between copper and laminate

can be selectively etched to form discrete resistors. The chemical for etching is

Copper II Sulphate. By controlling the thickness of the alloys, sheet resistance

values from 25 to 250 Ω/square are obtained.

Ohmega-Ply RCM Properties and Specifications Remark & Condition Sheet Resistivities

25 50 100 250

Material Tolerance

+/-5 +/-5 +/-5 +/-10

Load Life Cycling Test ( R%)

23

Time: 5 Sec Resistance Temperature Characteristic (RTC) PPM/ºC

50 60 100 100 MIL-STD-202-304 Hot Cycle: 25º,50º,75º & 125ºC

Cold Cycle: 25º,0º,-25º & -55ºC

Humidity Test ( R%)

0.5 0.75 1.0 2.0 MIL-STD-202-103 Temp: 40ºC Relative humidity: 95% Time: 240 hrs

Thermal Shock ( R%)

-0.5 1.0 1.0 1.0 MIL-STD-202-107 No. of Cycles: 25 Cold Cycle Temp:65ºC

Hot Oil ( R%)

0.1 0.25 0.5 .75 IPC-TM-650 METHOD 2.4.6 Temp: 260ºC Immersion: 20ºC

Solder Float ( R%)

0.5 0.75 1.0 0.5 MIL-STD-202-210 Temp: 260ºC Immersion: 20ºC

Resistance To Solvent ( R%)

Toluence 1-1-1:

0.2 n/a n/a n/a MIL-STD-202-215A

Trichloroethan: 0.0 n/a n/a n/a Immersion: 15 Min Acetone: 0.2 n/a n/a n/a Freon: 0.0 n/a n/a n/a Capacitance(pF) (at 5 Hz)

~1 ~1 ~1 ~1

Inductance(nH) (at 5 Hz)

24

black oxide step can be eliminated after etching the resistors and (2) thin copper foil

has a better etching resolution. For a given nickel phosphate alloy, the sheet

resistance of a thin film resistive layer is determined by film thickness, film stress

and surface roughness of copper foils. The sheet resistance is inversely proportional

to the thickness of the resistive layer.

The advantage of the sputtering process for thin film deposition is good

uniformity. The uniformity of the thin film layer deposition, in terms of thickness

and composition, is critical for the embedded resistor application because it

determines the sheet resistance tolerance of the material.

2.2.3 The Capacitive Materials

Low-capacitance capacitors (less than 1000 pF) can be embedded to provide

functions such as decoupling, by-passing, filtering, etc. The commercially available

technology is ‘BC2000’ laminate-embedded capacitors. This technology was

developed in the 1980s by Gregory L. Lucas and James R. Howard [25]. The

‘BC2000’ is simple in concept; two parallel metal plates separated by a dielectric

layer define a capacitor. The dielectric layer is constructed by a single ply of either

106 or 6060 style prepreg. Its thickness after lamination is 50.8 µm (2 mil) with a

tolerance of ±12.7 µm (±0.5 mil). The double-treated copper foils are utilized with

the drum (smooth) sides in contact with the FR-4 prepreg and the matte surfaces are

on the outer faces. See Figure 2.7. In this way, better control of the accuracy of the

capacitance is achieved and the risk of electric breakthrough of an embedded

capacitor at the high pot test is reduced [26]. The buried capacitance material is

imaged using the existing power and ground layers of a PCB and is laminated as an

25

integral part of the circuit board. Sharing capacitance provides sufficient,

instantaneous distributed capacitance with minimal inductance.

Figure 2.7 BC2000 Construction

With the lamination method, embedded capacitor layers are laminated such

that the dielectric is clad with copper foil on both sides. The dielectric is typically

epoxy or polyimide-based and is often loaded with a high dielectric constant ceramic

filler such as barium titanate to increase the capacitance. Moreover, the dielectric

layer is usually kept as thin as possible to raise the capacitance and, more

importantly, to decrease inductance. According to the 3M Company [16], the

material used for the embedded capacitors under the lamination method can be

characterized on electrical properties. The dielectric material of lamination can be

epoxy (non-brominated) filled with BaTiO3 particles, with a thickness of 4–25 µm

(0.15–1.00 mil). The dielectric constant is 14–18, depending on amount of the

BaTiO3 loading. The capacitor is ±5% in uniformity and the Dissipation Factor is

0.005 (at 25°C and 1 kHz). It performs well up to 5 GHz with 2-3% decreases in

capacitance per frequency decade above 100 kHz. The operating temperature is -40

°C to 125°C and the lamination material used has an adhesion of more than 0.71 kg

per cm (4 pounds per inch).

In Table 2.3, one can see that the thin film method has satisfactory

capacitance values. The materials used are: TaxOy, BaTiOx [22], Nitrides,

Drum sideDielectric

Power

Ground

26

Dielectrics-Oxides, and Ceramics [12], and so forth. Polymer-ceramic

nanocomposite [27, 28, 29] is a new material, with a self-resonant frequency of

above 5 GHz at 50 pF on an area of 0.0645 cm2. In terms of LTCC [30], the types of

fabrication material are often ceramic paste doped with ferroelectric material such as

barium titanate and glass powders.

Fabrication methods

Materials used Supplier Characterizations Ref.

Nitrides, Dielectrics-Oxides, Ceramics

- 150-200 nm, 1000-3000 nF/cm2

[12]

Deposition

TaxOy, BaTiOx HiDEC 0.68 pf-22 nF [31]Al2O3,Ta2O5,SiO2, SixNy,PZT,FR-4

- 40 μm, 0.05 nF/cm2, K=9

[12]

Epoxy/Y5V Ceramic HADCO EmCap

0.325 nF/cm2 [32]

FR-4 HADCO BC2000

0.0775 nF/cm2 [32]

Epoxy/Barium Titanate

3M C-Ply

0.775-4.65nF/cm2 [33]

Polyimide DUPONT HiK

HiK1: 0.387-0.465 nF/cm2,

HiK4.65 nF/cm2

[34][35]

Silicon Dioxide

SHIPLEY Insite

1.55-155 nF/cm2 [32]

Lamination

PCL-FR-450 POLYCLADHADCO

0.4185 nF/cm2 [32]

EM CA K7, Dupont K7.8 tapes

- 70 pF/cm2

Ferro K 5.9 A6 tape - 55 pF/cm2

LTCC

K500-K700 - 19.37 nF/cm2

Accuracy 10-20%

[12][36][37][38][39]

Table 2.3 Characteristics and Suppliers of Embedded Capacitors Material

2.2.4 Inductors

Compared with resistors and capacitors, very little information is available

about embedded inductors. This is because embedded inductors are currently very

difficult to fabricate. However, in application like filtering, both capacitors and

inductors are the key passive components. Hence, research on embedded inductors is

27

significant. At present, inductors with values of less than 200 nH and a size of 2-4

mm in a hand-held product can make up 80% of the total passive components [16].

The difference between embedded capacitors and resistors lies in the dielectric

fabrication processes but in the case of an inductor, the material and fabrication

processes determine the quality of a component.

Using the LTCC method [31], spiral inductors can be made using a 203.2 μm

(8 mil) width line with a 101.6 μm (4 mil) line-spacing on a 15 μm (0.6 mil)

substrate to provide a maximum inductance of 90 nH. A typical 4.8 nH spiral

inductor gives a 40 Q factor at 1.32GHz. Designed by MAXWELL Q2D, inductors

with 3 turns have been made using aluminum as the conduction material and FR-4

as the dielectric material [16].

Inductors fabricated by the lamination method [40, 41] have a higher Q

factor, less area and a lower cost than the LTCC. For example, lamination can

provide an 11 nH inductor with a high Q factor of 103 at 2.2 GHz, and a resonance

frequency of 3.6 GHz. The substrate is an organic laminate such as the Dupont

Vialux or FR-406, and the conduction layer is Cu with a thickness of 9 µm.

The HiDEC of the University of Arkansas [22] has presented a spiral

inductor fabricated by using the thin film deposition method with flexible polyimide

as the dielectric material. Cu lines are used as the conductors, which have

thicknesses from 0.5 to 5 µm with 50 to 150 µm line-spacing. The inductance values

are from 1.8 to 137 nH. Also, many PCB fabrication shops were able to made

embedded inductance in mass volume production.

28

2.3 Research Focus

The trend to more complex, smaller and lighter systems increases the

pressure on PCB manufacturers to seek new methods of achieving better integration.

Board miniaturization and signal integrity at high frequency are so important in the

future electronic applications, both embedded resistors and capacitors will most

likely be found in the same board. However, the research on the integration of

embedded resistors and capacitor on a PCB is relatively little. Also, although a

considerable amount of experimental and theoretical effort has been spent on

studying embedded passive materials, relatively less work has been done on

incorporating two passive materials in the same PCB substrate.

In the review of embedded materials, it was found that most materials are

still undergoing research and development. One material that may be suitable for

integration is the Ohmega-Ply material. It has been in use for years and has proven

to have reliable material characteristics. The Ohmega-Ply is produced by Ni-P metal

alloy deposited on copper foil that is laminated to a dielectric material and

subtractively processed to produce planar resistors. After that, the planar resistor

core will integrated with capacitor core applying PCB lamination process.

For capacitive material, several embedded capacitive materials are either

under development or are not available in the commercial market. BC-2000 from

Sanmina and C-Ply from 3M were the only two mature distributed capacitor

materials compatible with PCB processing. As BC-2000 is constructed with glass

reinforced FR-4 material, it has the restriction of much lower capacitance value. C-

ply’s higher capacitance value is achieved by 3M’s use of powdered barium titanate

as an epoxy or polyimide filler as well as its extremely thin dielectric.

29

Subsequently, the C-Ply can be used as the embedded capacitor material for

integration with Ohmega-Ply that will be employed as the embedded resistor

material. Once the materials for constructing the embedded passives have been

confirmed, the next step is to determine the manufacturing operations to produce the

targeted embedded components in a board. One thing that should be remembered is

that the manufacturing techniques going to be proposed should be suitable for mass

production. Another challenge is how to make use of the existing facilities to

achieve all this; of course, some little adjustments/modifications would always be

expected but this should be kept to a minimum if it is possible.

30

Chapter 3 Methodology for Embedding Passives

Due to the trend of aggressive miniaturization, new designs are striving for a

reduction in the number of components. This trend is leading to a variety of

technologies for embedding passives into PCBs. By embedding passive components

into the PCB, SMD/PTH such as capacitors and resistors can be removed from the

outerlayer surfaces of a PCB; this gives a lot of advantages as mentioned in Chapter

2.

This project is to investigate the integration of both the embedded resistor

material and capacitor materials in a PCB. Based on the capacitive material selected,

another lamination technique called “sequential lamination” will be proposed to be

used in this project. Sequential lamination differs from “normal” lamination in that

the substrate is laminated multiple times, progressively. The key reason for this

procedure is to overcome the problem of handling the extremely thin dielectric layer

that is needed for the capacitors. Figure 3.1 illustrates the proposed integration

processes of embedding resistors and capacitors in a global sense. First is the design

and fabrication of resistor cores and capacitor cores. This is followed by the

laminations of capacitor and resistor cores.

31

Figure 3.1 Integration Processes of Embedded Resistors and Capacitors

3.1 The Sequential Lamination Technique

In this project the sequential lamination technique has been proposed to

integrate the embedded capacitor and resistive layers. This is a critical function that

binds multiple layers within a sandwich of heat curable resin. During operation, the

board is subject to heat and pressure with the use of a hydraulic vacuum presser,

which is assisted by the oil heated platens to melt the resin bonding sheets (prepreg).

The result of this process provides strong resin bonds between cores of like

materials. A typical multi-layer PCB stack-up for hydraulic lamination is shown in

Figure 3.2. In this project, the lamination will be performed several times from the

core preparation to the integration.

Sequentially laminate materials into one substrate

Create outer layer testing pattern

Design resistor & capacitor patterns

Fabricate resistors from resistive material (inner layer)

Fabricate first side of capacitor panel (inner layer)

Fabricate second side of capacitor panel

32

Figure 3.2 Typical Multi-layer PCB Stack-up for Hydraulic Lamination

Figure 3.3 The Six Layers PCB Lay up Structure

Copper foil (layer 1)

Copper foil (layer 6)

Prepreg

Prepreg

Prepreg

Embedded resistor core (layer 4 & 5)

Embedded capacitor core (layer 2 & 3)

HEATED PLATEN

CAUL PLATE

Separator sheet

Copper Foil

Copper FoilCores

Repeat Stacks

Separator sheet

HEATED PLATEN

Compliant Pad

Press Opening

PCB DETAIL

PCB DETAIL

PCB DETAIL

PCB DETAIL

CAUL PLATE

33

To integrate the embedded resistor and capacitor cores into a PCB, a 6 layer

panel is desirable. Figure 3.3 shows the structure of the PCB. Layers 1 and 6

contain normal circuitry; for this project, only pads for electrical testing are needed.

Layers 2 and 3 are the power ground with coupled capacitors, and layers 4 and 5

together make up the resistor patterns; 3 prepregs are inserted to give the necessary

bonding effect. Since the components embedded in the panel are going to be tested

on the outer layers, conductive through-holes should be added. More, the capacitor

core is a very thin (around 15-24 μm ), non-reinforced, ceramic filled (ceramic is a

non-prefired barium-titanate), epoxy material; a sequential lamination process will

be used. The sequential lamination is performed in two steps. The first step is to

bond the outerlayer copper foil (layer 1) with the capacitor core that combines layers

2 and 3 (prior to this step the capacitor patterns on the layer 2 should have been

etched). The second step bonds layers 1 to 3 with the resistor core (layers 4 and 5)

and the layer 6 which is the copper foil. Once the two lamination processes have

been finished, the circuit connections to embedded resistor and capacitor cores

should be connected by via holes. These holes are created by drilling operations and

are copper plated to provide electrical connections. Lastly, testing patterns are made

on the board surface to enable the measurement of the resistances and capacitances

of the embedded passives after a test board has been generated. Before capacitors

and resistors can be embedded into a multi-layer PCB, the cores need to be

fabricated. As the materials and processes are different when making resistors and

when making capacitors, the cores need to be fabricated separately. After the resistor

and capacitor cores have been prepared, they are integrated by lamination processes

to form a multilayer PCB.

34

3.2 Resistor Core Fabrication

One of main criteria in creating a resistor is to select the resistive material. In

this project, future mass production is a key concern and thus, volume availability is

an important point. Ohmega-Ply [49] is currently the only material available of

suitable volume which is reliable enough for producing embedded resistors. It is

produced by electroplating a thin film nickel phosphorus layer onto the copper foil

and is laminated onto a sheet of dielectric substrate. The thickness of the plated

nickel phosphorus layer determines the resistivity of an Ohmega-Ply sheet. Its

physical and electrical properties are both suitable for this project and therefore, it is

selected to be used.

Figure 3.4 illustrated the schematic of a resistor core fabrication sequence. At

the PCB level, a copper pattern is etched selectively with the assistant of the

photoresist agent to leave the layer of resistive material that covers the dielectric

substrate. Then, the exposed resistive material is removed in a copper sulfate

solution to create an area that envelops both the resistor and its connection pads.

This is then followed by another copper etching operation resulting in leaving two

pads; and the exposed rectangular resistive material determines the resistive value of

the resistor.

35

Figure 3.4 Schematic of Resistor Core Fabrication Sequence

Photoresist

Image 1 Define resistor width by applying photoresist Expose and develop

Etch 1 Remove Cu by using ammoniacal etching solution

Etch 2 Remove resistive layer by using copper sulfate solution

Strip photoresist

Image 2 Define resistor length by applying photoresist Expose and develop

Etch 3 Selective Cu removal by using ammoniacal etching solution

Strip photoresist

ED copper foil

Resistive layer Dielectric

36

3.3 Embedded Resistor Test Pattern Design

Once the production of the resistor core has been established, the resistor test

pattern should be designed in order to study the manufacturing capability. This is

essential for the determination of the success of this project. The design should also

allow for pairing between the resistor core and the capacitor core, and so be able to

represent the requirements of mass production. Figure 3.5 shows the test pattern for

the embedded resistors.

Figure 3.5 Embedded Resistors Test Pattern

Each test pattern consists of 4 resistors of different resistive values. The gray

color located in the center is the resistive material and the orange colored lines are

copper conductor traces. At the ends of the eight conductor traces, there are also

eight rectangular pads that will eventually be connected to the board surface for the

post lamination testing using the Conductor Analysis Testing (CAT) equipment.

To further verify the fabrication consistency, four test patterns are oriented in 90º

offset to form a module as shown in Figure 3.6.

Resistor

Conductor traces

Testing pads

37

Figure 3.6 Test Patterns in a Module

The 4 resistive values of all test patterns are designed to be the same (25, 50,

75 and 100 Ω) in a module to allow more processing data to be collected, but their

dimensions are all different. Therefore, there are 16 different dimensional resistors

with 4 resistive values in each test pattern. Figure 3.7 gives the dimensions of the 16

resistors in each module.

A B Width (mil) Length (mil) Width (mil) Length (mil) 0.25mm (10) 0.50mm (20) 0.50mm (20) 1.01mm (40) 0.25mm (10) 0.38mm (15) 0.50mm (20) 0.76mm (30) 0.25mm (10) 0.25mm (10) 0.50mm (20) 0.5mm (20) 0.25mm (10) 0.12mm (5) 0.50mm (20) 0.25mm (10)

C D

Width (mil) Length (mil) Width (mil) Length (mil) 0.76mm (30) 1.52mm (60) 1.01mm (40) 2.03mm (80) 0.76mm (30) 1.14mm (45) 1.01mm (40) 1.52mm (60) 0.76mm (30) 0.76mm (30) 1.01mm (40) 1.01mm (40) 0.76mm (30) 0.38mm (15) 1.01mm (40) 0.5mm (20)

Figure 3.7 Resistor Sizes in a Module

A

D C

B

38

By using a different dimensional resistor with the same targeted resistive

value, we can investigate the sizing effects versus the consistency of the actual

resistance readings. Since the thickness of the nickel phosphorus layer is constant

the planar dimension determines amount of resistance per square (Ω/square) [42].

Thus, the resistance value is equal to the sheet resistivity multiplied by the length

divided by the width, for a rectangular resistor. The formula for calculating the

resistance value of a resistor values are:

Equation 1

Where ρ is a constant of proportionality known as the resistivity and h is a constant

and represents the thickness of resistor film.

Equation 2

Where,

Rs = (p/h) = sheet resistivity (Ohm/square)

This value is mainly related to the plated deposition thickness.

L = length (parallel to energy flow)

W = width (perpendicular to energy flow)

Therefore, when the length of a resistor is equal to the width, then the

resistance of the resistor is the same as the sheet resistivity (R = Rs). In designing

embedded resistors, it is more convenient to fix the size of one square and vary the

resistance by changing the length in terms of the numbers of defined squares. Figure

3.8 shows a resistor with three squares (L=3*W) and therefore, the resistance value

39

of this resistor is three times the sheet resistivity. For example, if a sheet with

resistivity at 50 Ω/square is used then the resistor as in Figure 3.8 would have a

value of 150 Ω.

Figure 3.8 Resistor with Resistance Value at Three Times of the Sheet

Resistivity

Then, 40 modules are put onto a 30.48 cm by 45.72 cm laminate core panel.

Figure 3.9 shows a panel layout where each square represents a module. As a result,

there are 640 resistors (40 modules x 16 resistors/module) per panel and 160

resistance values are expected on each 25, 50, 75 and 100 Ω group.

Figure 3.9 Embedded Resistors Test Panel Layout

30.48cm

45.72cm

40

3.4 Capacitor Core Fabrication

As mentioned in the review chapter, some embedded capacitive materials are

either still being developed or are not commercially available. The BC-2000 from

Sanmina and C-Ply from 3M are the only two mature distributed capacitive

materials compatible with the PCB manufacturing process. BC-2000 is constructed

with glass reinforced FR-4 material; it has the restriction of having a much lower

capacitance value. In comparison, the higher capacitance value of the C-ply is

achieved by 3M using the powdered barium titanate plus resin as the epoxy. It is

extremely thin dielectric. Therefore, C-Ply has been selected for producing the

embedded capacitors. The side effect of the thin C-ply material is that the process

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