thermal effects in packaging high power light emitting diode arrays

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Thermal effects in packaging high power light emitting diode arrays Adam Christensen, Samuel Graham * Woodruff School of Mechanical Engineering, Georgia Institute of Technology, Atlanta, GA, USA article info Article history: Received 26 June 2007 Accepted 2 March 2008 Available online 17 March 2008 Keywords: High power light emitting diodes Thermal management Array Heat dissipation abstract The package and system level temperature distributions of a high power (>1 W) light emitting diode (LED) array have been investigated using numerical heat flow models. For this analysis, a thermal resistor network model was combined with a 3D finite element submodel of an LED structure to predict system and die level temperatures. The impact of LED array density, LED power density, and active versus passive cooling methods on device operation were calculated. In order to help understand the role of various thermal resistances in cooling such compact arrays, the thermal resistance network was analyzed in order to estimate the contributions from materials as well as active and passive cooling schemes. Finally, an analysis of a ceramic packaging architecture is performed in order to give insight into methods to reduce the packaging resistance for high power LEDs. Ó 2008 Published by Elsevier Ltd. 1. Introduction The thermal management of LEDs for general illumination applications is of primary importance to their reliability and effi- ciency. In considering the thermal management of high power LEDs, two main challenges must be considered. First, while a single device consumes relatively low power, large heat fluxes exist at the die level, being on the order of 300 W/cm 2 or greater. Such high heat fluxes often require excellent heat spreaders at the die level in order to help dissipate such concentrated heat loads. Second, since the luminous output of an individual high power LED is insuf- ficient to replace a traditional light source, multiple LEDs are nec- essary for general illumination. With the use of large LED arrays, it is possible to generate large heat loads at the system level which can cause challenges for overall heat dissipation, especially when cooling requirements call for passive methods. These two chal- lenges work together to cause elevated LED die temperatures, which have been linked to lower quantum efficiencies, shorter life- times, emission wavelength shifts and catastrophic device failure [1–4]. It has been predicted previously that the lifetime of a device decays exponentially as the temperature increases. This can result in a lifetime decrease from 42,000 h to 18,000 h when the device temperature increases from 40 °C to 50 °C [1]. In general, approximately 90% or more of the thermal energy is directly dissipated from the LED die through conduction as opposed to radiation as seen in incandescent sources [5]. Thus, materials which are used in the packaging of LEDs play a major role in the resistance to thermal dissipation. At the system level, convection to the surrounding environment is the primary method for thermal dissipation and can occur through either natural or ac- tive means. Due to the potential for LEDs to serve as robust energy efficient light sources, it is quite desirable to use thermal manage- ment solutions which require little or no added power for cooling. Due to such constraints, options such as heat sinks cooled by nat- ural convection are often preferred for use in buildings where en- ergy savings are the primary driver. However, the growing heat loads of high powered compact light sources have made such cool- ing solutions difficult to implement. Currently, the highest lumi- nous flux from a single device is 170 lm/lamp which falls short of the typical light output seen from traditional general illumina- tion light sources [6]. In order to compete with traditional light sources such as incandescent and fluorescent bulbs that typically offer more that 3000 lm/lamp in luminous flux, an array of more than 20 power LEDs is required and needs to dissipate a total of 20–125 W. Thus, it is important to have an understanding of the thermal solutions, which can be employed with compact high power lighting sources for general illumination, and when active cooling schemes are necessary for reliable operation of such light sources [7–14]. In this work we present an analysis of the system and die level temperature distributions in a compact light source consisting of 25 high power LEDs mounted on an aluminum core heat spreader. This compact array was used to represent a light engine producing between 3000 and 4000 lm. The system level temperatures were solved using a finite element analysis in a 3D environment as well as with a thermal resistor network model [15]. In addition, a package level submodel was developed to compute the local die level tem- peratures using a 3D finite element code. The impact of convection cooling methods (passive or active) as well as LED spacing on max- imum operational power (limited by LED junction temperature) was 1359-4311/$ - see front matter Ó 2008 Published by Elsevier Ltd. doi:10.1016/j.applthermaleng.2008.03.019 * Corresponding author. Tel.: +1 404 894 2264; fax: +1 404 894 8496. E-mail addresses: [email protected] (A. Christensen), sgraham@ me.gatech.edu (S. Graham). Applied Thermal Engineering 29 (2009) 364–371 Contents lists available at ScienceDirect Applied Thermal Engineering journal homepage: www.elsevier.com/locate/apthermeng

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Page 1: Thermal effects in packaging high power light emitting diode arrays

Applied Thermal Engineering 29 (2009) 364–371

Contents lists available at ScienceDirect

Applied Thermal Engineering

journal homepage: www.elsevier .com/locate /apthermeng

Thermal effects in packaging high power light emitting diode arrays

Adam Christensen, Samuel Graham *

Woodruff School of Mechanical Engineering, Georgia Institute of Technology, Atlanta, GA, USA

a r t i c l e i n f o

Article history:Received 26 June 2007Accepted 2 March 2008Available online 17 March 2008

Keywords:High power light emitting diodesThermal managementArrayHeat dissipation

1359-4311/$ - see front matter � 2008 Published bydoi:10.1016/j.applthermaleng.2008.03.019

* Corresponding author. Tel.: +1 404 894 2264; faxE-mail addresses: [email protected]

me.gatech.edu (S. Graham).

a b s t r a c t

The package and system level temperature distributions of a high power (>1 W) light emitting diode(LED) array have been investigated using numerical heat flow models. For this analysis, a thermal resistornetwork model was combined with a 3D finite element submodel of an LED structure to predict systemand die level temperatures. The impact of LED array density, LED power density, and active versus passivecooling methods on device operation were calculated. In order to help understand the role of variousthermal resistances in cooling such compact arrays, the thermal resistance network was analyzed inorder to estimate the contributions from materials as well as active and passive cooling schemes. Finally,an analysis of a ceramic packaging architecture is performed in order to give insight into methods toreduce the packaging resistance for high power LEDs.

� 2008 Published by Elsevier Ltd.

1. Introduction

The thermal management of LEDs for general illuminationapplications is of primary importance to their reliability and effi-ciency. In considering the thermal management of high powerLEDs, two main challenges must be considered. First, while a singledevice consumes relatively low power, large heat fluxes exist at thedie level, being on the order of 300 W/cm2 or greater. Such highheat fluxes often require excellent heat spreaders at the die levelin order to help dissipate such concentrated heat loads. Second,since the luminous output of an individual high power LED is insuf-ficient to replace a traditional light source, multiple LEDs are nec-essary for general illumination. With the use of large LED arrays, itis possible to generate large heat loads at the system level whichcan cause challenges for overall heat dissipation, especially whencooling requirements call for passive methods. These two chal-lenges work together to cause elevated LED die temperatures,which have been linked to lower quantum efficiencies, shorter life-times, emission wavelength shifts and catastrophic device failure[1–4]. It has been predicted previously that the lifetime of a devicedecays exponentially as the temperature increases. This can resultin a lifetime decrease from 42,000 h to 18,000 h when the devicetemperature increases from 40 �C to 50 �C [1].

In general, approximately 90% or more of the thermal energy isdirectly dissipated from the LED die through conduction asopposed to radiation as seen in incandescent sources [5]. Thus,materials which are used in the packaging of LEDs play a major rolein the resistance to thermal dissipation. At the system level,

Elsevier Ltd.

: +1 404 894 8496.(A. Christensen), sgraham@

convection to the surrounding environment is the primary methodfor thermal dissipation and can occur through either natural or ac-tive means. Due to the potential for LEDs to serve as robust energyefficient light sources, it is quite desirable to use thermal manage-ment solutions which require little or no added power for cooling.Due to such constraints, options such as heat sinks cooled by nat-ural convection are often preferred for use in buildings where en-ergy savings are the primary driver. However, the growing heatloads of high powered compact light sources have made such cool-ing solutions difficult to implement. Currently, the highest lumi-nous flux from a single device is �170 lm/lamp which falls shortof the typical light output seen from traditional general illumina-tion light sources [6]. In order to compete with traditional lightsources such as incandescent and fluorescent bulbs that typicallyoffer more that 3000 lm/lamp in luminous flux, an array of morethan 20 power LEDs is required and needs to dissipate a total of20–125 W. Thus, it is important to have an understanding of thethermal solutions, which can be employed with compact highpower lighting sources for general illumination, and when activecooling schemes are necessary for reliable operation of such lightsources [7–14].

In this work we present an analysis of the system and die leveltemperature distributions in a compact light source consisting of25 high power LEDs mounted on an aluminum core heat spreader.This compact array was used to represent a light engine producingbetween 3000 and 4000 lm. The system level temperatures weresolved using a finite element analysis in a 3D environment as wellas with a thermal resistor network model [15]. In addition, a packagelevel submodel was developed to compute the local die level tem-peratures using a 3D finite element code. The impact of convectioncooling methods (passive or active) as well as LED spacing on max-imum operational power (limited by LED junction temperature) was

Page 2: Thermal effects in packaging high power light emitting diode arrays

Fig. 2. A rendering of the heatsink under investigation. It was possible to onlymodel 1/4 of the total geometry due to symmetry in the layout.

A. Christensen, S. Graham / Applied Thermal Engineering 29 (2009) 364–371 365

analyzed for a fixed LED package geometry. A parametric study onthe impact of packaging architecture and packaging materials onLED performance was also performed. Finally, a closer analysis ofthe developed 1D thermal network model was performed to esti-mate the magnitude of various thermal resistances in the LED arrayto determine which are the most critical for thermal management.These methods and their results are discussed in detail in the follow-ing sections.

2. Thermal modeling approach

A light source consisting of 25 high power LEDs arranged insquare array on an aluminum board dissipating 25–125 W waschosen as our model system. Cooling of this array of LEDs was sim-ulated by varying the convection heat transfer coefficient thatwould be representative of natural convection, forced air convec-tion and other active cooling methods. In this study a compact,finned, aluminum heat spreader geometry was investigated forits heat dissipation potential. In each analysis that was performed,a square array (5 � 5) of high power LEDs was mounted to the sur-face. The overall dimensions of the aluminum board (kAL =202.4 W/m K) were 10 cm � 10 cm. To increase heat dissipationfrom these aluminum boards, 1 cm tall fins were added to the rearside to decrease convection resistance. LEDs were attached to thecenter of one side of the aluminum board with a separation dis-tance of 1 mm, 3 mm, and 5 mm as defined in Fig. 1.

As a result of the multiple scales involved in this problem, sep-arate package models have been developed in order to calculatethe temperature gradients inside of a standard package (diebonded to a metal slug) and a high power compatible package(ceramic submount). The overall goals of the analysis are to char-acterize the potential for heat dissipation in different convectionregimes.

2.1. System level modeling

2.1.1. Natural convection coolingA system level model approach was used in order to determine

the effectiveness of dissipating the generated heat in natural con-vection and forced convection conditions. A finned aluminumboard with mounted LEDs exposed to natural convection was ana-lyzed using a 3D finite element method as shown in Fig. 2; resultswere also verified with a thermal resistor network model. The nat-ural convection boundary conditions were applied by using stan-dard correlations to calculate a convection coefficient for theupper and lower heated surfaces [16]. With these models it wasthen possible to calculate a range of allowable driving powersper lamp so as to induce a junction temperature less than130 �C; for all models an ambient temperature of 26.8 �C was as-sumed. This maximum temperature was selected based on themaximum operational temperature of currently available LEDs. Itis understood that this maximum die temperature may be de-creased in order to increase LED lifetime. The junction temperaturewas solved for by including a simple thermal resistance model into

Fig. 1. Definition of the separation distance. In this analysis, w = 1 mm, h = 1 cm,and d = 1.5 mm. The overall outer dimensions of the heatsink are 10 cm � 10 cm.

the FEA model. The thermal resistance included effects of a thermalinterface material at the board-package junction and an overalljunction-to-board resistance of 9 K/W was used and is based on acommercially available device [6].

2.1.2. Forced convection coolingThe next step in the modeling hierarchy represented the alumi-

num heat spreader under forced convection conditions. The alumi-num board acted as a carrier and heat spreader for the 25 highpower LEDs. The average heat transfer coefficient was varied from10 W/m2K to 100 W/m2K, which can be realized by forced air freestream velocities in the range from 1.5 m/s to 20 m/s. These con-vection conditions were, again, applied to a finite element modelfor the three different separations (1 mm, 3 mm, and 5 mm) as wellas three different power dissipations per lamp (1 W, 3 W, and 5 W).The bulk fluid motion around the fins causes the thermal resistanceto decrease to levels where higher power (3 W and 5 W) devicescan be operated while maintaining acceptable free stream veloci-ties. The decrease in backside convection resistance also made itpossible to decrease the separation of the devices thus allowinghigh light output boards to be made more compactly.

2.2. Package level modeling

It was mentioned previously that as a result of the multiplescales of interest in this analysis, it can be difficult to model the fullsystem as well as chip level details in its entirety with a single finiteelement program. Therefore information from the system levelanalysis was used as a boundary condition for a refined model ofthe packaged die. The bridge between the two levels was imple-mented through the average temperature at the contact area ofthe aluminum board where the LEDs were mounted as seen inFig. 3. All surfaces of the LED package exposed to convective airflowwere considered adiabatic. Calculations which relaxed this adia-batic assumption showed that less than 2% of the total heat dissi-pated was lost through the epoxy lens and exposed package areasdue to convection, due to the low thermal resistance pathway off

Fig. 3. A cartoon outlining the package modeling methodology used to calculatetemperature distribution in the package. Adiabatic boundaries were chosen due tothe very low thermal conductivity of encapsulant materials used to protect the die.

Page 3: Thermal effects in packaging high power light emitting diode arrays

Table 1Advanced packaging material properties given in [25] and [26]

Material Thermal conductivity (W/m K)

Copper/Molybdenum/Copper 182Epoxy resin 1.7Al matrix w/continuous carbon fibers 218Epoxy resin w/graphite fibers 370Copper matrix w/diamond particles 600AlN 350b-Si3N4 155b-BN 760BP 350

366 A. Christensen, S. Graham / Applied Thermal Engineering 29 (2009) 364–371

the backside of the package. Therefore the heat dissipation path hasbeen assumed to be only through the bottom of the package and outto ambient conditions through the heat sink; radiative effects havebeen ignored in this analysis.

The temperature distribution in two different package designswas studied in order to obtain information about their thermalresistances. Package A consisted of an enclosure with a lens con-taining a phosphor converter, the die attachment point, electricalconnections to the LED chip, as well as housing materials. In thiscase the die is directly bonded to a metal slug that is embeddedinto the housing material. It may be necessary in this package de-sign to provide electrical isolation prior to bonding of the die to themetal. Package B was constructed from a high thermal conductivityceramic material that the LED die could be directly bonded to dueto its dielectric properties (ceramic submount), therefore reducingthe thermal resistance of the system. An exploded view of thegeometries chosen for this study is shown in Fig. 4.

A finite element model was created for the above geometries inorder to capture the subtle effects of heat spreading in a three-dimensional structure. It was assumed that there was no heat flowthrough the wire bonds and that the material properties wereindependent of temperature. Using this model it was possible tosolve the familiar 3D energy equation (1) for the temperature dis-tribution and heat fluxes.

r � ðkðr*ÞrTðr

*ÞÞ ¼ 0: ð1Þ

By imposing the backside temperature and the heat flux at thedie attach location the average die temperature can be calculated.The thermal resistance can then be found by R = DT/Q. The packagethermal resistance has been calculated when various ultra highthermal conductivity composites have been incorporated into thefirst package design. Examples of typical thermal conductivities re-ported for advanced composites and ceramic materials are shownin Table 1.

2.3. Thermal resistance network model

While it is possible to perform a number of finite element mod-els in a relatively short period of time, it becomes difficult to pre-dict more general trends due to the computational time needed toperform a parametric analysis. With information about the thermalresistance of both package designs it was possible to build a simplethermal resistance model that describes the junction-to-ambientthermal resistance. The overall package thermal resistance in-cludes several system parameters that contribute in different ways.In development of the thermal design the relative contribution ofeach thermal resistor to the network was investigated. By studyingindividual resistors it is possible to suggest improvements that cangreatly enhance the overall ability of the package to dissipate heat.The representative resistance network that was developed for thejunction-to-board is shown in Fig. 5 and shows contributions fromthe die, die bonding material, package, thermal interface material,

Fig. 4. (A) Exploded view of the standard LED package. The LED chip is bonded tothe metal slug with a 50 lm thick layer of solder in order to provide an efficient heatremoval path. (B) Depiction of a directly bonded ceramic submount package, con-structed from high thermal conductivity ceramics.

dielectric epoxy layer, and spreading resistance. The full LED arrayresistor network is shown in Fig. 6. In this array the RLED resistorrepresents all the contributing effects found in Fig. 5. The heatsinkthermal resistance has been calculated assuming that a nearly con-stant temperature condition exists at the base of the fins. This con-dition is obtained easily if the material thermal conductivity is verylarge or the LEDs are nearly uniform in spacing.

Included in the analysis of the RLED term from Fig. 6 was a thinepoxy coating that is used to define the electrical connections onthe board. This thin layer was assumed to be one dimensionaldue to the low thermal conductivity of the material. Any additionalheat spreading due to the electrical traces patterned onto theepoxy has been neglected in this analysis. In order to model thespreading resistance the 3D heat equation can be solved and anexpression for the thermal resistance can be derived for a varietyof boundary conditions, the details of which are located in [17].The boundary conditions were chosen to be adiabatic on all sur-faces of the cube except for the heat flux input from the LED andthen a convective boundary on the backside of the spreader. Theseconditions model a LED in the middle of an array of similar devices.Convection off the top-side of the heatsink was also included in theRheatsink term.

2.4. Light output model

In contrast to traditional systems that rely on fluorescent orincandescent light sources, where the light output is nearly tem-perature independent, LEDs suffer from decreased light output asthe junction temperature increases. As a result it is critical to con-sider both thermal aspects of the lighting system design and theconsequences that it has on the total light output. In order to mod-el the total lumen output from the arrays the characteristics from acommercially available cool white emitter were assumed [6]. Keyperformance parameters included the behavior of the relative lightoutput as a function of junction temperature ðc�lmÞ and the coeffi-cient of luminous flux as a function of forward current (kf). Bothof these parameters have been normalized to a junction tempera-ture of 25 �C and 350 mA forward current. By combining these twoparameters the lumen degradation coefficient (clm) can be calcu-lated by the following relationship:

clm ¼ kf c�lm; ð2Þ

where clm has units of %/�C. By assuming in these calculations thatthe LED emits 60 lm at a junction temperature of 25 �C and a for-ward current of 350 mA, the lumen degradation coefficient can berecast with units of lm/�C. It was found that the 1 W, 3 W, and5 W LEDs have lumen degradation coefficients of �0.108 lm/�C,�0.228 lm/�C, and �0.318 lm/�C, respectively. Other manufacturershave similar lumen degradation coefficients but due to differencesin the luminous efficacy other LED lamps may have larger absoluteluminous fluxes. Using the appropriate temperatures solved forwith the finite element model the effect on the light output of cool-ing situations can be estimated as shown in the following section.

Page 4: Thermal effects in packaging high power light emitting diode arrays

Fig. 5. Resistor network model of the LED packaging system. All resistors have degrees of freedom in their design however the epoxy dielectric layer was fixed to be 1.42 K/W,which represents a 100 lm thick layer of epoxy (k = 1.4 W/m K). The die bond thermal resistance was fixed to be 1.67 K/W (50 lm thick and a k = 30 W/m K) and the chipsubstrate is assumed to be a thinned sapphire wafer with a room temperature k = 35 W/m K and a thickness of 100 lm. The thermal interface material was assumed to be amaterial with a resistance of 2.2 � 10�6 m2 K/W.

Fig. 6. The thermal resistor network for the entire array of LEDs placed on the heatsink. The heatsink thermal resistance was calculated with the assumption that anearly uniform temperature exists at the base of the fins. This condition is easilyrealized as long as the LEDs are nearly uniform in spacing across the upper surfaceof the heatsink.

A. Christensen, S. Graham / Applied Thermal Engineering 29 (2009) 364–371 367

3. Modeling results

3.1. System level results

3.1.1. Finned heat sink with natural convectionAs stated previously, the use of natural convection is desired

since it requires no additional input power to cool the system.Based on the 10 cm � 10 cm array with 1 cm separation it is possi-ble to operate the array at 1 W while maintaining reasonable junc-tion temperatures. This limitation is a direct result of the individualLED temperature fields overlapping as well as the large thermalresistance of the heat sink. See Fig. 7.

3.1.2. Finned heat sink with forced convectionThe use of forced convection conditions allowed for a decrease

in the heat sink thermal resistance and allows devices to operate at>1 W and >3000 lm, which makes them competitive against cur-

Fig. 7. Junction temperature as a function of input power for the 25 LED arrayoutlined in Fig. 2. Due to the large convective resistance from the natural convec-tion it is only possible to power the array at 1 W/LED.

rent lighting systems. The model shown previously used the aver-age convection coefficients that were calculated from flat platenatural convection boundary conditions in order to investigatethe effect of a compact fin design. The results of the forced convec-tion calculations are shown in Figs. 8–10. Throughout all of theseresults the junction temperature was calculated taking into ac-count a thermal interface material with a thermal resistance of0.038 K/W and a package resistance of 9 K/W.

It can be seen from these previous graphs that it is possible tooperate the 25 LED array at powers up to 5 W and luminous fluxesover 3500 lm, however in order to dissipate the heat that is gener-ated the convection coefficient must be >50 W/m2 K for tightlypacked devices (1 mm separation distance). In all the geometriesthe light output is a stronger function of emitter forward currentthan convection coefficient when h > 30 W/m2 K. It is stressed thatwhen buoyancy cooling schemes are proposed the light outputmay vary by large amounts due to natural fluctuations in the envi-ronment surrounding the system.

The heat sink that was created for these simulations was de-signed for compact light sources. However, lower thermal resis-tances can be realized at the sacrifice of form factor. With theadded area from the heat sink it would be possible to further de-crease the necessary free stream velocity. This situation would beattractive since there is a limit as to how high the convection coef-ficient can be increased due to the unrealistic fluid velocities thatwould be encountered. As an alternative to high velocity forcedair convection other technologies like single or two phase liquidcooling or flat heat pipes can be implemented [18–21]. It has beenshown that flat heat pipes (FHP) offer minimal spreading resis-tances as a result of high effective thermal conductivities [20,22].By minimizing the spreading resistance of the heat sink it is possi-ble to utilize the entire convective surface area more efficiently;temperature non-uniformities arise when a finned heat structureis used (see Figs. 10 and 11).

Of course the use of a FHP is in itself not the total solution; theheat pipe must be paired with an effective heat sink design. How-ever, there is an opportunity to build the heat pipe directly into theheat sink by substituting the FHP for more the more traditional so-lid aluminum heat spreader and attaching fins to the condenserside [23]. Other system permutations could include optimizing aflat heat pipe stack with different working fluids in order to in-crease the heat transfer to ambient [24]. This system would allowfor extraneous thermal resistances in the array to be minimized inorder to handle heat fluxes at the system level >10 W/cm2 [19]. Inorder to determine when these other technologies are necessaryinvestments the same system described earlier is used in orderto quantify the effect of a general backside thermal resistance onthe junction temperature of the LED. In this analysis the previousresults were converted from a convection coefficient applied to aheatsink design to an overall heatsink thermal resistance. SeeFig. 12.

3.2. Package modeling results

In the cases that have been presented thus far it is apparent thatthe convective resistance must decrease in order to operate highpower devices reliably. As the convective conditions increase in

Page 5: Thermal effects in packaging high power light emitting diode arrays

Fig. 8. Junction temperature of high power LEDs as a function of convective thermal resistance for an array of 25 LEDs separated by 1 cm. The horizontal line represents theproposed operational temperature. The full FEA model and the thermal resistance network model agree well with all power levels. Also shown is the predicted light output forthe entire array as a function of the convection coefficient.

Fig. 9. Junction temperature of high power LEDs as a function of convective thermal resistance for an array of 25 LEDs separated by 5 mm. The horizontal line represents theproposed operational temperature. The small deviations from the FEA model and the thermal resistance network model are a result of a non-uniform temperaturedistribution at the base of the fins. Also shown is the predicted light output for the entire array as a function of the convection coefficient.

Fig. 10. Junction temperature of high power LEDs as a function of convective thermal resistance for an array of 25 LEDs separated by 1 mm. The horizontal line represents theproposed operational temperature. The deviations from the FEA model and the thermal resistance network model are a result of a non-uniform temperature distribution atthe base of the fins. Also shown is the predicted light output for the entire array as a function of the convection coefficient.

368 A. Christensen, S. Graham / Applied Thermal Engineering 29 (2009) 364–371

Page 6: Thermal effects in packaging high power light emitting diode arrays

Fig. 11. The non-uniform temperature distribution in the fins highlights areas ofthe heat sink that could be utilized for additional heat dissipation. This particulartemperature distribution in only the heat sink is for the 1 mm separation distancearray operating at 5 W/LED and a convection coefficient of 50 W/m2 K.

Fig. 12. Junction temperature as a function of a generalized heat sink thermal re-sistance. The yellow shaded region is representative of a thermal resistance obta-inable with traditional heat sinks and forced air convection. The blue shaded regionis representative of a thermal resistance obtainable with flat heat pipes or very highconvective heat transfer coefficients found in two phase cooling. In this analysis aRpackage = 9 K/W and RTIM = 0.038 K/W was used. (For interpretation of the refer-ences in color in this figure legend, the reader is referred to the web version of thisarticle.)

Fig. 13. Package heat spreader thermal resistance as a function of slug materialthermal conductivity or type of ceramic used. The circle data represents package (A)as depicted in Fig. 4, the square data represents package (B).

Fig. 14. A representative temperature distribution taken as a slice through themiddle of the standard LED package design (package (A), Fig. 4). In this case, the dieis operating at 3 W under a convection coefficient of 75 W/m2 K on the 1 cm sep-aration distance heat sink array. All surfaces of the model were considered adiabaticexcept for the constant temperature bottom surface at the attachment point.

Fig. 15. A sample temperature distribution in the chip on board ceramic basedpackage (package (B), Fig. 4). The die has a diameter of 8 mm and a thickness of0.5 mm and is operating at 3 W under a convection coefficient of 75 W/m2 K on the1 cm separation distance heat sink array. Again, all surfaces of the model wereconsidered adiabatic except for the constant temperature bottom surface at theattachment point.

A. Christensen, S. Graham / Applied Thermal Engineering 29 (2009) 364–371 369

efficiency the overall contribution of the package resistance to thesystem resistance increases. In order to continue to improve theperformance of the LED the chip carrier thermal design must becarefully investigated. To ensure acceptable operating tempera-tures under power loads of >5 W/LED, which can arise when morethan one die is mounted in a chip carrier, several high thermal con-ductivity materials were (Table 1) made into low thermal resis-tance chip carriers.

Fig. 13 shows the relationship between the thermal resistanceof the package design and the thermal conductivity of the materialused. As expected it is possible to decrease the thermal resistanceby incorporating high thermal conductivity materials. It can beseen that there is a further decrease in the thermal resistance whena shift to Package B is made. This decrease is due to the dielectricnature of ceramics; it would be possible to eliminate any electricalisolation layers present that would add a thermal resistor to thesystem. These isolation layers are usually epoxy based materialsand therefore have a low thermal conductivity and even thoughthey are thin its contribution to the overall thermal resistancecan be significant. A sample temperature distribution is shown in

Fig. 14 for a package that has incorporated high thermal conductiv-ity composites so that kslug = 500 W/m K. See Fig. 15.

4. Parametric analysis results

With information that was collected from the previous sectionsit was possible to investigate the effects of packing density of

Page 7: Thermal effects in packaging high power light emitting diode arrays

Fig. 16. Spreading resistance of a flat plate (2 mm thick) heat spreader as a functionof convection condition and material.

Fig. 17. Maximum power dissipated for a junction temperature of 130 �C for var-ious packing densities of high power LED components on a square flat plate heatsink under different convection conditions. The blue region is considered to beobtainable with current technologies, while the yellow region presents new chall-enges for efficient heat removal. (For interpretation of the references in color in thisfigure legend, the reader is referred to the web version of this article.)

Table 2Thermal resistor breakdown for a high power LED packaging situation

Low velocity forced air (h = 10 W/m2 K) Low velocity forced air (h = 10 W/m2 K)

Resistor Magnitude (K/W) Resistor Magnitude (K/W)

R (die) 2.85 R (die) 2.85R (die-bond) 1.66 R (die-bond) 1.66R (package) 0.917 R (package) 0.817R (TIM) 0.038 R (TIM) 0.038R (epoxy) 1.42 R (epoxy) N/AR (spread) 0.275 R (spread) 0.275R (heatsink design) 1.11 R (heatsink design) 1.106

Power dissipated 3.19 W/LED Power dissipated 3.33 W/LED

The left table corresponds to package design (A) and the right table corresponds topackage design (B).

370 A. Christensen, S. Graham / Applied Thermal Engineering 29 (2009) 364–371

devices on a finned heatsink. In addition, it is also possible to an-swer questions related to material choices and placement withinthe system. The thermal resistance network that was outlined pre-viously was used in order to perform a parametric analysis. Whilealuminum was assumed to be used for the heat spreader in theother models it is possible that metal matrix composites could beused to aid in heat spreading. The graph in Fig. 16 shows onlythe spreading thermal resistance. It can be seen from here thatthe spreading resistance is only a weak function of the convectioncoefficient on the backside. However, it also shows that once thethermal conductivity of the spreader is >300 W/m K there is notmuch change in the thermal resistance. As a result of this a mate-rial such as aluminum or copper with a moderate thermal conduc-tivity can be used in place of much more expensive metal matrixcomposites.

As an aid to designing an array of LEDs the dimension of theheat sink has been converted to a packing density of LEDs per10 cm � 10 cm area and the maximum power dissipated by theLED has been calculated. For this particular run the convection

coefficient was varied from 5 W/m2 K to 500 W/m2 K. The heatspreader was assumed to be constructed of aluminum, and a TIMmaterial, whose properties were outlined previously, were usedfor consistency. Knowing that the LED’s operational junction tem-perature was 130 �C the maximum power dissipated by the devicecan be calculated from the results of the resistor network. Thepacking density of LEDs and the maximum power dissipated hasbeen plotted in Fig. 17 for a number of cases.

It can be seen from this graph that for very high power devices(>5 W/LED) it is necessary to reduce the convection coefficientresistance by utilizing high velocity forced air convection or otherhigh heat flux removal technologies. To further understand therelationship between all of the resistors two representative caseswere investigated. For the following runs the Rpackage term was cal-culated using the Package A design that incorporated a slug mate-rial with kslug = 500 W/m K, for comparison a system that includedPackage B was analyzed. The detailed breakdown of the value ofthe resistors for convection coefficients of 10 W/m2 K is shown inTable 2 for both package designs. Results were compared with a fi-nite element simulation and found to agree, suggesting that thethermal resistance network that was created captures all promi-nent heat flow patterns.

By incorporating the second package design into the thermalresistance model and running the analysis with the same parame-ters as outlined previously it was possible to see how the direct dieattach method enhanced the performance. As a result of the dielec-tric nature of the ceramic package it was possible to eliminate theresistance due to the epoxy isolation layer. An increase in thepower dissipation per LED is realized at even at low convectioncoefficients due to the relative contribution of the package to thetotal thermal resistance of the system.

5. Conclusions

Compact high power LED arrays require considerable attentionin order to produce high luminous output while limiting junctiontemperature rise. The analysis shown suggests that active coolingof high power LED arrays will most likely be necessary to operatewithin a maximum temperature limit of 130 �C. For increased life-times, this junction temperature will be reduced, requiring addi-tional demands on the thermal management solution. Newpackaging architectures like chip on board configurations provideadditional improvement to package resistance. With low convec-tive heat transfer coefficients, the main thermal resistance in thesystem arises from the convection off the backside of the heat sink.However, under forced convection or liquid cooling, the resistancesfrom the package, thermal interface materials and the electricaltrace layer (constructed of an epoxy dielectric) contribute stronglyto the overall thermal resistance. Therefore in order to increase theluminous flux for compact high power LED arrays, attention must

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A. Christensen, S. Graham / Applied Thermal Engineering 29 (2009) 364–371 371

be focused on providing the highest convective heat transfer coef-ficients possible (within reasonable energy constraints) whileimproving the packaging design. Thus, the consideration of solu-tions such as flat heat pipes, forced air convection, and liquid cool-ing will be of primary importance to the development of highpower compact LED arrays.

Acknowledgements

The authors would like thank Thomas Beecham and Abe Green-stein for valuable discussions concerning this work.

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