the x-board: memory-mapped i/o and devices

Introduction to Embedded Systems

The X-Board:The X-Board: Memory-Mapped I/O and Devices Memory-Mapped I/O and Devices

Lecture 7


Summary of Previous LectureSummary of Previous Lecture• The many levels of computer systems

• The CPU-Memory Interface

• The Memory Subsystem and Technologies– SRAM

– DRAM

• CPU-Bus-I/O– I/O Register Basics

• Bus Protocols– Synchronous bus protocol

– Asynchronous bus protocol

– Bus arbitration


Quote of the DayQuote of the Day

Ability is what you are capable of doing.

Motivation determines what you do.

Attitude determines how well you do it.– Lou Holtz


Outline of This LectureOutline of This Lecture• The 18-349 lab X-Board hardware

– 80200 XScale Processor

– Xilinx FPGA

– Seven-segment display

– Accessing flash memory

• Memory-Mapped I/O

– Accessing the devices from C programs


The X-BoardThe X-Board

Resetbutton


A Look at the Sound CardA Look at the Sound Card


What’s Life Without Accessories?What’s Life Without Accessories?


The X-Board + AccessoriesThe X-Board + Accessories


The 80200 Big Endian Evaluation Platform (BRH)The 80200 Big Endian Evaluation Platform (BRH)

Hardware Specification Value/Limit

Processor XScale-based Intel 80200, 733 MHz

SDRAM Memory 128Mbyte, 100MHz

Flash Memory 4Mbyte, 100-150ns

Ethernet – 2 Ports 10/100 BaseT

Serial – 2 Ports RS232, 115.2K

PCI Single-slot, 64 bit, 33 MHz, 264 MBps

Debug Support PROM-ICE Connector80200 JTAG Connector


Ethernet Ports(10/100BT)

Intel 80200Processor

PC

I B

ackp

lan

e

Serial Ports

Power Supply

Flash Memory

SevenSegmentDisplay

“Mom”: The Mothership

ResetButton

EndiannessJumper

Boot Image Selector


[ASIDE] [ASIDE] Review of PCIReview of PCI (Peripheral Component Interconnect) (Peripheral Component Interconnect)

• Shared bus = same path from multiple devices to CPU/mem– Direct access to system mem– Bridge to CPU’s system bus– Single system IRQ for all

devices – bus bridge

• Up to 133 MHz, 64-bit, 1GBps (X-Board differs)

• Potential replacements– Point-to-point channels– Infiniband (4 GBps)– HyperTransport (6.4 GBps)


[ASIDE] Review of Ports[ASIDE] Review of Ports

• Serial ports– Universal Asynchronous Receiver/Transmitter (UART): controller

– Takes the computer bus’ parallel data and serializes it

– Transfer rate of 115 Kbps

– Example usage: Modems

• Parallel ports– Sends the 8 bits in parallel

– 50-100 KBps (standard), upto 2 MBps (enhanced)

– Example usage: Printers, Zip drives

• Universal Serial Bus (USB) ports– Single way to connect upto 127 devices

– Hot-swappable, “Plug-and-Pray”

– Max bandwidth of 12 Mbps

– Example usage: Digital cameras


The Serial PortsThe Serial Ports


More on Serial PortsMore on Serial Ports

• Two asynchronous serial ports

• Dual UART connected to the peripheral bus

• RS232 pin information– Data lines: TX and RX

– Handshake lines: CTS and RTS

• Part of Lab 2– Write a pseudo-serial driver for Serial Port 2

– APIs provided in the library serial_lib.a– To initialize/finalize the serial device

– To write characters to the UART (printing to the terminal display)

– To capture input from the keypad (detecting keypad numeric input)

• Caution– Keypad will not work on the COM port of your computer

– Serial Port 1 is reserved for use by the Angel debug monitor


Seven-Segment LEDSeven-Segment LED

• Seven-segment display on X-Board

• Controlled by the Board firmware

• Decimal point segment is special– Not controlled by firmware

– “Power-On” indicator

– Connected to 3.3V rail


More on the Seven-Segment LEDMore on the Seven-Segment LED

• LED is a memory-mapped I/O device– Mapped to 0x20200000

• LED Character Map– Look in header file brh.h

• Keypad + LED demo in Lab 2– Display on the LED the number entered on the keypad

• Quirks: Except for the first key press of any run, each key press returns two values – (i) the value of the last key pressed and (ii) the value of the current key pressed.


Jumper-Configurable Little/Big EndianJumper-Configurable Little/Big Endian


Flash Memory on the BoardFlash Memory on the Board• What is flash memory?

• X-Board contains 4MB of flash memory• Can store programs (and data) in a block structure• Flash library

– Divides the flash memory structure into blocks

• BOOT Portion of Flash Memory– Contains the boot monitor, Angel debug client, system self-tests

• Application portion (use this for Lab 2)– Where the user keeps applications and associated data

• Do not set the BOOT portion as your default flash device!

[ASIDE]Example of flash memory(not on X-Board, though)


Flash Library Image Storage LayoutFlash Library Image Storage Layout

Image Area

Logical block boundary(high memory)

Unused

Image Information

Header

Footer

Logical block boundary(low memory)


Details of the LayoutDetails of the Layout

• Image area– All of the code and read-only data segments of the image.

• Header information– Any file header information from the downloaded file

• Image information– Image identification & code operations (added by flash lib code)

• Unused flash

• Footer information (five-word information block)– Address of the information block for this image

– Base address of the data (the start might be at the beginning of a previous block rather than at the start of this block)

– Unique 32-bit value to aid in fast searching

– Image type (a block, an image, a SIB, or data)

– Checksum for the footer information (over the first four words only)


Accessing Flash Memory (Flash APIs)Accessing Flash Memory (Flash APIs)

• Flash libraries supplied– flash_lib.a, ActivateFlash.a – APIs defined in flash_lib.h

• APIs in these libraries allow you to – Initialize/finalize the flash device

– Check that flash memory exists at a given location

– Mark a part of the flash memory as active

– Read a 32-bit word out of a location in flash memory

– Examine/verify the footer information (calculate checksum)

• APIs also allow you to perform file processing– Open/close a file on the host

– Read bytes from the open file

– Write bytes to the open file

• Please see Lab 2 handout for more details


Software Addressing of Devices Software Addressing of Devices • Memory mapped I/O

– Devices are mapped in memory address space, e.g., the 7-segment LED

– Standard load and store instruction can manipulate devices

• Isolated I/O (I/O mapped I/O) – Devices are not kept in memory address space

– Special processor instructions request data from devices

• Example IN REG, PORT

OUT REG, PORT

• Which one is better? – Memory mapped I/O uses the same load/store paradigm, but costs

some of the address space

– Full address space is available for Isolated I/O, but requires extra instructions and control signals from the CPU


Writing Code to Access the Devices Writing Code to Access the Devices • Writing assembly code to access devices can be

cumbersome LDR R0,=0x20200000

MOV R1,#0xFF

STRB R1,[R0]

• Should use “EQU” assembler directive BASE EQU 0x20200000

LDR R0, =BASE

• Can also access devices using C programs


Accessing Devices from C Programs Accessing Devices from C Programs

• C pointers can be used to write to a specific memory location unsigned char *ptr;

ptr = (unsigned char *) 0x18000000;

*ptr = (unsigned char) 0xFF;

???????????0x18000000

ptrptr


The X-Team’s “Xplanation”The X-Team’s “Xplanation”


Summary of LectureSummary of Lecture• The 18-349 lab 80200 Big-Endian Evaluation Board

– 80200 XScale processor

– Xilinx FPGA

• The X-Board and accessories– Seven-segment LED, Serial ports

• Preparing you for Lab 2Flash memorySerial ports

– Timers (stay tuned for the next lecture)

the x-board: memory-mapped i/o and devices

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