The threshold voltage for long channel transistors VT0 is defined as:

Eindhoven Eindhoven MOS-AK MeetingMOS-AK Meeting April 4, 2008April 4, 2008

Accurate FinFET modeling at high temperaturesAccurate FinFET modeling at high temperatures

A.Cerdeira1, M. Estrada1, J. Alvarado2, V. Kilchytska2 and D. Flandre2

1 Sección de Electrónica del Estado Sólido, Depto. de Ingeniería EléctricaCINVESTAV, México, D.F. cerdeira@cinvestav.mx

2 Microelectronics Laboratory, Université Catholique de Louvain, Louvain-la-Neuve, Belgium

INTRODUCTION The new compact analytical Doped Symmetric Double-Gate Model (Doped-SDG model) recently developed in [1,2,3] that considers variable mobility and short-channel effects, is used for modeling FinFETs behavior at different temperatures up to 200°C.

FinFETs with the following features are analyzed [4]:

High K-metal gate stack. Na= 1015 cm-3.

EOT = 1.6 nm. Fin-width of 25 nm. Fin-height of 65 nm. 5 Fins. Transistor channel width, W=775 nm. Channel lengths of 10 m and 80 nm. SEM photo of a FinFET structure from IMEC

Comparison of measured and modeled transfer characteristics at VD= 20 mV and 1V with temperatures of 20°C; 75°C; 100°C; 150°C and 200°C are shown in figures 1 to 4. Excellent agreement in below and above threshold regions is observed including the variation of the subthreshold slope. Extracted values of the model parameters are also show in Tables I - III with = 0.6 for all cases.

Gate

Drain

SourceMultiple Fins

Fin-height Fin-width

Channel length

DOPED-SDG MOSFET MODEL

As was shown in [1] the new model is based on the description of the potential difference between the surface and the center of the silicon layer, d, as function of doping concentration Na, equivalent gate dielectric thickness tox and silicon layer thickness ts.

The surface potentials in all regimes, from below to above threshold regime can be calculated using the Lambert function.

bs

ox

TTb

ox

S

bs

oxFFBT qC

Ceq

CC

tqC

CtVV

T 11

41

121

14

ln20

tC

tNaqq

ox

Sb

t

VTdT

)(

The inverted charge concentration normalized to gate capacitance Cox and multiplied by thermal voltage t=kT/q is equal to [2,3]:

2

112

2

bt

Vs

ox

sbn

qe

e

C

Cqq

F

The mobility dependence at transversal medium electric field Em, at electric field along the channel and at temperature T is expressed as:

;where qns and qnd are normalized inverted charge concentrations at source and drain respectively.

2212.1

1211

1

300

1

Lv

V

o

E

Em

E

EmT

sat

Def

PP

22bndns

s

ox qqqtCEm

Current including the short channel effects (SCE) and temperature is equal:

)20(1

21

21

21

22

1

1

0

)(22

20

GTDefGT

Lnndns

ndns

VthVVRCLW

qqqq

tCLW

LL

I

VGT = VG - VT and SCE are considered through the following expressions:

VT including DIBL and roll-off effect (VT = VT0 - VT) Variation of S Saturation voltage

Channel shortening Effective drain voltage VDef Natural DG length

t

V

ia

Lm

Ln

T et

V

n

Nae

L

ttV

5.23.0

2

391ln1

Csat

DefsD

C

C

tv

VVo

t

L

L

t

L

L 1ln1ln

GTGTt

L

VthVtheLn s 10121

10121

1015.1)(

2

75.1

satsatDsatDsatDef V

ttVV

tVVVV

34

332

12

2/

2/ln2

bnsat

bnsnsatnssat qq

qqqq

tV

OX

Ssn C

Ctt

41

22

o(cm2/V s)

E1(V/cm)

P1E2

(V/cm)P2

L= 10 m 1341 2500 0.33 4.7- 1.1V Def 1.5

L= 80 nm 1257 2500 0.33 3.4 – 2VDef 1.5T ºC R []

75 600 1.2

100 560 1.2

150 460 1.2

200 450 1.3

S (mV/dec) T=20ºC 75 100 150 200

L= 10 m (exp) 62.8 78 82.6 106.3 130

modeled 62.6 77.7 86.4 105.7 130

L= 80 nm (exp) 75.2 81.8 93.4 105.9

modeled 62.6 75.2 80.7 92.3 105.3

0.2 0.4 0.6 0.8 1.0 1.2 1.4

0.0

0.1

0.2

0.3

0.4

0.5

1E-14

1E-12

1E-10

1E-8

1E-6

I D

(A

)

VG (V)

measured model

20 ºC 75 ºC 100 ºC 150 ºC 200 ºC

L= 10 mV

D= 20 mV

Fig. 1 Transfer characteristic at 20 mV; L= 10 m

0.2 0.4 0.6 0.8 1.0 1.2 1.4

0

5

10

15

10-12

10-10

10-8

10-6

L= 10 mV

D= 1 V

measured model

20 ºC 75 ºC 100 ºC 150 ºC 200 ºC

I D

(A

)

VG (V)

Fig. 2 Transfer characteristic at 1 V; L= 10 m

0.2 0.4 0.6 0.8 1.0 1.2 1.4

0

2

4

6

8

10

12

14

16

1E-11

1E-10

1E-9

1E-8

1E-7

1E-6

1E-5

I D

(A

)

VG (V)

measured model

75 ºC 100 150 200

L= 80 nmV

D= 20 mV

Fig.3 Transfer characteristic at 20 mV; L= 80 nm

0.2 0.4 0.6 0.8 1.0 1.2 1.40

50

100

150

200

250

300

350

400

1E-11

1E-10

1E-9

1E-8

1E-7

1E-6

1E-5

1E-4

1E-3

I D (A

)

VG (V)

measured model

75 ºC 100 150 200

L= 80 nmV

D= 1 V

I D (

A)

Fig. 4 Transfer characteristic at 1 V; L= 80 nm

TABLE I Mobility parameters o, E1, P1, E2, P2

TABLE II Series resistance and parameter

TABLE III Extracted values of subthreshold slope S

CONCLUSIONS

The Doped-SDG Model was used for modeling FinFET transistors with metal gate, low doped silicon layer for two different channel lengths, 10 m and 80 nm. The transfer characteristics were measured at 20ºC, 75ºC, 100ºC, 150ºC and 200ºC. The measured and modeled characteristics present an excellent coincidence from below to above threshold regions, including the subthreshold slope, showing the accuracy of the proposed model and its application to FinFETs.

BIBLIOGRAPHY[1] A. Cerdeira, O. Moldovan, B. Iñiguez and M. Estrada, “Modeling of potentials and threshold voltage for symmetric doped

double-gate MOSFETs”, Solid-State Electronics, Jan. 2008, available on ine www.sciencedirect.com[2] A. Cerdeira, B. Iñiguez and M. Estrada, “Improved Compact Model for Symmetric Doped Double-Gate MOSFETs”,

SBMicro 2007, ECS Transactions, 9 (1) 47-56 (2007)[3] A. Cerdeira, B. Iñiguez and M. Estrada, “Compact Model for Short Channel Symmetric Doped Double-Gate MOSFETs”,

to be published in Solid-State Electronics[4] N. Collaert et al.,Symposium on VLSI Technology, pp. 108-109, 2005