the magazine of record for the embedded computing

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INTELLIGENT CONTROL

The magazine of record for the embedded computing industry

www.rtcmagazine.comFebruary 2008

Standards Move Wireless Networks to Mainstream

Middleware Pulls Together Complex Platforms

ATCA: Not Just for Telecomm Anymore

INTELLIGENT CONTROL Keeps Battery-Powered Devices

Going and Going

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Untitled-2 1 2/13/08 9:33:19 AM

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GE Fanuc Intelligent Platforms

© 2008 GE Fanuc Intelligent Platforms, Inc. All rights reserved.

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February 2008 �

TABLEOFCONTENTSDepartments

EditorialBroadband Everywhere? Don’t Hold Your Breath

Industry InsiderLatest Developments in the Embedded Marketplace

Featured Products

Products & TechnologyNewest Embedded Technology Used by Industry Leaders

News, Views and CommentBig Changes for 2008: New Technology on Nervous Economic Footing

FEBRUARY 2008

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technology in contextATCA Breaks Out of Telecom

ATCA and RapidIO Meet Demanding Semiconductor ApplicationsIan Shearer, Mercury Computer Systems

solutions engineeringWireless Sensors

Standards Will Fuel the Spread of Wireless Network TechnologiesNiek Van Dierdonck, GreenPeak

inDustry insightMobile Power Management

Optimizing Mobile and Portable Power Management SystemsKim Rowe, RoweBots Research

system integrationIntegrating with Middleware

Prevalidated Hardware and Middleware Platforms Speed System IntegrationJim Lawrence, Enea and Sven Freudenfeld, Kontron

No Processor Is an Island: Developing Multiple Processor Systems with the “New” CORBAJoe Jacob, Objective Interface Systems

inDustry WatchAdvanced Debugging

RTOS Event Logging Enables Real-Time Systems AnalysisJohn Carbone, Express Logic

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244260

Multi-Slot PCI Express-to-PCI Extension SystemsXMC/PMCs with x4 sRapidIO Ports and VPX Intelligent I/O Carrier

ATCA Breaks Out of Telecom

12 38 46

Keeps Battery-Powered Devices Going and Going

INTELLIGENT CONTROL

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February 2008 �

EDITO

RIAL

Broadband Everywhere? Don’t Hold Your Breathby Tom Williams, Editor-in-Chief

The reservations above that were expressed about two earlier world-changing technologies. Interestingly, we haven’t seen that kind of reaction to the spread of the Internet. Instead,

we are witnessing the kind of hype expected with a new, disrup-tive technology along with huge expectations accompanied by often unrealistic assumptions.

We needn’t deal with the issue of hype. That’s the usual background noise and the only way to cope with it is to develop the proper set of filters. Just as one example, I recently saw a truck in the area belonging to the local cable monopoly. We won’t name the company, but the sign on the side of the truck read, “[Company Name] Triple Play.”

Ahem.Those of us in this industry know what the expression

“Triple Play” really means. It means data, voice and video over broadband Internet Protocol. The cable company happens to de-liver telephone service, cable TV service and Internet access. But that’s NOT what we mean by Triple Play. Now, IMS adds mobile service to the expected IP-based multi/media world. Universal IMS is even further removed from everyday reality.

The latter two phenomena are the result of the potential of a universal broadband Internet. This is complicated by the fact that in some isolated pockets that potential has actually come close to realization. And, inexorably, it will continue to spread and grow. But it’s not here yet. There are, of course, lots of great examples of the potential from mostly urban areas about how great full broadband service is—and they are quite believable. But get out-side those centers and things look quite a bit different.

Out here in California’s Santa Cruz Mountains—just “over the hill” from Silicon Valley—those living outside the centers of Santa Cruz or Monterey, that is, in the hills, have limited options. I, for instance, live on an idyllic ranch in the hills, but the popu-lation is not dense enough for the county’s cable monopoly to bother with supplying its “Triple Play.” Most folks make do with satellite TV, which is not bad. For Internet connection, however, there are basically three options: dial-up, satellite or a form of

line-of-sight wireless that can deliver from 1 to 4 Mbit/s band-width. We do have phones (and yes, we have flush toilets), but “wiring the country” for broadband Internet is a different matter altogether. And it will take longer and it will go by much differ-ent routes.

Unlike the telephone service, which (at least until recently) was directed by a single, monolithic entity and whose early ex-pansion partially followed the spread of the population, the In-ternet is very decentralized, allowing huge service providers to exist in markets that make sense to them while smaller ISPs can fit into more local niches that may or may not be attractive to the big players. In the end, they all connect to the same “cloud” and one day we all may have access to the same range of ser-vices and speeds. This, by the way, is why open standards like ATCA, AMC and the SAF-based middleware interfaces make such sense. They enable service providers to get into the game at a small scale and are also attractive to larger ISPs and TEMs, who can begin adding value at a higher level and begin compet-ing sooner in their respective markets.

While that may all be just peachy, it is still a long way until outlying areas come in to the broadband fold on a reliable basis. We hear about “fiber to the home,” but seldom of “fiber to the farm.” I just spent a morning with a guy from my ISP who was trying to get me a better signal on my 900 MHz wireless link. It turns out that due to the trees in the path, he was getting a stron-ger signal from the reflection off the mountain than when he tried to aim directly at the access antenna. We finally decided we’re going to have to move the antenna to the roof of a neighbor’s house and upgrade service. That’s just for basic Internet—we haven’t even considered the idea of IPTV.

While wireless connectivity is definitely a vital part of an overall IP-networked world, I think the bandwidth demands of IPTV, let alone full IMS service, will far outstrip what can be done with wireless. Sound difficult? “But to have IMS, we’d have to lay fiber all over the country!”

“But if everyone communicates by telephone, we’ll have to wire the whole country!” “But if the public travels by airplane, we’ll have to build airports everywhere!”

FEbRuARy 2008

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Test and Measurement Industry Trends toward Software-Defined Instrumentation and Use of Multicore

Test engineers in industries ranging from aerospace and defense to consumer electronics are facing the challenge of testing increasingly complicated designs with shrinking timelines and budgets. To address these issues, engineers and scientists are incorporating new test and mea-surement technologies that are capable of meeting complex design requirements without raising costs. National has identified five trends it anticipates will significantly influence the test and measurement industry over the next three years.

To continue realizing performance gains without increased clock rates, proces-sor manufacturers are developing processors with multiple cores on a single chip. With multicore processors, test engineers can develop automated test applications capable of achieving the highest possible throughput through parallel processing. One issue facing test engineers is that test instrumentation is not updated as rapidly as the de-vices being tested. The functionality of these complex devices is being defined by the software embedded in them, such as most smart phones, which gives design engineers the ability to add features faster than ever before. This is increasingly challenging for many test engineers because most stand-alone instruments often lack the measurement capabilities of the most recent stan-dards due to the fixed user interface and firmware that must be developed and embedded in them. Thus, test engineers are turning to a software-defined approach to instrumentation, which gives them the ability to quickly customize their equipment and user interfaces to meet specific application needs and integrate testing directly into the design process.

Another area experiencing rapid expansion in the test industry is the increase in system-level tools for field-programmable gate arrays (FPGAs). More manufacturers are including FPGAs on modular instruments and giving engineers the access in software to reprogram them according to their requirements. For example, test engineers can embed a custom algorithm into the device to perform in-line processing inside the FPGA or emulate part of the system that requires a real-time response. New system-level tools are emerging that provide engineers with the ability to rapidly configure FPGAs without writing low-level VHDL code.

Test engineers are also facing new challenges as the use of RF and wireless applications is expanding. RF and wireless traditionally have been very specialized fields, but the industry is experiencing a trend where wireless capability is being integrated into more products. Soon, RF instrumentation could become as ubiquitous as general-purpose instruments such as digital multimeters. This growth in adoption requires test engineers to learn wireless protocols and keep pace with the rapid introduction of new standards.

As semiconductor devices become more complex, the process of testing each part completely with a traditional vector-based methodology is increasingly difficult. Complex systems-on-a-chip (SoCs) and systems-in-a-package (SiPs) require a system-level functional test more closely related to testing components placed on a printed circuit board than a typical chip test, but they still re-quire the high speeds demanded in production test for the semiconductor industry. The strategy of testing a device by emulating actual real-world signals provides a better method of functional test for these types of high-speed systems.

Kontron to Acquire Thales Computers

Kontron is currently in dis-cussions with Thales and has made an offer to acquire the French Thales Computers SA. The company is 100% owned by

the Thales Group. The considered acquisition would be subject to contract finalization, to the in-formation and consultation of Work Councils of Thales SA and Thales Computers SA, as well as to French relevant Authorities

agreement. Thales Computers SA will turn over more than €20 million in its 2007 financial year. The company commands strength

in high-end applications in par-ticular for government, aerospace and transportation areas.

Mr. Ulrich Gehrmann, Man-agement Board Chairman of Kon-tron AG, stated that the acquisi-tion would reinforce Kontron AG in its core business, and would provide Kontron AG with a sig-nificant footprint in France. Mr. Gehrmann added that it would compensate Kontron for the sales volume relinquished with the dis-posal of its mobile computer busi-ness in America—this business unit generated sales of USD 25 million in 2006 and was sold in August 2007 to Crane Co. based in Stamford, CT.

Catalytic Merges with Celoxica ESL, Changes Name to Agility Design Solutions

Following its merger with Celoxica’s ESL business, Cata-lytic has announced the company has become Agility Design Solu-tions Inc. The name change re-flects the expansion in company size, product offering, geographic reach and company vision result-ing from the recent merger.

Agility speeds the develop-ment of signal processing algo-rithms offering complete solu-tions for algorithm acceleration, prototyping and implementation in both software and hardware. The solutions include Agility’s unique software technologies for Matlab to C and C to FPGA syn-thesis and a rich portfolio of syn-thesizable algorithmic functions and FPGA hardware platforms. Agility completes the solutions with services delivered by a team of expert users to help custom-ers meet deadlines and delivery requirements. The new Web site is www.agilityds.com. Corporate headquarters are located in Palo Alto, California.

February 2008 �

INDUSTryINSIDERFEBRUARY 2008

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Get Connected with technology and companies providing solutions nowGet Connected is a new resource for further exploration into products, technologies and companies. Whether your goal is to research the latest datasheet from a company, speak directly with an Application Engineer, or jump to a company's technical page, the goal of Get Connected is to put you

in touch with the right resource. Whichever level of service you require for whatever type of technology, Get Connected will help you connect with the companies and products you are searching for.

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10 February 2008

INDUSTry INSIDER

ANSI upholds Reaccreditation of VITA/VSO

VITA, the trade association dedicated to fostering Ameri-can National Standards Institute (ANSI) accredited, open system architectures in critical embed-ded system applications, was notified by ANSI that the latest appeal filed by Motorola on the decision by ANSI to reaccredit the procedures of VITA/VSO has been dismissed.

Motorola originally ap-pealed to the ANSI Executive Standards Council (ExSC) Panel, who denied the appeal and af-firmed the original decision made by the ExSC to reaccredit the pro-cedures of VITA/VSO to include ex-ante policy. A second appeal was made per the ANSI appeals process to the ANSI Appeals Board. The appeals statement and supporting documentation that was submitted by Motorola in connection with this appeal, together with the appeals mate-rial originally before the ANSI Executive Standards Council, was provided to the members of the ANSI Appeals Board via let-ter ballot. The letter ballot was issued in accordance with clause 11 Appeals process of the ANSI Appeals Board Operating Proce-dures in order for the members to determine “whether the appellant has established a prima facie case that the decision appealed from was clearly erroneous.”

The ANSI Appeals Board Panel decided, based on the re-cord before it, that the appeals statement and record did not es-tablish such a prima facie case. Accordingly, the ANSI Appeals Board dismissed the appeal with-out an appeals hearing. This de-cision completes the appeals pro-cesses available at ANSI.

Zigbee Smart Energy Profile for Efficient Metering and Management

ZigBee has announced that it has completed development of its ZigBee Smart Energy public application profile. ZigBee Smart Energy offers utility companies a global open standard for imple-menting secure, easy-to-use wire-less home area networks for man-aging energy. The profile also offers product manufacturers ac-cess to a burgeoning green mar-ketplace by establishing a stan-dards-based technology for new products designed to enhance en-ergy management and efficiency by consumers everywhere.

ZigBee Smart Energy en-ables wireless communication be-tween utility companies and com-mon household devices such as smart thermostats and applianc-es. It improves energy efficiency by allowing consumers to choose interoperable products from dif-ferent manufacturers giving them the means to manage their energy consumption more precisely us-ing automation and near real-time information. It also helps utility companies implement new ad-vanced metering and demand re-sponse programs to drive greater energy management and efficien-cy, while responding to chang-ing government requirements. A number of Alliance members are currently building products that will be certified by the Alliance to support ZigBee Smart Energy.

ZigBee Smart Energy offers innovative electric, gas and wa-ter utilities support for advanced metering, demand response, load control, pricing and customer messaging programs. It provides communication and control for devices such as in-home displays, programmable communicating thermostats, water heaters, light-ing, smart appliances, plug-in hy-brid electric vehicles, plus energy service portals and energy man-agement systems.

Wireless IP Companies Announce Joint Marketing Agreement for WiMAX

Two producers of highly optimized, power-efficient semi-conductor IP for WiMAX and emerging wireless standards will offer a joint solution combining baseband processor firmware and MAC layer plus protocol stacks as a complete wireless technol-ogy package for system-on-chip developers

Coresonic AB, a provider of baseband processor technol-ogy for next-generation mul-timode wireless modems, has announced a joint marketing agreement with SySDSoft, Inc., a provider of embedded software for the wireless broadband mar-ket, to promote and market each other’s complementary technolo-gies as complete packaged solu-tions to mobile device developers and manufacturers.

SySDSoft designs base-band and rF/analog circuits for the growing wireless broadband market, with a product portfolio covering a variety of technolo-gies such as WiMAX, Wi-Fi, Bluetooth and wireless USB. Its IP cores can also be implemented in the latest generation of mobile WiMAX IEEE 802.16-e/WiBro wave 2-compliant MAC for mo-bile devices. The initial focus of this collaborative effort is on pro-ducing a WiMax demonstrator, and the companies intend to add Wi-Fi and Bluetooth support to meet customer needs.

Over Four billion Embedded Systems Shipped in 2006—Still Resisting Commercial RTOS

recently published research by Venture Development Corpo-ration (VDC) concludes that over 4 billion embedded systems/de-vices were shipped worldwide in 2006. According to VDC’s “2007 Embedded Systems Market Sta-tistics” report, significant growth in the number of embedded ship-ments is expected to continue over the coming years.

Furthermore, VDC esti-mates that embedded systems using no formal operating system (with no software on the device that is considered to be an oper-ating system by the project team) or in-house developed operating systems as their primary oper-ating system, represented the majority of total embedded sys-tem shipments in 2006. Through 2009, VDC expects the number of embedded devices shipping with a commercial and/or open source operating system to grow at a faster rate than shipments of devices with an in-house/propri-etary operating system or with no formal operating system.

The trend toward the use of formal third-party operating sys-tems within today’s embedded systems projects is driving this transition. However, VDC be-lieves that migrations in operat-ing system selection will impact total embedded unit shipments less visibly in the shorter term, as the number of products shipping in any given year will always be heavily represented by designs from years past.

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Untitled-2 1 8/21/07 8:14:31 PMFebruary 2008 11

THE 2-for-1EDITOR’S CHOICEAWARD 2007


Every year RTC offers our advertisers an extra opportunity to feature their products and achieve-ments in our Annual 2-for-1 promotion. This year

we’ve decided to highlight one of these submissions to pres-ent our first ever “Two-for-One” Editor’s Choice Award.

This award goes to the company that demonstrates outstanding technical achievement as presented in their Products spotlight.

May I have the envelope please? This year’s iPod Nano® Award goes to:

Acromag for their inclu-sion of PMC-VLX/VSX Virtex-5 FPGA I/O and AMX-A30 High-Speed A/D with Virtex-4 FPGA

Thank you to all our advertisers for their continued support of RTC.

www.thalescomputers.com

12 February 2008

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tAtCA BreAks out of teleCom

ATCA and RapidIO Meet Demanding Semiconductor Applications

The necessity for highly available platforms supporting dense and complex processing in the semiconductor industry has led to the adoption of Advanced Telecom Computing Architecture (ATCA) equipment for top-end control applications.

by Ian Shearer Mercury Computer Systems

A leading semiconductor company re-cently had a situation in which de-mands placed on its equipment were

increasing, and the existing bus-based computing system was running out of bandwidth and introducing unacceptable latency. The company required a fabric-based solution that was cost-effective and scalable, yet still supported an existing proprietary I/O format. Advanced Mez-zanine Cards (AMCs), standard ATCA carrier blades and a RapidIO fabric met the demanding, low-latency control-loop requirements of this industrial equipment application. While these standards were not specifically designed for this market, they are capable of meeting requirements for a broad range of applications.

The application is basically an ex-tremely complex control loop. Rather than a simple three-term proportional-inte-gral-derivative (PID) controller, achieving nanometer control accuracy requires nu-merous terms and algorithms that neces-sitate using multiple processors to achieve

real-time performance. Semiconductor manufacturing equipment has through-put as a key performance criteria, so “real time” becomes more aggressive with ev-ery new generation of equipment. While this level of speed and accuracy is defi-nitely at the top end of the performance requirements, the approach described here applies—albeit in a smaller scale—to less demanding systems.

Complex Application Makes Big Demands

As with any multiprocessor applica-tion, moving data around the system is as important as the processing. The compa-ny’s compute platform used a common bus structure to pass data between pro-cessors, and between processors and I/O modules. Over recent equipment genera-tions, the amount of data to be processed and the processor clock speed increased, but the bus capacity remained limited. Data movement soaked up a greater pro-portion of the available time for each op-eration and the bus became a bottleneck to achieving required performance. The next-generation compute platform there-fore had a number of enhanced require-

ments including deterministic latency, support for proprietary I/O, flexibility and cost-effectiveness. It also needed to be on a clear technology path into the future.

Control-loop applications have hard, deterministic real-time constraints, and violating the input-to-output latency re-sults in machine failure and unacceptable performance. The results are down time. Achieving a low mean latency is insuffi-cient; the peak system-level latency must also be constrained. Computing the right drive current to apply to an actuator is of little value if the current is not applied at the right time; think of hitting the brakes really hard.

There was also a need to support leg-acy and proprietary I/O. The old comput-ing system was linked to other parts of the equipment by a set of proprietary inter-faces. There were so many such connec-tions that replacing them with standards-based interfaces was unrealistic. While it was highly desirable to adopt a standard platform for the compute platform, that platform had to be capable of easily sup-porting custom I/O modules.

Moving to a new design platform should allow easy implementation of dif-




Ad Index










February 2008 13

Technology InContext

ferent options. In this instance, the overall semiconductor equipment is produced in a number of versions, with different levels of performance and various options. Also, the equipment includes a large number of controllers with varying levels of com-plexity. Using a platform that is scalable in terms of performance, processor count and I/O configuration supports that com-plex product mix.

Point solutions—one-off solutions with no roadmap—are often expedient but generally delay issues until some future date. The old bus-based processing archi-tecture had been used for many years very successfully. Unless a similar architecture was used again, maybe just repackaged to make use of new standards, there would be significant disruption in adopting a new platform. It did not make sense to make such a change without knowing the new solution would last for some time and support adoption of new technology as it becomes available.

Finally, even in top-end applications driven by innovation and performance, cost is an important factor in selecting a compute platform. In a cyclic industry such as semiconductor equipment, man-aging production costs can determine a company’s ability to survive.

Why RapidIO?A switched fabric was the obvious

next step from a bus architecture provid-ing a number of performance and usability benefits. RapidIO is the current embedded fabric of choice, being an open standard, providing high bandwidth, and being widely supported by processor and FPGA manufacturers. Most significantly, Rapi-dIO implements point-to-point assured delivery in hardware, with the result that latency is both low and highly determin-istic. The closest rival for a fabric inter-connect, embedded Ethernet, has a high software overhead and poor determinism.

While deterministic low latency was imperative for the target application, RapidIO offers other features that provide important system-level benefits. Using a bus-based communication requires close coupling between software and hardware. Moving data between I/O nodes and mul-tiple processors over a shared bus requires a packetized TDM implementation, which means all internal processing needs to ad-

here to a rigid timeline to hit bus avail-ability slots. RapidIO endpoints simply send out data packets when the data is ready, and the fabric takes care of inter-leaving packets, message queues, etc. This decoupling of software and hardware sig-nificantly eases software design, allowing flexibility in the application structure.

Another benefit of RapidIO is its ability to handle different levels of traffic priority. This allowed high-priority (de-terministic data) and low-priority (system management) packets to share the same fabric with minimal latency impact. In fact, benchmarking activities carried out during system design showed that up to 60 Mbytes/s of low-priority traffic can be moved across critical areas of the fab-ric with less than 10% latency impact on critical data.

Why AdvancedTCA?AdvancedTCA is a telecomm stan-

dard, so why use it for an industrial con-trol application? Well, for starters, it is built around switched fabrics and sup-ports RapidIO through the PICMG 3.5 and AMC.4 standards (Figure 1). Because

ATCA is an established standard, there are numerous manufacturers of proces-sors, I/O modules, chassis, carriers, etc. providing a strong competitive landscape. In addition, the AMC standards allow for fine granularity in system definition and scaling. For example, it is easier to add a single processor by plugging in an AMC rather than two-to-four processors on a full blade. So ATCA fits well for a “build-ing-block” approach to platform imple-mentation.

Hardware is only part of the story for a processing platform. Any respect-able processor card vendor offers drivers for the supported interfaces. In this case middleware was developed to isolate the application from the underlying technol-ogy, reducing application development time and making future technology tran-sitions easier.

ATCA also offers system-level ben-efits that add value. The base interface (Ethernet) provides a simple method of booting the complete system, with it be-ing common practice to use ftp to boot from an external server. The IPMI in-frastructure supports a range of configu-

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FPGACompute Node

FPGACompute Node

FPGACompute Node

FPGACompute Node

AMCs

AMCs

DSP Node

DSP Node

DSP Node

DSP Node

AMCs

Figure 1 AdvancedTCA is a telecomm standard built around switched fabrics and supports RapidIO through the PICMG 3.5 and AMC.4 standards and is conducive for many other applications including industrial control.

14 February 2008

Technology InContext

ration management and machine health monitoring capabilities that can prove ex-tremely useful in the large and complex systems typical of semiconductor equip-ment. Being designed for the high-volume telecomm industry, the standard also sup-ports attractive cost metrics, particularly as adoption accelerates.

SolutionThe new compute platform is based

on Mercury Computer Systems’ Ensem-ble2 product line, which includes control (PowerPC and PowerQUICC) and DSP processors, FPGA-based AMCs (Figure 2), standard carrier blades, a RapidIO switch blade and various sizes of ATCA chassis. By using AMC carrier blades with onboard RapidIO switching, the re-sulting system configuration is a compute

platform that meets the customer’s deter-ministic low-latency requirements in a physically small, high-density package.

A custom-interface AMC trans-lates between RapidIO and the propri-etary protocol used throughout the rest of the system. This uses standard serial RapidIO endpoint IP, implemented in an FPGA, to interface to the rest of the compute platform and existing customer IP in the same FPGA to support the pro-prietary interface.

The system is scalable in both pro-cessing and I/O by selecting the appropri-ate AMCs, while the RapidIO fabric pro-vides the necessary flexibility to enable this to be done without compromising performance. Whereas the old process-ing system used two buses—a standard bus for control and monitoring alongside

a proprietary high-speed bus for time-critical data—the RapidIO fabric supports these multiple traffic flows in a determin-istic manner.

What Next?In any industry, value must increase

over time. In a processing platform that means either reducing cost or increasing performance, or both. MicroTCA offers an obvious route for cost reduction, reduc-ing the switching and support infrastruc-ture costs for a RapidIO platform. While the equivalent system provides lower bandwidth (being dual star rather than mesh architecture) the target application is not bandwidth-constrained. Since fewer switch “hops” are required to traverse the system, MicroTCA actually offers lower hardware latency, giving a small benefit to this critical system characteristic.

Cost reduction is assisted by mov-ing to multicore processors. Application developers must take care to make use of the benefits of such a processor, but in this case middleware—a hardware abstraction layer—was provided to isolate the user from the platform, easing the adoption of new technology.

While ATCA was designed for the telecom market, it is a very capable standard that is appropriate for a much broader range of applications. Switched fabrics are replacing bus-based architec-tures where bandwidth and/or latency are important. By having the fabric firmly embedded at the heart of the standard, ATCA is well placed for such applica-tions. The system management capabili-ties provided by the IPMI infrastructure add value wherever there is more than a minimal level of complexity.

RapidIO, as a lean, low-latency fabric specifically designed for embedded applica-tions, is gaining traction in embedded con-trol, so it is not surprising that RapidIO and ATCA together are adopted in this space. MicroTCA, with its lower infrastructure overhead and lower cost base, will broaden the applicability of such fabric-based con-trol platforms to less demanding and more cost-sensitive applications.

Mercury Computer SystemsChelmsford, MA.(978) 256-1300.[www.mc.com].

Figure 2 Mercury’s Ensemble2 product line includes control (PowerPC and PowerQUICC) and DSP processors, FPGA-based AMCs, standard carrier blades, a RapidIO switch blade and various sizes of ATCA chassis.

Silicon Stack Technology from Critical I/O. 10Gb Ethernet at Wire Speed.

[Problem] You’re expecting 10Gb Ethernet to deliver a whole lot more performance to your

embedded system. But what if you invest in it and get no gain at all? The performance of

nearly all existing 1Gb applications are limited by the software overhead associated with

the TCP/IP protocol stack. This bottleneck is in the software stack, not the network hardware.

So, simply upgrading to 10Gb pipes will not improve your system’s performance.

[Solution] Unlike conventional Ethernet interfaces or processor-based “offload” products,

Critical I/O’s Silicon Stack technology eliminates this inherent bottleneck by offloading

protocol processing to silicon; thereby achieving sustained line-rate performance,

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Which Way do You Want Your 10Gb Ethernet?

Silicon StackCritical I/O XGESoftware Stack

Conventional NIC Technology

XGE Silicon Stack Ethernetvs. Software-based Stack

Software Stack Silicon Stack

1Gb 10Gb 1Gb 10GbThroughput 40 250 2500max sustained rate variesin MBytes/sec with protocol

Host Overhead Very High Very Low

Latency 125 μsec 12 μsec 5 μsecDeterminism Horrible Rock Solidtypical variation ± 200 μsec ± 1 μsecReliability Poor when under Excellent under

heavy load all load conditions,no dropped data

250MB/sec 1Gb

2500MB/sec 10Gb

Untitled-4 1 9/12/07 10:14:45 AM

www.criticalio.com

16 February 2008

solu

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en

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er

in

gWireless sensors

Standards Will Fuel the Spread of Wireless Network TechnologiesWireless products and technology for sensing and control applications have become a real-ity, and the widespread adoption of wireless technology is only a matter of time. For that to happen, product integrators require technology standards to provide product interoperabil-ity, a large body of knowledge and development sources, second sourcing and flexibility.

by niek Van Dierdonck GreenPeak

The average home user has fifty light switches in the home; a facility man-ager receives a daily status update of

all 10,000 lights in the large office build-ing; an industrial plant operator receives an alarm that the mains power has failed and that the uninterruptible power supply has commanded all heavy machinery to switch to a safe state.

All three examples are typical sensor and actuator cases: the home switch trig-gers the home light, the office building luminaries deliver a remote status report, the factory uninterruptible power supply (UPS) changes the state of the machines. In all three applications, devices commu-nicate over a network. In all three applica-tions, wireless communication can offer a huge cost saving opportunity given the high installation costs of cable networks.

Under the hood, however, the three applications are very different. In the home application the main drivers are low cost and low power for the wireless switches and low cost for the wireless

light. Of course reliability is important too, but an occasional second pressing of the switch to make the light turn on won’t create a critical situation.

The situation is quite different in the office building. The facility manager usu-ally guarantees a minimum service level to the building owner or occupant and relies on automation systems to perform maintenance tasks. Failing systems caus-ing a hiccup in the maintenance schedule can have huge financial impact. Worse, an intruder switching off all lights of a large office building at 6 PM on a dark winter day can cause panic and casualties: noth-ing less than a terrorist attack. So reli-

ability is essential in commercial building applications.

Because commercial applications of-ten have hundreds of devices running on batteries that will eventually fail and need costly labor effort to replace, low power is more critical in commercial applications than in the home. Industrial automation is probably even higher up on the reliability scale, even a slight glitch in a safety appli-cation might cause fatalities. On the other hand, industrial automation is usually less cost-sensitive than home and commercial building applications.

These are only a few of the parameters that define the diversity of sensor applica-tions. Other parameters include latency of the communication, the number of nodes in a network, the complexity it takes to install, commission and maintain a net-work, etc. It should come as no surprise that for such a diverse application space a “one-size-fits-all” strategy just does not work—not for the technology, nor for the wireless standards that specify how wire-less technology works.

Standardization organizations have understood that scoping is required to answer the vast diversity in requirements.




Ad Index









ApplicationEmbedded Software

Network StackEmbedded Software

Wireless TransceiverHardware “Chip”

Figure 1 Basic architecture of a wireless sensor device.


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18 February 2008

soluTions Engineering

Parameter IEEE 802.15.4 BluetoothWireless frequency 2.4GHz / 868MHz / 915MHz 2.4GHz

Data rate 20 kbps up to 250kpbs 1000 kbps

Typical average power consumption 1 micro-Ampere 5000 micro-Ampere

Network size Up to 65536 Up to 8 nodes

Range 30-300ft (10-100m) 30-300ft (10-100m)

Table 1 The main parameters of IEEE 802.15.4 compared to Bluetooth.

Some technology providers have usually taken one or two fields of specialization in their quest to be excellent in a few key areas rather than try to do it all equally well, but not well enough for every in-dividual application. Integrators, OEM companies and users of wireless technol-ogy are further away from the technology and generally are better aware of their own key requirements than of the key re-quirements of completely different appli-cations. Therefore many people are often bewildered by the emerging number of seemingly competing standards.

Hardware, Software and Chips… Oh My!

The vital forces behind standardiza-tion are: interoperability across brands, second sourcing availability, competition between technology providers to drive prices down, compliance with global regulations and the opportunity to tap into a large body of knowledge. But there is more. Some technology components are so expensive to develop that they can only generate an economic return through very high volumes. And when volumes need to be large, the presence of a global market is paramount. Standards are an excellent

vehicle to generate global awareness and to prepare for such a global market ramp-up. The basic architecture of a wireless sensor system consists of three layers, as depicted in Figure 1.

The lowest block in the architecture, the wireless transceiver, is required to translate digital information (the bits and bytes) into a wireless electromagnetic sig-nal that has the right format to be broad-cast by the antenna at the transmitter-side and be reconstructed at the receiver end. In previous generations of wireless tech-nology, you either had a transmitter for transmission only, or a receiver that was only capable of reception. Nowadays, technology has shifted to combined recep-tion and transmission devices as it enables powerful concepts that improve reliability and performance.

A straightforward example is the ac-knowledgement principle: when the re-ceiver successfully receives a message, it sends an acknowledgement to the original transmitter in order to confirm correct re-ception. Without this principle, the trans-mitter has no way of knowing whether the message ever arrived. Consequently, transmit- or receive-only technology is considered unreliable and obsolete.

The Wireless Transceiver chipChip manufacturers need high vol-

ume sales to generate meaningful return; high volumes require global markets; and for a global market to take off, technol-ogy history has shown that the existence of a standard is essential. This was true for Wi-Fi (wireless Internet), technically termed IEEE 802.11 (a/b/g/n/…). Blue-tooth chips are based on a standard de-fined in the IEEE 802.15.1 specification. For sensor networks, the IEEE 802.15.4 (a/b) standard was set up in 2003. The fact that all three mentioned technologies were standardized under the wings of the same organization, the IEEE, proves that they were conceived for different purposes and not to compete with each other. Indeed, Wi-Fi was conceived as an alternative to wired Ethernet PC communication: high data rate networks with a base station at the center and PCs nearby (i.e., a star-net-work topology). In order to achieve the application requirements Wi-Fi consumes a fair amount of power—usually sourced from a laptop battery—and data rates de-grade quickly when the distance to the base station increases.

Bluetooth was conceived with the mobile phone as the center of the universe: it connects the phone to an earpiece, to a GPS device and to a laptop. The Blue-tooth data rate of 1 Mbit/s is large enough to carry voice, but is at least one order of magnitude smaller than that of Wi-Fi. In return, the power consumption is lower, most often sourced from a mobile phone battery. In general, the communication range is also smaller than that of Wi-Fi, which is perfectly compatible with the ap-plications as the phone is usually in the vicinity of the earpiece, the laptop and the GPS device.

Sensor applications have totally dif-ferent requirements. Power consumption is probably the most apparent difference: sensors often have to work for years on a coin cell battery or on energy harvested from the environment through a solar panel or a vibration harvester. The bat-tery cannot be recharged like a laptop or a phone battery. Other sensor-specific ap-plication requirements are related to au-tomatic network organization, reliability, communication range, the large number of nodes to be supported in a single net-

Application

Network Stack

Wireless Transceiver

ZigBeeResidential

ZigBee ProCommercial

ISA-100

Wireless HARTIndustrial

IEEE 802.15.4

Figure 2 A view of the most prominent wireless sensor network stack standards.

February 2008 19


work, etc. In return, a lower data rate is generally acceptable because most sen-sors generate fairly small amounts of data and not even continuously.

For wireless sensor transceivers, the dominant standard and probably only real standard is the IEEE 802.15.4 specifica-tion. The first version was ratified in 2003, with an update in 2006. Several vendors offer transceiver chips. Some of them are a minimal implementation of the stan-dard. Others offer add-ons that are use-ful in some application segments, such as GreenPeak’s own GP-2000 transceiver, which has many power reducing features targeted toward coin-cell and battery-less applications.

There have been efforts to use Blue-tooth and Wi-Fi for sensor applications. In those cases, Bluetooth and Wi-Fi were used in a non-standard way, weaving the principles of IEEE 802.15.4 in their native implementation. Today it is widely ac-cepted that the IEEE 802.15.4 offers the best basis for wireless sensor applications. Table 1 compares the main parameters of IEEE 802.15.4 and Bluetooth.

Besides the IEEE 802.15.4 standard, a number of technology suppliers have chosen to build a proprietary transceiver. The main motivation seems to be a reduc-tion of the complexity and thus a potential lower cost point. It remains to be seen if a proprietary solution will ever reach suf-ficient volumes to actually reach that the-oretically lower cost point. Additionally, reducing the complexity automatically goes hand in hand with sacrificing perfor-mance and thus limiting the applicability.

The Network StackIn essence the network stack has two

responsibilities. First, it forms and main-tains the network. An important consid-eration in wireless network stack design is the ability to cope with the constantly varying quality of the wireless links be-tween nodes. For example, in a building automation application, people moving around with their mobile devices have a formidable effect on the link quality, be-cause when a person stands in between two nodes, the link quality will reduce drastically. So the network stack needs to take into account that links can disappear at any moment, possibly isolating a net-

work node or even a whole branch of the network. In response, the network stack needs to re-organize the communication routes through the network by establish-ing new links in order to provide unin-terrupted connectivity to all parts of the network.

The other responsibility of the net-work is to ensure that messages can travel from a source node to a destination node in a reliable and efficient way. Efficiency here

means that latency requirements—that is, the travel time of a message—should be met and that bottlenecks in the routing of messages need to be avoided.

The broad application space has widely varying requirements and thus calls for flexibility in the communica-tion technology. Hardware alone cannot offer this flexibility. The network stack comes to the rescue here, because a large part of it is generally implemented

www.elmabustronic.com

20 February 2008


in software. And software, as compared to hardware, does not have as high an up-front investment cost, meaning that a software investment can live with lower volumes than hardware and still lead to a healthy return.

The consequence of these econom-ics is that today we see several Network Stacks standardized, some of them in progress, others already completed. All the current standards build on top of the

IEEE 802.15.4 specification. In other words, these standards assume an IEEE 802.15.4 foundation and sit on top of it (Figure 2).

The Impact of the Zigbee Alliance

The ZigBee Alliance is an indepen-dent standardization organization that is driven by a large group of technology providers and OEM companies. The most

recent milestone the alliance achieved at the end of 2007 was to finalize the specifi-cation of two Network Stacks: the ZigBee Network Stack and the ZigBee PRO Net-work Stack.

In essence, ZigBee PRO is a superset of ZigBee, adding functionalities related to the ability to scale up the network size and to better cope with wireless interference from other technologies. From a usage point of view, the ZigBee Network Stack is very suitable for residential “home” ap-plications, where home networks typically contain from tens to a few hundreds of devices. The ZigBee PRO features make it especially suitable for larger applica-tions, very often in the commercial build-ing space. The drawback of ZigBee PRO versus ZigBee is that the extra features require a larger program memory size, which automatically translates into higher cost. In the extremely cost-sensitive con-sumer market, every extra cost limits the likelihood of adoption. However, thanks to the ever-decreasing cost of silicon, we predict that in the short term the cost dif-ference between ZigBee and ZigBee PRO

Feature ZigBee ZigBee PRO ISA-100 Wireless HARTTransceiver technology IEEE 802.15.4 IEEE 802.15.4 IEEE 802.15.4 IEEE 802.15.4

Support for wireless mesh routing

Yes Yes Yes Yes

Ability to cope with very large networks

No Yes Yes Yes

Latency determinism No No Yes Yes

Reliability determinism No No Yes Yes

Built-in security features

Yes Yes Yes Yes

Table2 Comparison of the major features of ZigBee, ZigBeePRO, ISA-100 and Wireless HART.

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February 2008 21


will be negligible and that most applica-tions will adopt ZigBee PRO.

Although the ZigBee Alliance does not explicitly rule out industrial applica-tions, a number of large industrial automa-tion companies have identified the need for extra features, which are not on ZigBee’s top priority list. The two most important “Industrial” features are deterministic la-tency and deterministic reliability.

Latency is the time a message needs to travel from the source to the destina-tion. If the source is a PLC and the desti-nation is a machine, it is easy to see why tight control over latency is important. That is why the standards that explicitly target industrial automation exploit the IEEE 802.15.4 feature called Guaranteed Time Slots to offer latency determinism. In different words, the IEEE 802.15.4 has a feature that allows better control over when a message will arrive. Guaranteed Time Slots are not exploited by ZigBee.

The second most visible add-on in industrial automation standards is related to reliability. Reliability is related to the availability or absence of a communica-tion path between two wireless devices. The most important enemy of reliability is wireless interference coming from other users of the same frequency band. The most notable interferers for IEEE 802.15.4-based devices that operate in the 2.4 GHz frequency band are Wi-Fi transceivers. Most interferers will not fully block out an IEEE 802.15.4 device, but will cause some wireless packets to get lost, regardless of the network stack operating on top of it. The industrial standards provide a mechanism that al-lows packet losses to become evenly spread out over time, even if the num-ber of lost packets does not substantially decrease. The result can be called deter-ministic reliability.

ISA-100 and Wireless HARTISA-100 and Wireless HART are the

two driving industrial wireless automation standards. ISA-100 is the brainchild of the Instrumentation, Systems and Automa-tion Society (ISA), a non-profit technical society for focusing on industrial automa-tion. The ISA-100 is expected to deliver a standard specification in the course of 2008-2009.

Wireless HART is not a full industrial sensor protocol but an add-on to the old but very popular HART industrial (wired) bus standard for industrial automation. In essence, Wireless HART provides an al-ternative to the wired message transmis-sion protocol of HART.

As ISA-100 and Wireless HART are fundamentally solving the same problems, they have recently joined hands in an ef-fort to examine whether both standards can be merged into one. In a first version they will most likely not be interoperable and will require a network bridge to inter-face. A follow up version might define a common language.

The advantages of the industrial stan-dards are not totally meaningless in com-mercial building automation, but probably not essential to it either. At the same time the industrial standard features add sub-stantial cost, which residential and com-mercial application are not likely to accept as these markets are typically much more cost-sensitive than industrial applications. Table 2 lists some of the features of the standards discussed.

Proprietary Wireless Technology

As in all fields of technology, there are proprietary wireless sensor technologies. We define proprietary as a technology that is dominated by a single company. Propri-etary does not mean that the specification is not open, because sometimes it is. But a single company still controls the direc-tion of the technology, effectively leading to a monopoly. Proprietary standards have often been designed around a single or limited set of applications. In practice, a proprietary technology can develop much faster than a technology standard because there is no need to reach consensus among different companies. Quite often the pro-prietary standard can be technically supe-rior to standards when used within their limited set of target applications. Con-versely, it is uncommon that a proprietary technology is able to address the broader space of applications that a standard ad-dresses.

The two most notable proprietary technologies in wireless sensor commu-nication are Zensys’ Z-Wave and Cornis’ Wavenis. Z-Wave is targeted at residen-

tial automation, as exemplified by the support of a maximum of 237 nodes. This number is sufficient for homes, but is not suitable for larger commercial installa-tions such as hotels and office buildings. Wavenis has generated traction in Auto-matic Meter Reading applications, and is currently being marketed for other appli-cations as well.

Recent DevelopmentsEven within the boundaries of stan-

dards, technology providers discover dif-ferentiation opportunities. As an example, GreenPeak has provided Transceiver and Network Stack technology compliant to the IEEE 802.15.4 standard and with ad-ditional functionalities for ultra-low-power applications. An ultra-low-power applica-tion is an application that is able to live off a coin-cell battery or off energy harvested from the environment through a solar cell, a vibration energy harvester or any other environment energy converter.

Another evolution that is likely to appear soon in standards is low power routing (LPR). In an LPR network, bat-tery powered devices are able to receive messages from nearby devices and for-ward these further down a longer com-munication chain. Standards offer this functionality only for mains powered de-vices, because a device is required to be in a continuous listening state, consuming a significant amount of power. LPR adds a time synchronization mechanism to the network, allowing devices to wake up si-multaneously to initiate communication, avoiding the need to be always on.

GreenPeakZele, Belgium.+32 52 45 87 20.[www.greenpeak.com].

OPTIMIZING

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mobile and Portable Power

mAnAgement sYstems

February 2008 23

inDusTRy Insight

moBile PoWer mAnAgement

Today’s mobile and handheld systems continue offering more features and subsystems and are demanding more sophisticated power management to extend battery life and offer con-venience to the user. Modular software and microprocessor control add features and flexibil-ity for mobile power management.

by Kim Rowe RoweBots Research

Power management systems have always ranged in size for portable applications from the human-man-

aged Apollo systems to cell phones and BlackBerry devices we see today. The next generation of mobile and portable devices—including portable computers, tools and robots along with cell phones, video games and even hybrid cars—is being designed with ever-increasing de-mands for longer operation, longer battery life, higher performance output, less heat-ing and greater energy density.

Mobile applications are at various phases of maturity and offer a range of challenges depending upon their maturity. Cell phones are mature and their issues are well understood. They can operate in a standby mode that has a small draw with components powered down and automati-cally started as required. Off-line chargers (chargers that use 230/120 AC power at 50/60 Hz) work as detachable accessories for these and other applications. Other well understood applications include: portable tools, portable video game players, medical devices and many other applications.

Newer and less understood applica-tions are generally from the fields of ser-vice robotics, field robotics, telecommuni-cation systems and hybrid vehicles. We’ll be looking at some of the newer areas of

energy or mobile power system manage-ment with particular attention paid to mo-bile robotic applications.

System Features and SizeThe two key variables in the area of mo-

bile power management systems are: system size and level of isolation. Graphing appli-cations on the grid in Figure 1 offer instant insight into the demands of the management system and the complexity of the system.

The trends in these applications are readily apparent. All systems appearing in the left half of the figure are generally driven by primary or secondary cells (re-chargeable batteries) and have some local logic to control power management—not a full communication system. Recharging is always done off-line as a secondary ac-tivity, and power management complexity is limited to powering down into a quiet mode or powering down subsystems that are an integral part of the electronics.

The systems on the right half of the figure have networks and internally distrib-uted power control among the subsystems. Complete subsystems are managed over the network, and subcomponents of the sub-systems are managed locally. Most of these systems share a single battery source.

All systems on the top half of the figure have some type of accompanying

charging system, typically either solar, hydrocarbon based, mechanical or nu-clear. Sometimes sensor arrays run with primary cells (not rechargeable) and are completely disposable devices.

All systems on the bottom half of the figure live in friendlier environments and don’t need separate fueled charging sys-tems. They rely upon off-line charging in the case of systems with rechargeable or secondary cells and on battery replace-ment of primary cells.

Common Power Management Features

Additional features of these systems are software driven and are best catego-rized into deterministic functions or those functions which are repeatable, remote con-trol functions, remote reporting functions, self-correcting functions, supply sharing functions, safety features and diagnostics.

Deterministic functions include the generation of a sequence of events and the recognition of events. The generation of events includes features like soft start, start sequencing of supplies and restart on error. Recognizing events includes features like failure prediction, advanced power-down conditions, data logging and how many restarts or retry events are used before re-porting errors and shutting down.

mAnAgement sYstems

24 February 2008

inDusTRy Insight

Remote control functions allow a sup-ply to be remotely controlled and moni-tored. This includes coordinating the ac-tion of multiple supplies, setting voltage and current limits and shutdown sequenc-ing. Remote reporting functions include reporting variations in current, voltage and temperature as well as calculated values like efficiency, power and power factor.

Self-correcting functions include temperature compensation of the voltage reference, calibrated output values, tem-perature-driven current limits and cur-rent-driven feedback selection (hysteresis limits). Generally they also include charg-ing features like battery charging temper-ature and voltage monitoring and battery charging management.

Supply sharing features are those fea-tures that allow a supply to be shared be-tween two pieces of electronics. This can re-duce weight and components if the features never work simultaneously. This would include turning each application on and off as well as managing the power supply to fea-ture mapping to have overall control.

Safety features that are generally in-cluded are a watchdog timer, brown-out control, low voltage detection and an oscil-lator fault for the control processor. Other safety features would include careful moni-toring of battery temperature, voltage and current with automatic shutdown.

Diagnostics are a main feature that may or may not be included depending upon the application. Big networked ap-plications require this while smaller ap-plications do not.

System ArchitecturesToday, all of these architectures look

very similar with the exception of various hybrid vehicles. This basic architecture is shown in Figure 2.

The charging subsystem is either in-tegral in the case of harsh environments, or detachable in the case of more friendly environments. Friendly environments are powered off-line and harsh environments are powered with a variety of different sources that can travel with them.

By raising the bus voltage under careful control, the charging system can reverse the flow of energy from the batter-ies and recharge them. This is a complex and demanding task that depends upon the type of batteries, discharge levels, cell voltages, charge current, charge voltage and a variety of other factors. For that rea-son, charging subsystems of this nature are always run by a microcontroller. The demanding communications requirements and sequencing also require a real-time operating system to manage complexity.

The battery subsystem is generally quite simple. In some cases, special pro-

tection must be included to avoid degas-sing or venting of batteries and voltage surges (regeneration for example). Large choppers are required in these cases to reduce voltage and protect the batteries against damage. Sometimes a secondary cell is included as a backup. This allows the bias supplies to be run from a second-ary source and provides greater reliability through redundancy and guaranteed sys-tem control.

The power buses can be redundant or not and can offer separate buses for bias supplies or not. There is a great deal of flex-ibility here depending upon the application.

The communications bus or buses can use a range of protocols and wiring. Common options include: CAN, I2C, TCP/IP, UDP/IP, asynchronous serial I/O, SPI, USB and others for larger systems. Smaller systems use direct control of sub-module supplies via the microcontroller.

Larger systems achieve a greater de-gree of reliability by providing distributed operation and not directly coupling all the power modules. Overall, one microcon-troller is required to run one power mod-ule due to sensing and other limitations. Multiple power modules require multiple microcontrollers—each module with one controller and each with a separate com-munication capability. Multiple master operation is a good idea to avoid a single point of failure.

Real-Time OS Software Architecture

In a power management system, each component needs a microcontroller and each microcontroller may or may not use a real-time operating system (RTOS) to provide the different software features, run the PID loop to control the power sup-ply and provide communication facilities.

An RTOS has a few major advantages that make it superior for developing a power management product, particularly if you are developing multiple manage-ment systems for different applications. The main advantages are:

• modular approach, which eliminates retesting and rework

• independent off-the-shelf communica-tion servers

• off-the-shelf timer support• integrated development tools• synchronization ability

Harsh

Friendly

LargeSystems

SmallSystems

Spacecraft

Cars

Field Robots

Self OrganizingSensors

Video

Toys

Cell Phones

Service

TelecomSystems

Figure 1 Mobile systems are very diverse in their application and their operating conditions, often resulting in vastly different requirements for power management.

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• nested interrupt capability• resource management• standards-based to eliminate training

With this RTOS approach, threads can be developed to provide specific fea-tures. For example, all diagnostics could be provided in one thread and only used for those designs that have the space and need for these diagnostics. The overall architecture of DSPnano, which provides these features, is shown in Figure 3.

The other main advantage of the thread-based approach is that it supports nested interrupts without special coding and allows most of the functionality to be moved from the interrupt service routines into the threads where resources can be more easily controlled. The net result is a better response time of the system.

In such a system, the main piece of the control is done by a PID loop implemented in a thread that monitors voltage and maybe current in some applications and computes new PWM parameters. Depending on the power supply, this thread will control the configuration of the PWM outputs to drive

the various transistors and/or gate drivers in the design. Different conditional com-pilation or completely different selectable threads can be used to provide a broad set of configurations to the power supply de-signer as off-the-shelf modules.

Various state machines, self-correcting features, advanced power down and soft start features could be included with this thread to provide a diverse set of features. The limi-tations of such a system are small, allowing complete reconfiguration by the designer to meet a broad spectrum of power supply to-pologies and features discussed herein.

Another selectable thread will be the I/O module. A broad set of off-the-shelf I/O is available, and by using an RTOS-based design the user could easily select between UART, SPI, TCP/IP, Ethernet, USB, CAN and I2C without changes to their application program. All could be done with minimal resource requirements and standard I/O interfaces.

Another additional and optional thread could be an LCD display. Standard high-level C calls could be used to open the device, write to the display and close

the device. Status updates could be pro-vided. Additional features could provide touch-sensitive operation and menu sys-tems for user interaction. A full range of communication is possible with this sup-ply and other supplies. Startup sequencing becomes a matter of timely communica-tion between the various supplies using one of the standard I/O servers or another mechanism that the designer chooses.

Other modular thread-based features include data logging, predictive maintenance and failure, power factor correction, and power and efficiency calculations. Of course, all related information can be easily commu-nicated to other supplies and overall control-lers in the system—one of the biggest benefits of an integrated power management system.

Additionally, diagnostics and safety fea-tures can be added both within modules and in separate threads. This allows the designer to easily configure supplies to make a range of features available easily with full line pricing. Because features are almost entirely software based, simply adding memory (de-pending on the feature) and changing a con-figuration is enough to extend the design and provide greater benefits to the customers.

Today, advanced fully digital power management systems with tiny real-time operating systems like DSPnano offer the most modular, lean product development-based approach to portable power system design and maintenance. Modular features eliminate testing and fit with full line supply development with software-based features rather than hardware-based features.

RoweBots Research(519) 208-0189.Kitchener, On, Canada.[www.rowebots.com].

Communication Buses

Module 1

Module 2

Module 3

Module N

Power Buses

RechargeableBattery System

Backup Cell

Charging Subsystem

Charge Engineor Line

...

Power Management System Architecture

Figure 2 A power management system should be modular with buses for communication and power transfer among modules.

Application

H/W & Interrupt ManagementHardware

DSPexec

DSPnano ServicesDSP Libraries

I/O Servers

Figure 3 Architecture of a software-based power management system.

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Prevalidated Hardware and Middleware Platforms Speed System IntegrationIntegrating complex building blocks for reliable, high-availability network services can be a daunting and costly process. The higher up the integration scale you can start with a pre-validated platform, the sooner you can begin adding unique value and get to market.

by Jim Lawrence, Enea and Sven Freudenfeld, Kontron

Telecommunications applications have been growing steadily with no sign of decline. Network services,

such as IP-TV, social networking and 4G presence-enabled services, continue to drive growth, setting the foundation for a broad spectrum of content delivery plat-forms. For instance, as social networking begins to converge with communications, it will transition from a fun pastime to a valuable business tool providing function-ality such as advanced customer relation-ship management (CRM) capabilities.

While these types of services may seem like luxuries now, they will soon become an integral part of our lives both personally and professionally. This means that the demand to deliver content and provide services will grow very rapidly, placing heavy demands on the commu-nications infrastructure, while requiring significant scalability along with unin-terrupted service availability. Competi-tion is intensifying as network equipment providers (NEPs) and telecom equipment

manufacturers (TEMs) must keep up with time-to-market demands, quality of expe-rience (QoE) expectations and increasing complexity of the network, while focusing on differentiating their applications.

Building a distributed, highly avail-

able and reliable system to deliver these services is a complex and often daunting task, particularly since back-end design is increasing in its complexity. Design-ing the entire system in house is no lon-ger a realistic use of resources nor is it a cost-effective option. Instead, developers are looking to a commercial off-the-shelf (COTS) approach that is driven by stan-dards in order to accelerate and take some of the risk out of the development cycle and ultimately meet delivery schedules.

By using COTS building blocks from the hardware computing platform up to the operating system (OS), High-Avail-ability (HA) middleware and certain pro-tocol components, NEPs and TEMs are given the fundamental elements to create a carrier-grade platform. The benefits of a carrier-based platform with a true open architecture foundation are realized in the form of highly differentiated products that are scalable. This frees up valuable engi-neering resources that can then be used to design applications that add value to and reduce the time-to-market of more inno-vative services.

Integrating all of the complex build-ing blocks is essential and can provide a




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Building Blocks

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Figure 1 Integrating the complex building blocks in today’s platforms requires sophisticated and complex standards to glue them all together.


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number of unique technical challenges. As a result, straightforward integration management that has been validated and tested is rapidly becoming a neces-sity. The SCOPE Alliance has defined a reference architecture for a generic Car-rier-Grade Base Platform (CGBP). This architecture, which includes hardware, operating system, operations and mainte-nance functions and tools, also specifies middleware as a fundamental component for service availability. As CGBP build-ing blocks become commoditized, the industry cooperates in many initiatives to specify and implement an open architec-ture. In addition, SCOPE creates profiles for The Service Availability Forum (SA Forum), the main organization active in the middleware standardization effort.

The SCOPE Alliance has also pub-lished the ATCA profile, which provides guidance for a common platform to cre-ate carrier-grade platforms that fulfill the needs of NEPs and their customers, the service providers.

The ATCA Building BlockThe advent of AdvancedTCA

(ATCA), the first standardized hardware platform to meet carrier-class require-ments, provides the hardware building blocks and flexibility to integrate complex high-performance systems from off-the-shelf components. Processing capabilities and available bandwidth increase with multicore processors while maintaining a

smaller footprint and lower power perfor-mance than were achievable in past rack-mount configurations. Manufacturers who take advantage of the latest multicore pro-cessors in these COTS form-factors will be able to build faster, more scalable sys-tems without upgrading the framework or increasing floor space. Combining ATCA blades with Advanced Mezzanine proces-sor Cards on a carrier-grade, standard-based platform allows network manage-ment to take place entirely on one ATCA slot on the ATCA switch blade, relieving the bandwidth from the fabric and maxi-mizing the footprint of the overall system. Delivering reliable high-performance so-lutions that scale with the demands of the market is quite promising with such ad-vancements.

Selecting the appropriate hardware to support a given set of communications protocols and applications is just the be-ginning of the engineering workload asso-ciated with launching a new carrier-class platform. Along with the robust, highly intelligent, high-availability and reliable hardware components provided by ATCA also comes a degree of complexity in the details of virtually every facet of the sys-tem. Besides the standards-based COTS system management building blocks, there are a number of other elements that must all work together seamlessly (Figure 1).

System design engineers must also in-tegrate the associated OS and in some in-stances the Board Support Package (BSP)

Applications

Core Services - OSAL, Messaging, Debug, Log, Monitor

Operating System

Hardware Platform

SystemManagementHW Discovery,

Resource Mgmt,Event/Alarm,

Management I/F

EmbeddedManagementProvisioning,Monitoring,Accounting,Thresholds

High AvailabilityFrameworkFault Mgmt,

Checkpointing,Hot Upgrade

API Change Mgmt

HighAvailbility

Middleware

Figure 2 Overview of high-availability middleware.

with the associated supporting drivers for the components on the board or system, and develop middleware to integrate the hardware with the application reliably. The management capabilities for all the hardware, fabrics, software and system components are quite sophisticated, and experts knowledgeable in the complex standards are required in order to pull all the building blocks together into a cohe-sive system. Robust operating systems are necessary to maintain dependable systems in high-availability environments, allow-ing for continued service with an interface to the user base that allows the specifics of the hardware to remain transparent.

The Daunting Task of Integration

While the benefits of using the ATCA standard are many, it still requires a cer-tain level of integration effort that can take from 6 to 12 months to make sure all the building blocks work seamlessly together. In addition, integrating the hardware plat-form can require a great deal of support in the form of program management, func-tional experts, quality assurance, tools and deployment support, all of which adds up to a tremendous amount of precious per-sonnel, time and money resources.

To begin with, integration efforts are on different levels starting from interoper-ability on the hardware level when using multiple sources for the system compo-nents. There are also the considerations of thermal, mechanical, fabric connectivity and IPMI interoperability. This first in-tegration task can become quite complex. Having all the tools to perform this task is already a significant investment not to mention the engineering time to perform that validation and integration. When integrating multi-sourced standard com-ponents, further challenges arise when it comes down to identifying which “ven-dor” is at fault when problems occur.

The next level of integration requires that the preferred OS is working and sup-ported on the desired blades and might require an additional validation effort. Validating the manageability within the system can be a major undertaking. Even by using standards-based components, the system management (middleware), HPI

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and shelf management all need to be vali-dated as a cohesive management unit. Even if the components are designed based on standards or a recipe, every vendor may have a different method of implementing it. For a product to be successful, it needs to be a complete solution with hardware, middleware, OS, etc. Integrating all these elements is a year’s worth of intense work, which can be a time-consuming and costly task for a systems provider.

The following outlines an example of the cost associated with resources and lost revenue due to incremental time-to-mar-ket in a real-world network application developed in house:

From the initial procurement phase (which in-volves component selection, procurement and learning curve) to carrier-class integration and validation of the hardware platform, to deploy-ment support (including debug and component upgrade), the incremental time-to-market can add up to over 700 days. The lost revenue due to this delay can add up to a loss of $1 Mil-lion for every month not in the market, which totals to an astounding cost of nearly $24

Million. Within this, the portion associated with just developing the custom middleware to meet the requirements can total up to more than $500,000. Whereas, the build and vali-date portion can add almost $250,000.

The Emergence of MiddlewareEven given the difficult, detailed and

time-consuming nature of pulling the pieces of the platform together, embed-ded system companies should not be dis-couraged from developing ATCA-based carrier-class systems. In fact, the rapid middleware ecosystem growth provides new opportunities for realizing fully inte-grated carrier-grade base platforms. The SCOPE Alliance and SA Forum’s speci-fications and guidance to TEMs is begin-ning to gain recognition for the portability, interoperability and increased innovation they enable. Standards-based middleware provides TEMs with off-the-shelf high-availability software to complement its carrier-grade equipment (Figure 2).

Frequently there is a lapse between the availability of the hardware and the

date that it is possible to deploy applica-tions due to the schedule cost of the back-end software development. This gap can be filled with middleware platforms that provide chassis management functions, interprocess communications and services that are scalable from deeply embedded to large, complex systems.

Partnership with a Viable Platform Integrator Is Key

TEMs can realize significant time-to-market, reduced risk advantages by part-nering with proven hardware and middle-ware experts that can provide integrated, validated and tested platforms.

When choosing a viable platform in-tegration partner, developers should make sure the system is clearly defined in terms of well-defined hardware and middleware with the operating system. The complex-ity of the undertaking requires purpose-driven integration. One must be aware of program management and risk mitigation capabilities along with a clear assessment of the amount of resources, including the

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availability of functional experts. In addi-tion, evaluate the availability and capabili-ties of development, test and measurement tools for quality assurance.

A solid technical agreement to fully support the integration initiatives and to resolve issues of technical incompatibil-ity quickly is essential. In establishing the value of integration on the system, remember that time-to-market is not a trivial amount. Factors to be included are customer consulting and end-point inte-gration and 24/7 deployment support. In order to deploy, compliance certification expertise, e.g. NEBS Level 3 certification, is required.

It is important to realize that al-though there are a number of middleware solutions available, not all have been pre-validated and tested to work with a spe-cific hardware platform. Pre-integrated open modular platforms take much of the guesswork out of system operability and reliability. The availability of open system solutions and open architecture middleware platforms make it possible to integrate essential services without be-ing a technical expert in communications. This is especially the case when the NEP or TEM collaborates with hardware and middleware suppliers from an early stage in the design process to understand the goals, implementation and operation of the system.

As an example of such a partnership, Kontron and Enea have jointly developed an ATCA Gigabit and 10-Gigabit system pre-integrated with the Enea Element middleware platform to offer a reference platform for telecom equipment manufac-turers who want to accelerate the develop-ment of content delivery systems.

Element serves as an example of a suite of middleware services that sits between the operating system and applications. It provides core services for synchronizing, instrumenting, monitoring and establish-ing communications between applications spread across multiple operating systems and processors. Any such suite of services should include:

• Shelf ManagementThe shelf management segment of the

middleware is responsible for orchestrat-ing the power-up sequence of all the com-ponents in the chassis, which are sensed and tracked.

• System ManagementMaking use of the shelf management

implementation, the system management software will monitor all the hardware re-sources as a single cohesive system. The system management software handles configuration management, administra-tive tasks and provisioning for all the re-sources.

• Interprocess CommunicationServices provided by standard oper-

ating systems are insufficient for complex telecommunications applications. Utility libraries, interprocess communication and synchronization are tools available as a natural extension to multiple operating systems regardless of hardware and pro-cessing environment.

• Event Logging and Application Moni-toringEvent logging and application moni-

toring services make it easy for developers to instrument their applications, greatly increasing visibility into system opera-tion. Event logging enables application processes to log and report event and state information such as slot/service availabil-ity, diagnostics and critical network events such as alarm conditions.

• High-Availability Framework (HAF)The HAF delivers all of the services

required to build a true non-stop comput-ing platform. It provides full fault man-agement, including monitoring, detection, recovery and reporting, for every resource in the system. It also employs active heart-beat monitoring and reactive error detec-tion schemes to ensure the health of key hardware and software components at the system, slot and application levels.

It has become a complex and labo-rious undertaking to build a distributed, highly available and reliable system to de-liver network services. Developers of tele-communication equipment have found the COTS approach crucial in reducing risk and accelerating time-to-market. By tak-ing advantage of COTS building blocks that include the computing hardware up

to the operating system (OS), High-Avail-ability (HA) middleware and components of the protocol, NEPs and TEMs are able to create a carrier-grade platform. How-ever, integrating all these elements can take a year’s worth of intense work, which can be a daunting task for a systems pro-vider.

An out-of-the-box integration with middleware can deliver a complete con-trol, management and data platform. Buying a market-tested product ensures greater operational flexibility and takes foreseeable hardware, software and appli-cation upgrades into account.

Instead of rushing to modify the middleware for an altered application in house, the equipment manufacturer can trust a pre-integrated system and COTS software tools to ensure the application integration is seamless. When it comes to deploying a new system, the bottom line is worth extra investment to work with experienced manufacturers. With collab-orative system design that is implemented properly, NEPs and TEMs can realize faster time-to-market, the ability to ramp-up new applications quickly, reduction of resources in terms of engineering and cost, proven platforms and services, and reduction in the number of man-hours to implement middleware on hardware plat-forms.

EneaSan Jose, CA.(408) 383-9480.[www.enea.com].

KontronPoway, CA.(858) 677-0877.[www.kontron.com].

Untitled-2 1 2/15/08 10:55:23 AM

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No Processor Is an Island: Developing Multiple Processor Systems with the “New” CORBABy enabling system-level architects to describe functionality in multiple processor systems as if it were all implemented on a single processor, CORBA allows greater architectural flex-ibility, especially since functionality is never locked into a particular implementation.

by Joe Jacob Objective Interface Systems

Open up the simplest consumer de-vice—cell phone, MP3 player, etc.—and you will see a dizzying

number of chips, each performing a spe-cific function. The model that you buy today will be replaced in six months, by a new model that is smaller, lighter and packed with more functionality. Like a mouse on a wheel, embedded program-mers are constantly running to make the complex simple, with a due date of yes-terday.

As embedded systems evolve to sup-port an ever-greater number of functions and capabilities, an increasing number of designers are turning to multiple proces-sor architectures to achieve their perfor-mance, power, cost and time-to-market goals. Today’s embedded systems are no longer stand-alone, single-processor ar-chitectures that can be neatly controlled by a single team using a single develop-ment environment. In many cases, these architectures are a heterogeneous mix of single and multicore general-purpose pro-

cessors (GPPs), digital signal processors (DSPs) and field programmable gate array (FPGA) processing components.

Further complicating design is the need for overall system flexibility. Not only do designers need to be able to repartition functionality between process-ing components to resolve bottlenecks and maximize efficiency, they also need mechanisms in place to enable them to quickly and effortlessly take advantage of future innovations in processors, operat-




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ing systems and application-specific algo-rithms for next-generation designs.

Effectively developing the architec-ture of these new multiple processor sys-tems—as well as the applications that span them—requires a new approach to system design. They must be treated as small net-works unto themselves. System architects need an efficient and reliable communi-cation infrastructure, commonly referred to as middleware, in order to pass data between processing components. While

Waveform Control

DSP Functions- MOD- FEC

CORBA

CORBA

CORBA

CORBA

ADCDAC

FPGA DSP GPP

FPGA Functions- Channelization- DSP

GPP Functions- SCA OE- MAC

Figure 1 CORBA provides a common communication framework between software components in a system, in effect abstracting the actual hardware implementation and enabling different components of a system to communicate with each other—independently of how and where functionality is actually implemented. In this illustration, design of waveform control for a SCA-compliant Software Defined Radio is simplified since functionality can be migrated between processor components at any time in the design cycle.


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at first glance it may seem like a straight-forward process to design and implement an efficient communication infrastructure specific to an application, doing so can ac-tually place unnecessary and undesirable long-term constraints on a system.

Every time you repartition function-ality, you will need to redesign multiple custom interfaces as well. When the time and effort needed to adjust communica-tion interfaces manually becomes too high, the overhead involved can exceed the value in performance gained by repar-titioning. Consequently, you lose the per-formance benefits of optimizing your sys-tem through repartitioning.

Standardizing the Communication Framework

The Common Object Request Broker Architecture (CORBA) standard was de-veloped to provide a common communi-cation framework between software com-ponents in a system. By abstracting ap-plications, hardware components and the interfaces used to communicate between them, CORBA enables different parts of a system to communicate with each other, independently of how and where function-ality is actually implemented (Figure 1).

For example, consider a military ra-dar application that needs to process a high-speed signal. From an application perspective, what matters is the resulting signal, not whether it has been processed by a DSP or FPGA or both. CORBA en-sures that the appropriate signal and sig-nal processing workload are moved as ef-ficiently as possible to the DSP or FPGA (or both) without requiring involvement from the application or developer. This is made possible through the use of a stan-dard interface.

As important as making sure func-tionality can be moved to a DSP is the abil-ity to easily and efficiently remove from the DSP all the tasks that might interfere with its optimal performance. Thus, this same standard interface enables system archi-tects to further break down large partitions into several smaller ones. It now becomes both possible and simple to divide an algo-rithm initially assigned completely to one processor to multiple different processors, e.g., GPPs, DSPs and FPGAs. This further maximizes performance, minimizes la-tency and reduces system cost.

Flexibility of this magnitude is es-sential at the system level. System archi-tects can then migrate logic transparently to optimize an architecture in many dif-ferent ways, depending upon the applica-tion’s requirements. Voice applications, for example, may implement voice pro-cessing on a DSP with signaling handled by a GPP. Various stages of a video pipe-line such as color correction or scaling can be interspersed back and forth be-tween a DSP and an FPGA. When the cost of repartitioning is minimized, sys-tem architects can test out more parti-tioning and processor options to achieve the optimal system architecture.

CORBA for Multiple Processor Applications

CORBA was originally created for enterprise applications by the Object Management Group (OMG), which is currently comprised of more than 800 companies. CORBA’s value in the devel-opment of any complex architecture has been recognized for quite some time, and in 1999 Real-Time CORBA was released. In 2006, the OMG approved CORBA for embedded applications (CORBA/e). CORBA/e was specifically designed for real-time and embedded systems that

ADCDAC

CustomBridge

ORB

DSP

CustomBridge

ORB

GPP

FPGA

CustomBridgeFPGA

CustomBridge

Transport

Custom FPGA Bridges in a CORBA System

Before:

Figure 2 Specialized interfaces require substantial engineering resources to design and bind your system to your partitioning choices, even as bottlenecks and other inefficiencies become apparent.

require a small memory footprint and predictable, deterministic execution be-havior. CORBA/e also provides a flexible architecture capable of supporting dis-tributed processing. Commercial ORBs are now available that have been built from the ground up with very small foot-prints and high throughputs for real-time and embedded systems.

CORBA/e is primarily for GPPs and DSPs, which means that it only provides two-thirds of the answer required for today’s multiple processor systems. For-tunately, CORBA continues to evolve to serve all three processing platforms, en-abling them to communicate efficiently. Through committed industry support, the capabilities of CORBA have been carried over to FPGAs.

Even with CORBA/e, FPGAs have historically been difficult to include in the CORBA framework. Without a communi-cation framework, designers have had to create a custom proxy or bridge interface between the GPP and accelerated func-tions, and the result was that partitioning of functionality quickly became fixed.

FPGA-specific CORBA implementa-tions, however, are now available to rem-edy this problem. With solutions such as ORBexpress FPGA from Objective Inter-

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face Systems, accelerated functions can be contained within a compact CORBA wrapper, which provides the necessary communications framework. Implement-ing CORBA directly in hardware provides the seamless interface between GPP and user-defined blocks necessary to support flexible partitioning of functionality. Ad-ditionally, wrappers are extremely ef-ficient, utilizing only a small fraction of available gates while minimizing latency.

Within each development environ-ment—GPP, DSP and FPGA—the various components that make up the CORBA framework are constructed and tuned to the specific implementation without requiring manual involvement from de-velopers. For example, when components are co-located on the same processor (i.e., two partitions on a DSP communi-cating with each other), there is almost no overhead since all unnecessary ORB mechanisms can be eliminated. It is im-portant to note that even when compo-nents are located on different processors, ORB overhead is often less than that of other communication mechanisms devel-opers might use.

Location Transparency: Optimization through Migration

In order to manage complexity and enable systems to take advantage of new innovations in silicon and software as they develop, many developers are adopt-ing a software-based approach to design. Software Defined Radio (SDR) is an ex-ample of how 100% of signal processing is being defined in software instead of be-ing hardwired in ASICs.

The beauty of substantially defin-ing the system in software is that you can change the physical processing com-ponents of the system without having to modify the software. This brings greater flexibility and efficiency to the develop-ment process.

Because functionality can be mi-grated between processing components, assignment of functionality can be done later in the development process. In fact, even after a system has been deployed for some time, functionality can be reas-signed as new advances in processors be-come available.

Consider the development of a com-plex embedded system, whether a military,

communications, financial, industrial or medical application. First, developers need to prove out the concept, typically using a GPP or workstation. While a GPP is likely not the optimal platform for many of such an application’s functions, the flexibility and rapid prototyping capabilities of the GPP’s development environment make it the fastest way to demonstrate the feasi-bility of a particular design approach.

In traditional development cycles, system architects find themselves forced to partition the various stages of the pro-cessing pipeline to the various processing components. In each case, a specialized interface would be created to connect pipeline stages (Figure 2). Both these in-terfaces and the component-specific im-plementation of the stage require substan-tial engineering resources. As the design progresses, bottlenecks and other ineffi-ciencies will invariably arise, making it clear that other partitioning choices would be more optimal. However, because of the work already invested in this particular partitioning of functionality, it becomes more cost-prohibitive to repartition the system over time. Additionally, reparti-tioning increases time-to-market, threat-ening the timely release of a product.

Through the use of a common and well-defined communications framework such as CORBA, developers are able to more easily manage design complexity in multiple-processor embedded systems be-cause they can abstract the functionality from its actual implementation. After cre-ating a GPP-based proof-of-concept, sys-tem architects are now able to begin opti-mizing for performance or cost-reducing a system by migrating specific algorithms and functions to the processing compo-nents best suited to handle them. Because of the standard communications infra-structure enabled by CORBA, true loca-tion transparency becomes possible and application functionality can, for example, migrate to and from an FPGA at any point in the design cycle. The top-level applica-tion remains unchanged throughout the entire development process as developers address performance bottlenecks through seamless migration of functionality (Fig-ure 3).

Portability of Functionality Many developers make the mistake

ORBexpress

DSP

ORBexpress

GPP

ORBexpress

FPGA

ORBexpress

FPGA

ADC DAC

Transport

Seamless System Integration with ORBexpress FPGA

After:

Figure 3 Through the use of a common and well-defined communications framework such as CORBA, functionality is abstracted from its actual implementation, enabling developers to optimize for performance, latency and cost by moving specific algorithms and functions to the processing components best suited to handle them. Top-level application code remains unchanged throughout the development process as functionality migrates seamlessly between GPPs, DSPs and FPGAs.

February 2008 37

sysTeMIntegration

of focusing on code portability rather than functional portability. Code portabil-ity means that a developer can move, for example, DSP code between processors within the same family or, with substan-tially more effort, between DSP architec-tures. The idea of code portability com-pletely breaks down when considering moving code to an altogether different processor technology, such as from a DSP to FPGA. Yet, this is exactly the level of flexibility that developers require to effec-tively address processing bottlenecks.

For example, it is often the case that a processing pipeline is first proven us-ing a GPP, re-implemented on a DSP, and then further broken down by moving some portion of the pipeline to be imple-mented on an FPGA. Additionally, each of these migrations can occur multiple times as developers discover that they didn’t select quite the right place to parti-tion the pipeline.

Certainly, moving part of a pipeline from a DSP to FPGA will require signifi-cant recoding. However, repartitioning is even more difficult under these circum-stances since a new interface between the new partitioning lines must be created and implemented as well. Each interface is as unique as where the break in the al-gorithm occurs. What ends up happening is that system architects must allocate a substantial part of their constrained engi-neering resources, reinventing and re-im-plementing these interfaces. As interfaces change, so must the software components that use them, resulting in changes poten-tially propagating throughout a system. As a consequence, instead of focusing effort at the application level, developers must spend precious time creating the com-munications infrastructure over and over again, as well as debugging it.

With CORBA/e for GPPs and DSPs and new CORBA solutions for FPGAs, developers are able to focus completely on functional portability. This allows sys-tem architects and other designers to stay focused on what the system needs to ac-complish, not on the minutiae of how it will be accomplished. The use of standard interfaces between software components means that repartitioning an algorithm from one processing technology to an-other does not impact other partitions—an invaluable benefit. Rather than boundaries

between software and processing compo-nents representing a barrier to repartition-ing—because of the additional interface development that will be required—these boundaries can reflect the optimal assign-ment of functions to the best-suited pro-cessing resources. This approach results in a more efficient and flexible architec-ture. Through CORBA, embedded sys-tems can be deployed across platforms without modifying application-level soft-ware. This leads to a higher level of ef-

ficiency and allows the optimization of system performance, latency and cost in ways not previously possible.

Objective InterfacesHerndon, VA.(703) 295-6500.[www.ois.com].

DATA ACQUISITION SHOWCASEFeaturing the latest in Data Acquisition technology

2 Gsps 10-bit ADC PMC Module

192 or 384 MB SDRAM Buffer

Xilinx Virtex 4 FPGA

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VxWorks, Linux, Windows Drivers

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Onboard DMA Engine

Conduction/Convection Cooled

Temperature Versions: Commercial Industrial

Delphi Engineering Group, Inc.Phone: (949) 515-1490Fax: (949) 515-1491

E-mail: [email protected]: www.delphieng.com

Multifunction USB and PCI Data Acquisition ProductsUSB- and PCI-2500 series boards provide true multifunction performance with analog inputs, waveform capable analog outputs, 24 high-speed digital I/O, four counter inputs, and two timer outputs. All analog, digital, and counter/timer I/O can operate synchronously and simultaneously. From $549.

Measurement Computing Phone: (508) 946-5100Fax: (508) 946-9500

E-mail: [email protected]: www.mccdaq.com

Channel Accelerator XCVR 16-bit (130 MSPS)

Dual 16-bit (130 MSPS) A/D converters

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Prices start at $5,840 (LX40-11, no memory)

Red Rapids Phone: (972) 671-9570Fax: (972) 671-9572

E-mail: [email protected]: www.redrapids.com

rtc0802_scv1.indd 1 2/19/08 11:44:03 AM

38 February 2008

XMC/PMCs with x4 sRapidIO Ports and VPX Intelligent I/O Carrier

A new VPX (VITA 46) board enables direct interfacing from a Serial RapidIO (sRIO)-based fabric to onboard devices like PMC and XMC sites, large amounts of SDRAM and the CoSine System-on-Chips. The MM-1200 from VMetro contains dual CoSine System-on-Chips. Each CoSine device is embedded in a Xilinx Virtex-II Pro FPGA. Each CoSine device contains two embedded PowerPC 405GP devices, one Primary DDR array, two PowerPC local DDR arrays and two PowerPC Flash arrays.

The PowerPC processors enable the MM-1200 to be used as an XMC/PMC carrier and memory buffer, as well as a VITA-46-based stand-alone single board computer. In addition to making the PowerPC 405GP processors accessible, each CoSine node also has one multi-ported DDR array, a dedi-cated 128 Mbyte DDR array to each PowerPC processor and FPGA platform flash. The CoSine nodes interface with the two mezzanine sites on the MM-1200 by either an XMC or PMC in-terface.

The MM-1200 can support ei-ther PMCs or XMCs. Using the PMC sites, each PCI bus can operate in 32-bit or 64-bit PCI 2.3 mode at up to 66 MHz or in 64-bit PCI-X mode at up to 133 MHz. Using the XMC sites, the MM-1200 supports the Aurora protocol with four MGTs or Serial RapidIO x4. In addition to having a VME320 2eSST interface, the MM-1200 includes a com-plete onboard Serial RapidIO switch fabric connectivity, with four independent Serial RapidIO ports to the VITA 46 P1 MGT backplane connector per the VITA 46.3 draft standard. Aggregate memory band-width exceeds 3 Gbytes/s per SoC, providing a total of over 6 Gbytes/s on the MM-1200.

Each of the two embedded PowerPCs in each 2VP100 is a fully functional computer. Each PowerPC contains its own DDR array, pro-

FeaturedProducts

grammable flash and UART. The PowerPC processors also share an Ethernet connection. Processors can host device drivers, perform mes-sage passing, service interrupts, or execute floating-point operations.

Each processor includes a complete BSP with all internal SoC device drivers

fully integrated so customers can download application files “out of the box.”

The MM-1200 monitors the temperatures of the CoSine devices and

primary circuit board to ensure proper operation. Status updates can be received by the CoSine PowerPC processors that can then make intelligent decisions, dis-play status to user programmable LEDs, or communicate information over its Ethernet link to remote destinations.

The MM-1200DR is a rugged, ex-tended-temperature, air-cooled board with an operating temperature of -40° to +71°C. The MM-1200DTE is a rugged, conduction-cooled board with an operat-ing temperature of -40° to +85°C. Both the MM-1200DR and MM-1200DTE have been designed for optimal heat dissipation and deployment in environ-ments that undergo severe shock and vibration.

Complementing the MM-1200 is the VCX301, a 3U VPX carrier for XMC mezzanines. The XMC P15/P16 signals are routed to the backplane, which deter-mines the overall system topology. XMCs supporting both P15 and P16 connectors can take advantage of the VCX301’s architecture to route data at up to 5 Gbytes/s. The VCX301 can also be used as a carrier for PMC modules, such as an

FPGA-based I/O module that supports data flow through the P14 con-nector. Although PCI is not supported, the VCX301 provides power to the PMC connector and I/O is routed to the backplane. VMetro Houston, TX. (281) 584-0728. [www.vmetro.com].

XMC Graphics Controller Delivers OpenGL Processing at PCI Express Data Rates

Based on the Nvidia G73M graphics processor, a graphics display control card from Curtiss-Wright controls Embedded Computing, the XMC-710 XMC mezzanine module is the company’s first designed to the new advanced XMC (VITA 42.3) open standard architecture. It is designed for use in VME, VPX and CompactPCI systems. Its rugged small-form-factor XMC packaging, and advanced proprietary features, including unique “video freeze detection” capability, provide system integrators with a quickly integrated high-performance graphics dis-play controller ideal for space-constrained deployed applications and technology refresh opportunities. The card also offers highly integrated software, including Curtiss-Wright’s Graphics Software Suite (GSS) and Seaweed System’s Seawind/GL/GN /GL/GN X/OpenGL software.

The XMC-710 graphics accelerator provides dual output, and video capture capability. The card is powered by the Nvidia G73M, supported with a 128-bit local frame buffer interface with up to 512 Mbyte DDR2 frame buffer. Complementing the performance of the Nvidia GPU are Curtiss-Wright’s proprietary video processing capabilities. These ad-vanced features, implemented in FPGA, include Curtiss-Wright’s Video Integrity Monitoring (VIM) video freeze detection. The VIM enhances the integrity of the graphics display system to meet specialized require-ments in defense and aerospace systems such as safety-critical applica-tions. Additional video processing features supported by the XMC-710 include video capture and custom video configuration to ease and speed the support of both legacy and new state-of-the-art displays.

Other XMC-710 features include up to 512 Mbyte DDR2 SDRAM dedicated graphics memory and dual independent analog and digital video output in the form of standard non-interlaced analog, DVI (dual single link, or a single dual pixel link) and dual interlaced outputs sup-porting NSTC, PAL, RS-170, RS-343, STANAG 3350 (A, B & C) and custom modes. The XMC-71 also supports user-defined non-interlaced modes. Operating system support includes VxWorks 6.x, Linux and Windows XP. Higher-level software support includes Curtiss-Wright’s Graphics Software Suite (GSS). The GSS features X11/OpenGL ES 2.0 and SC 1.0 and application program interface to access the card’s value added features such as VIM and custom video modes, which are available through the onboard FPGA. Together with Seaweed Systems, Curtiss-Wright offers the latest Seawind/GL/GN X/OpenGL software optimized for the XMC-710. Pricing starts at $4,580. Both air-cooled and conduction-cooled versions, according to CWCEC ruggedization guidelines, are available.Curtiss-Wright Controls Embedded Computing, Leesburg, VA. (613) 254-5112. [www.cwcembedded.com].

February 2008 39

VME/VXS Board Combines PowerPC, FPGA and Multiple Gigabit Serial Interfaces

A high-end VME/VXS board employs Fre-escale’s MPC8641D Dual Core PowerPC AltiVec Pro-cessor and a Xilinx Virtex-4 FX Series FPGA. In addition, a fabric-transparent crossbar switch bridges a wide vari-ety of gigabit serial resources, including the PowerPC and FPGA, two XMCs, dual VXS ports, dual Fibre Channel ports and two optical serial transceivers. Native protocols support PCI Express, Serial RapidIO, Fibre Channel and Aurora, all accommodated by the crossbar switch. Up to 4 Gbytes of fast DDR2 SDRAM simplifies data buffering and boosts real-time signal processing. The Model 4207 from Pentek is targeted at applications in high-performance digital signal processing and data-acquisition systems,

The Model 4207 is equipped with either a single-core MPC8641 or a dual-core MPC8641D executing at a maximum frequency of 1.5 GHz. These very latest AltiVec Freescale PowerPC processors perform 128-bit parallel processing of multiple data elements (Single-Instruction, Multiple-Data Stream) and deliver DSP floating-point processing rates of up to 12,000 GFLOPS.

The processor includes built-in gigabit fabric support with both 8x PCI Express and 4x Serial RapidIO serial data ports. Up to 2 Gbyte DDR2 SDRAM is available to the processor for program and data memory, along with a nonvolatile 128 Mbyte flash for initialization, self-test and boot code. Processor clock options are from 1.0 to1.5 GHz.

The Model 4207 includes options for an onboard Xilinx Virtex-4 FX Series FPGA, the XC4VFX60 or XC4VFX100. Two 4X RocketIO ports provide a high-speed serial path between the FPGA and the crossbar switch for connection to other parts of the board, including the processor, VXS interface and XMC sites. These ports can also be configured as four 2X paths. The FPGA can be optionally equipped with 1 or 2 Gbytes of DDR2 SDRAM along with 128 Mbyte flash.

In addition to the processing power, the fabric-transparent crossbar switch of the Model 4207 offers extraordinary high-speed connectivity. Since the processor configures all routing paths, the switch simply passes the gigabit serial traffic from one port to another, totally independent of any particular protocol. Multiple data streams can be sent through the switch simultaneously, even if they have different protocols.

Because all high-speed interfaces on the board connect through the switch, paths can be configured to meet specific requirements. For example, XMC modules can transfer data through the switch to the onboard FPGA, to the processor, to the other XMC or to another board over the VXS con-nector. Similar types of connections are available for other resources, using any protocol that the connected devices support, including Serial RapidIO, PCI Express, Xilinx Aurora and InfiniBand protocols. Pricing starts at $14,725 with 10 to 12 weeks ARO.Pentek, Upper Saddle River, NJ. (201) 818-5900. [www.pentek.com].

Conduction-Cooled SBC Sports Dual Quad-Core Xeons

A fifth-generation dual-processor, rugged SBC supports Intel’s ultra-fast Virtualization Technology and is powered by two Quad Core Xeon processors, operating at up to 1.6 GHz, or two Dual Core Xeon processors, operating at up to 2.33 GHz. The conduction-cooled CompactPCI CC279 Premonition from General Micro Systems with up to eight independent processors on a single-slot board, delivers four times the performance of previous in-a-single-slot, convection-cooled SBCs at only 100 watts in a conduction-cooled design. High-end memory performance comes from Intel’s highest performance Server Class 5000 series controller chip set, which features two front side buses operating at 1333 megatransfers per second (MT/s). Each of the two 8 Gbyte, 144-bit ECC, memory banks functions independently of the other at 10.6 Gbytes per second, providing an effective memory transfer rate of 21.6 Gbytes per second. The CC279 is suitable for applications mandating not only performance but also data integrity, such as the Future Combat Systems.

In order to achieve this level of performance it was necessary to develop a unique conduction-cooling technique to remove the heat dis-sipated by the 100 watts of power. GMS accomplished this through a hybrid plate design utilizing heat pipes and copper/aluminum frame. A rolled edge allows a greater transfer of heat generated by the processing engine to be dissipated through the pipes as opposed to conventionally, through the frame.

Basic graphics on the single-slot board are provided by a mezzanine card on the Special Application Module (SAM-III) interface. For ultra-high-performance Quad nVidia Video Graphics, a 4HP SAM mezzanine card can be mounted on the backside of Premonition, boosting visual pro-ductivity. With its enormous data processing performance, as well as graph-ics performance capabilities, the CC279 is suitable for the most demanding programs, such as in applications that process multiple data sources for UAV collision avoidance utilizing array processing or digital signal pro-cessing. Standard I/O functions include Quad GigE Ethernet ports with a

TCP/IP Offloading engine, six USB-2.0, one Com port with RS-232/422, 20 GPI/O lines, six SATA-2 ports with RAID

support and one PATA port. An optional expan-sion I/O module via SAM-E can provide an addi-tional two 2.5” SATA SSD/HDD with RAID sup-

port, and PICMG 2.9 health monitoring and reporting capabilities. The CC279 is hot swappable with auto config System Mas-

ter/Peripheral Master, supporting PICMG 2.16 and PICMG 2.9, and comprises the latest features for providing a complete system on a single board. Support for the CC279 is available under Windows Vista/XP/2000, VxWorks and Linux. Premonition is also available in a convection-cooled version, the (C279). Both the conduction-cooled and the convection-cooled CC279 are available in versions for full extended temperature -40° to +85°C, and VME and VPX versions are in development. Single-unit pric-ing for the Premonition starts at $8,300 and shipment is 60 days ARO.General Micro Systems, Rancho Cucamonga, CA. (909) 980-4863. [www.gms4sbc.com].

40 February 2008

FeaturedProducts

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www.harting.com

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www.eurotech.com

42 February 2008

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Leading-edge real-time operating systems (RTOSs) offer powerful multitasking features such as support for many thread priority levels and the ability to make rapid context

changes between threads. While this makes it possible to more easily provide real-time control, these capabilities create the po-tential for considerable complexity in the way that threads share resources. As a result, real-time applications are often difficult to understand and even more difficult to optimize.

Real-time applications, and the RTOSs they run on, can help developers discover, analyze and correct some of the most difficult-to-find system problems. They can do this by logging records of events that occur during execution of the application and inside the RTOS as services are provided. Such logging pro-vides the capability to clearly see the occurrence of system events such as interrupts and context switches that occur out of view of standard debugging tools. The ability to identify and study these events and pinpoint their timing in the context of the overall sys-tem’s operation enables developers to identify bugs in less time and to optimize multitasking behavior.

The Traditional Approach to Event AnalysisReal-time programmers have long understood the impor-

tance of system behavior to the functionality and performance of their applications. The conventional approach to addressing these issues is to instrument the code by leaving “bread crumbs” that will generate data on system behavior when the code reaches a certain stage such as toggling an I/O pin, using printf, setting a variable or writing a value to a file.

Inserting such responses can require a considerable amount of time, especially when you consider that the instrumentation

code often doesn’t work exactly as expected the first time around and has to be debugged itself. Once that part of the program is verified, the instrumentation code needs to be removed and its removal also needs to be debugged. Since much of the instru-mentation process is manual, the process is time-consuming and prone to additional errors.

Besides instrumenting the code, the developer also needs to find a way to interpret the data that is generated. Due to the vol-ume of information generated by the instrumentation code, gain-ing an understanding of what system events have transpired, and in what sequence, can be challenging in itself.

RTOS Event Logging Enables Real-Time Systems AnalysisA system event trace tool can paint a graphical picture of the system enabling developers to get a clear picture of interrupts, context switches and other system events to find and fix bugs and optimize performance in substantially less time than required using standard debugging tools.

by John Carbone, Express Logic

advanced debugging

Figure 1 Express Logic’s TraceX offers a graphical view of real-time system events. In this example, you can see the initialization process and early execution of the application program.

February 2008 43

industry Watch

A few commercial RTOSs address these concerns by of-fering tools that assist in the capture and interpretation of sys-tem events. Generally, these tools create a log of events during system operation and display that log graphically on the host to give developers visibility into the behavior of their system. One weakness of many of these tools, though, is that they typically are available only as an element of an overall integrated toolset, which is often very expensive to buy and may duplicate other host development tools already in use.

Most system event analyzers also tend to be inflexible in the way they manage the buffer that stores the log of system events. They typically write to only one specific trace buffer and the buf-fer cannot be turned off or back on by the application, thereby risking the loss of events of interest, or saturating the buffer with useless clutter. Most of these programs present trace events

graphically, on multiple lines, representing the various threads in the program, system routines such as interrupt handlers, ini-tialization code, etc. Thus the user may have to do a consider-able amount of scrolling up and down to see all of the captured events. And, since developers generally get information on events by clicking on an icon representing the event and viewing a pop-up window with key event information, they can only view one event at a time.

A New Approach Offers AdvantagesA new approach to system and application event viewing

avoids these weaknesses that are common in similar products and can offer developers better access to valuable information. An effective approach is to provide the user with the opportunity to log desired application events using an application program-ming interface (API). Events are logged in the database under program control with time-stamping and active thread identifica-tion so they can be displayed later in the proper time sequence. These application events join the system events that the RTOS already logs (Figure 1).

To make events available for sequential viewing, trace informa-tion should be stored in a circular buffer on the target system with buffer size determined by the application. A circular buffer enables the most recent “n” events to be stored at all times and to be avail-able for inspection in the case of a system malfunction or other sig-nificant event (Figure 2). Multiple buffers enable distinct “clips” of system behavior that can be analyzed together or separately.

Event logging may be stopped and started by the application program dynamically, such as when an area of interest is encoun-

tered. This avoids cluttering the database and using up target mem-ory when the system is performing correctly. To enable developers to hone in on specific threads, a system event analyzer should make it possible to use multiple trace buffers and to switch between them when necessary. The trace information may be uploaded to the host for analysis at any time, either when encountering a break-down or after the application has finished running.

Once an event log is uploaded from target memory to the host, the events are displayed graphically. The display on the horizontal axis represents time. The various application threads and system routines, to which events are related, are listed along the vertical axis and the events themselves are presented in the appropriate row.

All events are presented in a summary row at the top, which provides developers with a handy way to obtain a complete pic-ture of all system events without the vertical scrolling that’s re-quired in many products. In all rows, events are represented by color-coded icons, located at the point of occurrence along the horizontal timeline, to the right of the relevant thread or system routine, or all combined in the summary row at the top. The hori-zontal axis may be expanded to show more detail about events or collapsed to show more events. When an event is selected, detailed information for that event is shown at the bottom of the display including the context, event, thread pointer, new state, stack pointer and next thread point. Information is presented not only for the current event, but also for the two events preceding and the two events following the current event. This can be very useful in reducing the number of clicks required to see details of several successive events.

Solving Priority Inversion ProblemsAn example of the bugs that can be solved more quickly

and easily with this type of tool is the classic priority inversion problem. Priority inversions arise because RTOSs employ a pri-ority-based preemptive scheduler that ensures the highest prior-ity thread that is ready to run actually runs. The scheduler may preempt a lower priority task in mid-execution to meet this objec-tive. Problems can occur when high and low priority tasks share resources, such as a memory buffer. If the lower priority task is using the shared resource when the higher priority task is ready

Figure 2 Information about the circular buffers used to capture event data during execution.

Figure 3 This display shows a simple priority inversion, where Thread 1 holds a resource that is needed by Thread 0, which is higher in priority. Thus, Thread 0 is delayed by a lower priority thread.

44 February 2008

industry Watch

to run, the higher priority task must wait for the lower priority task to finish. If the higher priority task must meet a critical dead-line, then it becomes necessary to calculate the maximum time it might have to wait for all its shared resources in determining its worst-case performance.

Priority inversions are difficult to identify and correct. Their symptom is normally poor performance, but poor performance stems from many potential causes. Just as troublesome is the pos-sibility that the priority inversion might not be noticeable in test-ing, which could cause the application to be non-deterministic.

With a system trace analysis, it is possible to identify and correct priority inversions. The trace buffer clearly identifies which thread is running at any point in time. This makes it easy to go back in time and determine whether a higher level prior-ity thread is ready to run. The next step is typically determining

the resource blockage causing the priority inversion. The normal process is to cycle back on the higher priority thread to identify the last point in time at which it was blocked. Clicking on this event will identify the mutex or semaphore on which the high-priority thread is blocked, and can be used to track the ownership of the resource and the lower priority event that has taken control of the semaphore.

The simple priority inversion shown in Figure 3 is identified by clicking on the “MP” event (Mutex Put) in the “Thread 1” line. “Selected Event - 2” shows us a planned priority inversion. Thread 0 has suspended on “mutex 0,” which is owned by the lower priority “Thread 1.” This could be an error if the devel-oper did not know that this priority inversion was possible. More likely, this is a typical case of different priority threads compet-ing for the same resource (protected by “mutex 0”).

Figure 4 shows a complex priority inversion with mutex pri-ority inheritance revealed by clicking on the “TR” icon (Thread Resume) in the “Thread 0” time-line. “Selected Event - 2” shows the same priority inversion problem as the previous example. In this case, the mutex is set up for priority inheritance so that when

“Thread 0” attempts to get the mutex, “Thread 1” temporarily inherits the priority of “Thread 0.” The effect of this is that al-though “Thread 2” became ready during the priority inversion window (inside the “System Timer Thread at the TR icon), it does not run until after the priority inversion is cleared and “Thread 0” finishes its processing.

Improving Application PerformanceWhile most developers will begin using such a tool in or-

der to understand and correct problems, a potentially broader benefit can be derived from using the tool to analyze and im-prove system-level application performance. As a general rule, the greater the proportion of time spent in the application and the less spent on system-level tasks such as context switches, the faster the application will run. The system event analyzer makes it easy to see at a glance how much time is devoted to system activity. The developer can easily drill down on specific events for diagnostic purposes.

For example, a developer might notice that there is a large number of interrupts caused by the receipt of data packets. The simplest and most common approach is to simply add each in-coming data packet to a queue. Examination of the processing timeline shown by the event analyzer might reveal that a full con-text save/restore and RTOS queue service are performed for each packet that is received. Knowing this, the developer could opti-mize the per-packet processing to perform this work only upon receipt of a packet when the processing thread is suspended. In addition, the processing thread would only be suspended after all queued packets are processed. This is an especially effective optimization, since it has the potential to eliminate three RTOS services per packet processed, and becomes more beneficial as the system is loaded. Most importantly, the per-packet overhead would be hard to visualize without the tool.

Developers also can look at how the setting of priorities af-fects system performance. When threads are set at a relatively high number of priority levels, there’s typically a lot of switch-ing between threads to keep the highest priority thread that is “ready” running. Developers challenge performance by assigning priorities without thinking about the volume of context switches they are willing to tolerate. Context switches are transparent to traditional debugging tools so developers usually have no way to determine the impact of priorities.

Here, context switches are revealed and this makes it easier to understand their impact on performance. Invariably one of the first things developers notice when they begin using such a tool is the larger than expected number of context switches. They are typically surprised at the amount of time these switches consume and they then can modify their programs to use a smaller number of priorities so that context switches occur less frequently. Nota-bly, without a tool such as this, developers would be unaware of many of the inefficiencies in their system.

Express Logic, San Diego, CA. (858) 613-6640. [ www.rtos.com].

Figure 4 This system snapshot shows a complex priority inversion with mutex priority inheritance. Thread 0 is still being delayed while it waits for a resource owned by a lower priority thread, Thread 1. However, priority inheritance prevents the mid-priority Thread 2 from running during the priority inversion situation.

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www.onestopsystems.com

46 February 2008

Scroll Ring Interface for Ergonomic Touch Control

Known as the SimScroll scroll ring interface, a circular switch array mim-

ics the type of capacitive touch switch found on iPods, at a fraction of the cost. SimScroll from White Elec-tronic Designs makes it easy to navi-

gate large menu lists such as those found on Universal Remote Controls, MP3 players and A/V media system controls. Because it has a one-piece sealed mem-brane switch, it’s also ideal for medical and in-dustrial applications.

SimScroll’s interface design uses White’s pat-ented conductive ink tech-nology, SimTouch, with a flexible overlay laminated to the switch circuit. A va-riety of overlay materials can be used to enhance its appearance for effects such as a smooth glass-like finish or a brushed metallic finish for a stainless steel look. Ac- tivation pads can be screened directly on the polycar-bonate overlay or on an additional polyester layer. Ease of use, design elegance, flexibility and lower cost provide a competitive advan-tage over other touch-switch technologies.

The SimScroll interface is actuated with a light touch through conductive circuitry and pressure-sensitive mounting adhesive. Sim-Touch and SimScroll switch arrays can be integrated with flexible segmented displays to create touch panel functionality. White Electronic Designs, Phoenix, AZ. (602) 437-1520. [www.whiteedc.com].

&technOLOgYProducts

Multi-Slot PCI Express-to-PCI Extension Systems

A new series of multi-slot PCI Express-to-PCI ex-tension systems offers expandability to 13 PCI slots. The PCES-8581 series from Adlink Technology extends 5V and 3.3V PCI slots to a PCI Express-based computer via a cable connec-tion up to 23 feet (7 meters) in length. PCI devices installed in the exten-sion system behave and work as if they are directly installed in the host system and do not require any additional driver or software installation.

Features of the PCES-8581 series include expanding the I/O capability of measure-ment and automation systems beyond the limited number of onboard PCI slots common in host systems. They also provide a ruggedized extension system that can withstand high temperatures and harsh vibrations so that host systems with a PCI Express x1 interface can both be located at a safe distance from such environment and directly control remote PCI devices.

The two members of the series, the PCES-8581-13S and PCES-8581-4S (4 slots) both implement PCI Express-based control of PCI modules and consist of a PCI Express extension card installed in the host computer, a shielded cable and the extension system. The PCI Express card uses one x1 lane and communicates with the extension system via a shielded twisted copper cable. The extension system (with a PCI extension card) then converts the PCI Express interface into a PCI bridge in a 32-bit/33 MHz configuration for the additional PCI slots. The PCES-8581-13S and PCES-8581-4S are priced at $1,499 and $1,199, respectively, with discounts in volume.Adlink Technology, Irvine, CA. (866) 423-5465. [www.adlinktech.com].

USB Connector Provides EMI & ESD Protection

A series of USB connectors incorporates EMI or ESD filters into an industry-standard USB pack-age. These connectors satisfy the requirements of the USB 2.0 spec, which calls for EMI and ESD protec-tion according to industry specifications. This protec-tion has become more of a challenge as less space is available for components and smaller IC chips are more susceptible to low-level damage. Spectrum has moved the EMI filtering or ESD protection to the USB connector allowing designers to free-up valu-

able PC board space for other components and provide better protection for the entire device. Inherent in the development of more plug-and-play devices with hot-plug capability is greater

risk of system exposure to electromagnetic interference (EMI) and electrostatic discharge (ESD). Spectrum connectors are drop-in replacements for unfiltered connectors making them solutions for the ongoing miniaturization of peripheral devices. Various models meet the requirements of USB 2.0 and USB On-The-Go (OTG) specifications and all are RoHS compliant. The EMI filtered USB connectors are available with either a capacitive filter for USB 1.1 or with an inductive filter for USB 2.0. The connectors have pricing ranging from $1.00 to $3.00 depending on quantities required. Spectrum Control, Fairview, PA. (814) 474-3110. [www.spectrumcontrol.com].

Code Center Helps Search, Select and Evaluate Open Source

A new tool streamlines the workflow processes around the search, selection and approval of open source and other externally produced soft-ware components. The Black Duck Code Center provides developers with access to a large and growing knowledge base containing detailed infor-mation about open source components. As components are selected by developers, Black Duck Code Center provides an enterprise-wide frame-work to shepherd a newly selected component through a customized, multi-stage vetting and approval process. Black Duck Code Center frees developers from the bureaucracy of policy enforcement without reducing the robustness of an organization’s critical software development policies and procedures. It supports an enterprise-wide framework for engineer-ing, legal and other corporate decision makers to collaborate seamlessly in managing software development policies, and simultaneously provides developers with unprecedented visibility into component availability and desirability. Over time, development organizations populate a catalog of approved components, which facilitates component reuse and standard-ization across development organizations.

Black Duck Code Center features a Web-based GUI interface, a local database of components populated with attributes and an instal-lation of the Black Duck KnowledgeBase, a comprehensive source of information about open source and other software components. Black Duck adds newly discovered/updated components to its KnowledgeBase regularly and provides periodic KnowledgeBase updates to subscribers. Black Duck Code Center provides a detailed insight into known vulner-abilities of components.

Comprehensive information on software components collected from thousands of sites:

• Name• Description• Versions• Type (proprietary, open source, 3rd party …)• URL• License• Programming language• Security vulnerability data Custom fields• And more…

Black Duck Software, Waltham, MA. (781) 891-5100. [ www.blackducksoftware.com].

February 2008 47

Embedded 802.11 b/g Networking Module Couples Security with Roaming Technology

A highly secure embedded 802.11 b/g networking module is a suitable networking solution for data-sensitive, regulatory and IT-driven applications that demand the safest and most reliable tech-nology such as medical records, financial transactions and govern-ment data. In addition, MatchPort b/g Pro from Lantronix features SmartRoam, a breakthrough technology that provides users a higher degree of reliability and mobility when moving throughout a build-ing, warehouse, or even across campus-wide networks. MatchPort b/g Pro’s suite of security features includes:

• IEEE 802.11i-compliant radio with AES-CCMP (Advanced Encryption Standard-Counter Mode with Cipher Block Chaining Message Authentication Code Protocol) and TKIP (Temporal Key Integrity Protocol)

• Complete suite of 802.1x EAP (Extensible Authentication Protocols) including EAP-TLS (Transport Layer Security), EAP-TTLS (Tunneled Transport Layer Security), PEAP (Open standard from Cisco Systems, Microsoft and RSA Security), LEAP (Lightweight Extensible Authentication Protocol)

• End-to-end TLS/SSL 3.0 (Secure Sockets Layer) and SSH (Secure Shell) tunneling

• End-to-end AES (Advanced Encryption Standard) 128-bit encrypted tunneling

Going beyond IEEE 802.11 standards, the MatchPort also fea-tures the SmartRoam technology, which continuously tracks the radio signal strength of access points within range. Pre-authentica-tion and caching enable smooth and automatic transition to an ac-cess point with a stronger signal, enhancing mobile reliability while minimizing communication disruption for the user. Unlike other solutions, users experience a seamless transition, gain uninterrupted mobility and a quicker, more reliable connection to the network.

MatchPort b/g Pro handles the most computationally de-manding or data-intensive applications effortlessly with a 32-bit, 159 MIPS (Dhrystone 2.1) 166 MHz processor. With 8 Mbytes of SDRAM and 8 Mbyte flash, it provides enough memory capacity for OEM customization, loading Web pages and data “store and forward” applications. It features two serial ports with 230 Kbit/s data rate capability, seven control pins (CP/GPIO) and a wide operational temperature range of -40° to 70°C, and optionally to 85°C. An application API and software developer kit (SDK) will be available, enabling OEMs to develop and deploy custom applica-tions meeting their specific needs.Lantronix, Irvine, CA. (949) 450-7200. [www.lantronix.com].

48 February 2008

Library for Matlab to C Synthesis Delivers over 300 Functions

A third-party function library enables Matlab developers to generate functionally equivalent, redistributable C code for more than 300 Matlab equivalent functions with re-distributable source, including a wide variety of toolbox functions. The library, developed by Catalytic, now lets algorithm developers generate equivalent C models from Matlab code that take advantage of higher-level Mat-lab functions, a formerly manual effort.

Using Matlab functions offers algorithm developers significant productivity improve-ment, but when it comes to handing off the algorithm for incorporation in products or prototypes, they are faced with a hurdle. Since Matlab functions are delivered in M code or compiled form, a manual translation step is required to replicate the equivalent function-ality in C code. Depending on the complexity of the function used, the translation could add anywhere from one to six staff weeks of effort per function. With both automatic and user-directed function substitution, Catalytic MCS enables easy use of Catalytic functions without source code modifications. With the Catalytic Function Library, developers now have a low-risk path from Matlab functions to function-ally equivalent, redistributable C code. Pric-ing for the library is subscription-based from $5,000 per year including quarterly updates.Catalytic, Palo Alto, CA. (650) 846-2555. [www.catalytic.com].

1U MicroBox Offered as Integrated MicroTCA SolutionElma Electronic has announced its 1U

MicroBox is now offered as a fully integrated solution. With the small-est form-factor of any deployable MicroTCA unit, the 19” rackmount

MicroBox features up to 10 modules (mid-size, single width) in a compact 1U height. This includes 6 AMCs, a Power Module (PM) and a J-TAG Switch Module (JSM) from MicroBlade, and 1 MicroTCA Carrier Hub (MCH). The redundant Star signaling and redundant cooling modules provide extra reli-ability. This integrated system offers high bandwidth, flexibility and monitoring in the 45 mm x 465 mm x 210 mm size. Elma can also offer the MicroBox as a stand-alone chassis in various module sizes.

Cooling is achieved in a dual redundant push/pull configuration. Thermal studies show that it dissipates 35W per module (mid-size, single width) and has eight (2 x 4) fans pro-viding 20 CFM each at 1.5” of water. The JSM is a unique testing and diagnostics module that provides remote programming and uploads. The Power Module generates less heat, an important consideration for a densely packaged system. It features individual-channel control, monitoring and shutdown for each AMC. The hot-swap pluggable fan trays and filters are separately removable and managed. The fans also feature 100 KHz multi-phase Pulse Width Modulation (PWM) with individual speed control. Pricing is under $4,500 with basic options in low volumes. Elma Electronic, Fremont, CA. (510) 656-3400. [www.elma.com].

Modular Mini-ITX Open Frame Panel Computer A Mini-ITX Modular Open Frame Panel Computer,

the FPM610 series from Advansus, is an Open Frame Panel Computer with a 15” color TFT display that accommodates a variety of Mini-ITX system options, ranging from the Intel Core2 Duo to the Celeron M 600 MHz proces-sor. The FPM610 unit makes it easier and faster to do custom system development with flexible Mini-ITX board choices, multiple displays and audio streams, powered COM ports and one built-in power supply.

Advansus currently offers four versions of the FPM610 Open Frame Panel Computer, which incorporate an Intel 945GME, 915GME, 910GMLE or 852GM mini-ITX motherboard. All ver-sions of the FPM610 support both LVDS and DVI dual view displays, 5.1-CH audio with an ad-ditional 5-watt audio amplifier, and one fast Gigabit Ethernet controller with an RJ-45 LAN port. Two powered serial ports are able to support external low-power devices with 5V/12V output. One CompactFlash slot takes any type I/II media card for memory or storage requirements. The ready-for-market FPM610 shares a common ATX I/O shield, and provides customers the perfect platform for digital signage, KIOSK, POS and other multimedia demanding applications.

Based on modular design, the FPM610 series accepts most Mini-ITX motherboards with cus-tom I/O shielding available upon request. The system has a robust stainless housing for use in harsh environments, one internal hard drive bay for 2.5” IDE HDD storage and one built-in 200-watt power supply, which reduces complex wiring. With these features; widely scalable system options, simplified cabling, and superior reliability, the FPM610 is a reliable solution with a faster time-to-market. Advansus, Taipei, Taiwan. +886-2-8177-7089. [www.advansus.com.tw].

Products&technOLOgY

February 2008 49

PC/104-Plus 8-Port Stackable MAC Switch An 8-port MAC switch is a stackable PC/104-Plus card that combines

a 100BaseT Ethernet MAC with a 9-port switch. The 4I71 from Mesa Electronics makes it easy to connect multiple em-bedded system cards with-out the awkward power or mechanical problems with consumer-type Ethernet switches. The eight Eth-ernet ports support auto negotiation allowing con-nections with half and full duplex, 10 and 100 BaseT devices plus auto MDX, eliminating the need for crossover cables.

The Ethernet MAC is a Micrel 8842P. The 8842P has advanced features such as hardware TCP checksum calculation for optimum MAC performance, and has drivers available for most operating systems. The switch has sufficient bandwidth to support full duplex wire-speed connections on all ports. Price for the 4I71 is $147 in 100s. Mesa Electronics, Richmond, CA. 510.223.927.2 [www.mesanet.com].

Modules Support MOST Bus on PXI and USB Basis

New Media Oriented Systems Transport (MOST) automotive communi-

cation modules for ECUs in PXI and USB form-factors are available with full compli-

ance to the current MOST specification. The new modules are the PXI card 3060 and a USB

stand-alone controller named basicMOST 3060 from Goepel Electronic.

The PXI 3060 and basicMOST 3060 were de-signed for communication applications in general test and measurement technologies, in particular for vehicle control units. Based on the new MOST IC INIC OS81050, the modules are configurable as Master and Slave. The new controllers guarantee sending/receiving on the Control Channel and Packet Channel as well as the read-out of all data (moni-toring) on the MOST bus. In addition to several specific functions, on-board diagnostic plays an important part. Furthermore, the controller is able to send/receive application protocols, data packages and control messages. Trigger inputs and outputs are provided by means of the front connector. Additionally, PXI 3060 and basicMOST 3060 have analog inputs and outputs. Goepel Electronic, Jena, Germany. +49 3641-6896-739. [www.goepel.com].

Quad GbE iSCSI Solution Delivers High-Performance IP Storage

A new 3U 16-drive Quad GbE iSCSI enterprise-grade independent RAID storage system includes snapshot, N-way Mirror, RAID-6 data protection, automatic background data regeneration, dynamic online volume expansion and Multi-Path I/O support for Windows workstations and servers. The UltraStor RS16 IP-4 from Enhance Technology has a built-in 64-bit RAID controller for mission-critical applications that demand nothing short of superior performance and reliability.

The UltraStor RS16 IP-4, capable of supporting up to sixteen 1Terabyte SATA II 3 Gbit/s HDDs and powered by a 64-bit RAID engine with up to 1 Gbyte cache, maximizes disk performance and data transfer throughput with its quad GbE iSCSI ports. The built-in Web GUI RAID management system provides users the ability to monitor and control their systems from remote locations through a Web browser and it offers a “snapshot” feature, which takes an “image” of the logical vol-ume at a particular point in time allowing consistent backup of data in minutes rather than hours without system downtime resulting in an increase of department’s productivity.

For added stability and reliability, UltraStor RS16 IP-4 is equipped with hot-swappable 460W redundant power sup-ply and cooling modules, which enable system maintenance without interruption of service. An LCD control panel facili-tates the setup process and lets users reconfigure the system as storage needs change over time. The UltraStor RS Series Enterprise IntelliRAID now supports Microsoft Multi-path I/O (MPIO), which integrates tightly with the Microsoft Windows family of products and architectures. Enhance Technology, Santa Fe Springs, CA. (562) 777-3488. [www.enhance-tech.com].

50 February 2008

“Anything I/O” for the PCI BusThe MESA 5I22 is a general-purpose

programmable industrial I/O card for the PCI bus. The 5I22 uses a 1M or 1.5M gate Xilinx FPGA for all logic, so it is truly an “Anything I/O” card. The FPGA configuration is down-loadable from the PCI bus side, allowing cre-ation of almost any kind of specialized I/O function. The 5I22 uses four 5-pin connectors with I/O module rack-compatible pin-outs and interleaved grounds. Each connector provides 24 I/O bits for a total of 96 programmable I/O bits. All I/O bits are 5V tolerant and can sink 12 mA. Pull-up resistors are provided for all pins so that they may be connected directly to opto-isolators, contacts, etc. Bus master and DMA capability allow fast PCI transfer rates.

A 48 MHz crystal oscillator provides a reference clock, which can be multiplied by the FPGAs DLLs for higher clock speeds. Several pre-made functions are provided, including a 16 axis host-based servo motor controller, a 32 channel quadrature counter, many versions of the SoftDMC motion controller including 4 and 8 axis versions for step motors, brush-type servo motors and BLDC servo motors, a sim-ple 96-bit parallel I/O port, and a 16 channel, 32-bit timer counter card capable of running at 100 MHz. VHDL source is provided for all functions. Six-layer circuit card structure is used to minimize radiated EMI and provide optimum ground and power integrity. Price of the 1M 5I22 is $219 in 100s; the 1.5M 5I22 is $249 in 100s.Mesa Electronics, Richmond, CA (510) 223.927. [www.mesanet.com].

3U cPCI SBC Hosts Core 2 Duo and PMC/XMCCompactPCI, particularly in its 3U flavor, is rapidly filling more

embedded application slots. For its latest 3U cPCI offer-ing, Concurrent Technologies has introduced their TP

442/34x. Using the latest mobile processors from the Intel embedded roadmap, the 1.5 GHz or the 2.16 GHz Core 2 Duo processor, the board is suitable for low-

power data-intensive processing applications whereby the processor’s dual cores can access up to 2 Gbytes DDR2-667 SDRAM. This versatile

3U SBC supports a variety of peripheral I/O ports, an optional PMC/XMC module and can operate in a system slot, peripheral slot or as a blade.

In addition to the commercial-grade version, two industrial-grade options are also available for operating at temperatures over -40° to +85°C or -25° to +70°C. The Intel 945GME GMCH graphics/memory controller and Intel ICH7-R I/O controller are used to complement the proces-sor to achieve a low-power yet high-performance core design. Using two slots, the TP 442/34x supports a 66 MHz PMC (with front/rear I/O) or XMC site (via a x4 PCI Express port); alterna-tively there is an option to install an onboard 2.5-inch SATA300 hard disk drive, or for harsher environments, a 2.5-inch solid-state SATA flash drive.Concurrent Technologies, Woburn, MA. (781) 933-5900. [www.gocct.com].

Products&technOLOgY

PCIe Switching Solutions Optimized for Communications Systems

A new family of PCIe switching solutions is specifically tailored for demanding communica-

tions applications. Comprised of three 16-port devices, the family from Integrated Device Technology

(IDT) offers lane-count options of 16, 22 and 34 PCIe lanes. The 16-lane, 16-port 89HPES16H16 offers economical, high-

port-count connectivity for control plane traffic between manage-ment processors, ASICs, FPGAs and I/O peripherals. The 22-lane, 16-port

89HPES22H16 and 34-lane, 16-port 89HPES34H16 offer flexible x8, x4 and x1 port configura-tions to support a mix of data and control plane traffic. Moreover, the large port widths enable efficient, high-performance cascading connectivity for switching complexes with more than 16 ports, and provide for redundancy and failover mechanisms. The new devices feature re-dundant upstream ports for multi-root support and failover, support for high quality of service with two virtual channels, and deterministic latency at full wire speed throughput, ensuring predictable performance for critical system control and data plane traffic.

Each of the IDT PCIe switching solutions has a dedicated evaluation and development kit for device testing and analysis, and system emulation. Each kit consists of a hardware evaluation board with representative upstream and downstream connectivity, and an IDT-developed, GUI-based software environment that enables the designer to tune system and device configurations to meet system requirements. Moreover, to ensure that each OEM system design is optimized for production and meets its time-to-market objectives, IDT provides customers with extensive, collaborative technical support, including system modeling and signal integrity analyses, and schematic and layout review services. Pricing in OEM quantities is $43 for the 89HPES16H16, $59 for the 89HPES22H16 and $88 for the 89HPES34H16 in 10,000 unit quantities. Integrated Device Technology, San Jose, CA. (408) 284.8200. [www.IDT.com.].

6U CompactPCI 24-port Gigabit Ethernet Switches

Two new 24-port Layer 2 Gigabit Ethernet Switches from GE Fanuc Intelligent Platforms fea-ture Layer 2 switching at wire speed. The 6U Neter-nity CP982RC and CP980RCC offer high performance and reliability, PICMG 2.16 compliance, flexible port routing options and OpenWare Lite management (CP982RC).

While the CP980RC is designed specifically to fulfill the require-ments of customers looking for high-performance, high-reliability switch-ing solutions at low cost, the CP982RC is targeted at applications that are not presently well served by vendors—the market for high-performance, high-reliability switches that feature some degree of management without the high cost of full management. Availability of OpenWare Lite on the CP982RC provides customers with the level of switch management they require but at a cost commensurate with its reduced level of functionality.

The NETernity CP982RC, which has an onboard management proces-sor, is characterized by its support of GE Fanuc Intelligent Platforms’ Open-Ware Lite Switch Management Environment, which is available exclusively on selected Neternity configuration-managed Layer 2 Ethernet switches. Configuration and monitoring functions are accessible from a serial con-sole or via a network. Supported access methods include Telnet, SSH and SNMP. OpenWare Lite is easy to deploy; features Linux-based software allowing faster implementation and easy updates to firmware, using a fa-miliar Linux command line interface; and remote Telnet user interface sup-port, allowing users to select how they interact with the switch. OpenWare Lite is also portable across switch fabrics and processor environments.

Front ports on the CP982RC can be 10/100/1000BaseT, 1000BaseLX or 1000BaseSX, while rear I/O ports are 10/100/1000Ba-seT. The CP980RC provides 10/100/1000BaseT support for both front and rear (copper) ports. On both the CP982RC and CP980RC, 24 (cop-per) ports are routed to the rear or, alternatively, 22 ports can be routed to the rear and two ports to the front. High-availability hot swap is sup-ported on both switches, and conformal coating is optionally available.GE Fanuc Intelligent Platforms, Charlottesville, VA. [www.gefanuc.com].

February 2008 51

Free Trial Tool Set for System Development on Xilinx Spartan-3 Kits

A new concept in devel-opment platforms provides the tools needed for embed-ded system development, in-cluding an RTOS, hardware reference designs and the tools that automatically integrate them for implementation on FPGAs. The UnifiedLogic platform from Eridon automatically customizes and configures the UnifiedLogic RTOS and integrates peripherals around an FPGA for both prototype and production hardware. The Unified-Logic Development Platform supports Eridon’s own “snap-together” prototyping boards as well as third-party development boards, and is fully extensible. Software developers can immediately start creating application code while hardware engineers begin work on the product in its final production form. In this way, UnifiedLogic dramatically re-duces time-to-market for embedded systems.

A free trial version of the UnifiedLogic Development Platform can be downloaded from http://www.eridon.com/downloads.aspx and is ready to go for Xilinx Spartan-3 Generation Starter Kits with many examples of using their peripherals. It includes the software-centric UnifiedLogic IDE, the UnifiedLogic RTOS and extensive documenta-tion and demonstration code for the Spartan-3 Generation Starter Kit Boards. Immediately after installing the UnifiedLogic Development Platform, an embedded software developer with no FPGA expertise can configure peripherals and begin writing code for a Spartan-3 Generation Starter Kit Board. Eridon, Wayzata, MN. (952) 474-5110. [www.eridon.com].

Rugged Fibre Channel Raid Array with Four 4 Gbit Fibre Channel Ports

A rugged, high-performance 4 Gbit Fibre Channel RAID array features a 12 hard disk drive array housed in a rugged 3U (5.25”) panel height enclosure providing 4 Gbit/s FC host interfaces to high-performance SAS and/or high-capacity SATA II HDDs. The RPC12 from Phoenix International is compliant with military and industrial specifications such as MIL-STD-901D, MIL-STD-810F and NEBS Level 3. The design of the RPC12’s rugged, cableless, passive midplane-based, high-density 3U chassis provides an increased environmental operational envelope (-20° to +60°C, 45,000 ft altitude with sealed HDDs), redundant, hot-swap components and massive storage capacity, while assuring the highest level of data availability.

The major components and features of the Phoenix RPC12 Fibre Channel RAID Storage System include the 3U Ruggedized Dual Port Fibre Channel RAID System with single active (dual active, failover/failback option) controller. There are two 4 Gbit/s Fibre Channel ports and battery-free cache backup. The unit features enclosed and electrically isolated hot-swap drive canisters with an operational altitude to 45,000 ft and an operational temperature range of -20° to 60°C. Cool operation involves a maximum 10°F temperature rise. The RPC12 supports Windows, Linux and Unix (Cluster Certified) as well as including management GUI and failover software.Phoenix International, Orange, CA. (800) 203-4800. [www.phenixint.com].

Products&technOLOgY

Fixed-Mount Data Matrix Verifiers for DPM and Printed Codes

Code quality is critical to achieving the read rates required for successful part traceability, and the solu-tion is a machine vision application for verification. Cognex has introduced its DataMan 100V verifiers,

which check the quality of data matrix codes to ensure only well-marked parts enter the man-ufacturing and supply chains.

A growing number of companies across the automotive, aerospace, packaging, electronics, healthcare and defense industries need verifica-tion to comply with contracts that require marks meet a certain level of quality. Others use verifi-

cation for process control at the marking station to ensure the highest possible read rates and minimize scrap

and downtime in their manufacturing process. The DataMan 100V measures label and direct part mark quality to

all industry standards, including the Association for Automated Identifi-cation and Mobility (AIM) Direct Part Mark (DPM) Quality Guideline, which ensures consistent results across different verification platforms, manufacturing environments and industries as well as ISO15415 and AS9132. The DataMan 100V is available now for easy integration into marking, labeling or other types of equipment, or as a complete turnkey solution for contract compliance applications. Cognex, Natick, MA. (877) 264-6391. [www.cognex.com].

L3 Gigabit Ethernet VME Switches for New Embedded

Applications DemandsA line of 6U VME L3 fully managed

Gigabit Ethernet switches for embedded ap-plications, the ComEth4070a series from Interface Concept, uses the latest-generation Gigabit switch engine and PHY transceiver. It combines a layer 2+ switch and a full layer 3 router in a single board with optimized power consumption. The ComEth4070a supports full-wire-speed L2 bridging and IP routing with L2-L4 Access List for classification, filtering and prioritization. The queue priority of eight levels is combined with a QoS policy to make it easier to tune jitter in critical applications.

The ComEth4070a provides 24 Gigabit Ethernet ports for a capacity of 37 Mpacket/s. Twenty Gigabit Ethernet ports are routed on the P0 & P2 rear connectors; the four remaining Gigabit Ethernet channels are avail-able on the front or via the P2. The front option can provide four 1000BT (RJ45) ports or optionally 1000SX/LX fibre channels. The Gigabit trans-ceivers automatically select the media with activity.

ComEth4070a switches are fully managed and can easily be monitored from a browser, a remote application, a CLI or SNMP. The Switchware software provides Layer 3 functions, allowing static and dynamic protocols (RIP, OSPF), IP routing, proxy-ARP and DHCP-relay. The IP protocols are carried out by the processor and the forwarding is carried out by a full-wire-speed L3 engine router. IC brings solutions to systems deployed in a wide range of environmental applications by offering products in standard, extended temperature, rugged and conduction-cooled grades. Interface Concept, Briec de l´Odet France. +33 (0)298 573 030. [www.interfaceconcept.com].

52 February 2008

Products&technOLOgYVMEbus Gigabit Ethernet Switches Offer Management and IPv6

Two new Gigabit Ethernet switches from GE Fanuc Intelligent Platforms offer full VPv6 support, in a single slot solution. The Neternity GBX24 is a fully rugged 6U VME 24-port Gigabit Ethernet fully managed Layer 2/3 switch, while the NETernity VXS24 provides 24-port Gigabit Ethernet functionality for VXS (VITA 41.3) envi-ronments and also offers a fully managed Layer 3 capability. Both feature full support for IPv6 and both occupy only a single chassis slot. Management of the two switches is implemented using Fast-path, providing the military industry standard for performance, ease of use and compatibility across switches.

The rugged GBX24, which is designed to meet the require-ments of network switching in harsh military/aerospace environ-ments (it is available in both air- and conduction-cooled formats), provides 24 ports to rear connectors, and four ports of optical SX or LX connectivity to the front panel. It features a non-blocking shared memory architecture, providing 48 Gbit/s wire speed per-formance. An unmanaged version is also available.

The VXS24 provides 22 ports of 1000BaseCX Gigabit Eth-ernet connectivity to the rear panel, with two ports of optional 1000BaseT available at the front panel. Like the GBX24, it is designed for deployment in demanding switching applications: it is available either in a standard air-cooled format, or rugged air-cooled for increased temperature and shock resistance. It features a non-blocking shared memory architecture, providing 88 Gbit/s wire speed performance.

The GBX24 provides optional optical expansion through a mix of onboard optics and a separate Optical Expansion Board. All 24 ports can be converted to optical outputs to give 24 ports of Gigabit, either 1000 BaseSX or 1000 BaseLX. Onboard built-in test (BIT) ensures the GBX24 can be easily linked with other GE Fanuc Intel-ligent Platforms boards to provide integrated system-level health monitoring and diagnostics.

An optional mezzanine capability for the VXS24 allows for 10 Gigabit uplink ex-

pansion, transitioning from XAUI on the switch packet proces-sor to the appropriate 10G standard at the front panel. The VXS24 can be ex-

panded to a 48-port solution by connecting two VXS24s together

via the 10 Gigabit ports.Both switches feature network man-

agement capabilities based on Fastpath software that include VLANs, link aggregation, spanning tree, IPv4, IPv6, IGMP, traf-fic policing, Quality of Service (QoS), guaranteed bandwidth and SNMP. Configuration of the switches is via a comprehensive and intuitive Web interface, command line interface or SNMP.GE Fanuc Intelligent Platforms, Charlottesville, VA. [www.gefanuc.com].

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Fanless & Wireless Nano-ITX Bare-Bone System

A very small wireless Nano-ITX bare-bone system is de-signed for space-limited and frequent network access applica-tions. The NTC100-LX800 from Advansus accommodates one AMD Geode LX800 @ 0.9W on a Nano-ITX motherboard and is capable of running high-quality multimedia streams up to a 500 MHz clock rate. The compact system measures 170 mm x 155 mm x 42 mm, which is smaller than a Mini-ITX form-factor.

The NTC100-LX800 is built with an ultra-low power AMD LX800 processor and CS5536 Companion Chip that dissipate a total of 2.5 watts TDP (thermal design power). The NTC100 series provides a fanless operation with one 12V DC power connector, one optional antenna via Mini-PCI slot, along with other VGA, Audio and LAN connectors. This highly reliable bare-bone system pro-vides an ideal solution for IP-STB, thin client, LCD wall displays and ultra-mobile applications.

The NTC100 series comes with a 12V DC adapter, which provides a direct power connec-tion. The black-coated system also provides an easy operation interface equipped with a power switch, two USB ports and two LED indicators for power and HDD status on the front panel. All these features make the NTC100 series easy to set up and use.Advansus Taipei, Taiwan. +886-2-8177-7089. [www.advansus.com.tw].

54 February 2008

3U CompactPCI Processor Blade with AMD Geode LX 800 @ 0.9W

Specifically designed to operate at a very low power consumption of less than 10 watts at full loading, the new cPCI-3600 series from Adlink Technology is based on the latest AMD Geode LX 800 @ 0.9W processor and AMD Geode CS5536 companion device to offer an optimal power/performance ratio for military, automation and transportation applications. With its optional soldered memory and Com-pactFlash slot, the cPCI-3600 series allows for integration in rugged applications where high vibration and adverse environments are com-mon. The cPCI-3600 series also offers two 10/100 Ethernet ports and an onboard 2.5” hard drive for versatile automation and transporta-tion applications that require reliable network connectivity and efficient remote management.

Designed in a dual-slot form-factor, the cPCI-3600 series offers memory configuration options of 256 Mbyte DDR 400 MHz memory (soldered) and one SODIMM socket that sup-ports up to 1 Gbyte of RAM. The cPCI-3600 also provides two 10/100 Ethernet ports, an onboard 2.5” IDE HDD port, one Compact-Flash socket, two USB 2.0 ports, two serial ports, one parallel port (SPP/ECP/EPP), one PS/2 keyboard/mouse interface and an AC’97 audio interface. The cPCI-3600 also supports analog display resolutions up to 1920 x 1440 32-bit at 85 Hz. The cPCI-3600 series is a re-vision controlled product that guarantees long production life support and is RoHS compli-ant. Pricing starts at $725 with volume dis-counts available.Adlink Technology, Irvine, CA. (866) 423-5465. [www.adlinktech.com].

Products&technOLOgY

125 MHz 1 to 16 Channel Digital Bit Stream PCIe Card A new PCI Express digital bit stream card comes with 16 channels that can all be set

to either input or output with a maximum clock rate of 125 MHz. With the UF2e-7005 from Strategic Test, it is possible to use only 1, 2, 4, 8 or 16 channels and use all of the available card memory. Also, when using fewer channels, it is possible to stream the data to or from a

PC at higher rates than usual, allowing much longer signals to be recorded or generated. The UF2e-7005 is equipped with 64 Mbyte

memory as standard, but can be expanded to 4 Gbytes. This enables signals to be recorded or generated for periods of up to 16 seconds on 16 channels at 125 MHz, and up to 262 seconds when using just one channel.

For many applications, it will not be nec-essary to purchase additional memory as the

signal data can be streamed to or from the host PC. As the PCI Express x1 bus has a maximum continuous transfer rate of 120

Mbytes/s this means 8 bits or less can be streamed at just less than the maximum clock rate, while 4, 2 or 1 channels can be streamed at the maximum rate. Due to the serial

bus nature of PCIe, every card can operate at this rate, unlike the 66 MHz/33 MHz PCI bus where the bandwidth is shared between multiple cards or attached motherboard devices.

Strategic Test offers a selection of software development kits including those for Win-dows Vista and XP64, XP, 2000, NT and 98, Linux drivers for RedHat, Suse, Fedora and Debian as well as for Matlab, LabView, Agilent-VEE, LabWindows/CVI and DASYLab. Prices start at $3,790. Strategic Test, Woburn, MA. [www.strategic-test.com/news].

February 2008 55

3U CompactPCI Embedded Blade PC Series Includes Rugged Conduction-Cooled Version

A Series of 3U CompactPCI blade SBCs is based on a high-performance and long-term sup-ply processing chipset from the Intel Embedded Architecture. The ITC-320 series from Thales features three types of top-per-

formance single and dual-core In-tel processors and four types of environmental builds, includ-ing a rugged conduction-cooled version. Equipped with the latest dual-core 1.5 GHz Intel Core2 Duo LV processor, the ITC-320 is able to meet high demand signal and data process-ing applications. Using the 1.2 GHz Intel Core Duo processor, the ITC-320 product is the best trade-off between computing performance and low power consumption. The ITC-320 ver-sion supports the 1.0 GHz Celeron M processor and is an ex-cellent choice when power dissipation is a critical issue.

The ITC-320 series features all the high-performance I/Os that are available on brand new laptop PCs such as an UXGA graphics controller on PCI Express, two Gigabit Eth-ernet network interfaces configurable by software either on the front RJ-45 connectors, or on the rear J2 connector, quad SATA 150 ports and quad USB 2.0 ports. An onboard USB connector is able to support a standard USB flash disk mod-ule within the 4HP form-factor. The onboard SATA 150 con-nector extends the storage capacity of the SBC with the use of a 2.5’’ device in a larger 8HP form-factor. Furthermore, the ITC-320 can easily run high-demanding applications with its high-performance PCI-compatible PCI Express configurable either as x4 or quad x1 links.

The ITC-320 series runs the 2.6 Linux kernel and fea-tures an extensible firmware interface (EFI) BIOS/Firm-ware, which is able to boot QNX, VxWorks, LynxOS and Microsoft Windows operating systems. The ITC-320 series will be available during the first quarter of 2008 and will start at $2,600 in small volume, subject to specifications. Thales, Edison, NJ. (732) 494-1010. [www.thalescomputers.com].

Untitled-5 1 10/8/07 11:54:09 AM

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Low-Cost “Anything” I/O FPGA Card

A low-cost, general-purpose program-mable I/O card connects to the host computer via USB or PC parallel port. The 7I43 from Mesa Electronics uses a 200K or 400K gate Xilinx Spartan3 FPGA for all logic, so it can credibly be called an “anything” I/O card.

The FPGA can be configured by downloading from the USB or Parallel port bus side, and also has local configuration storage available on an on-card EEPROM. Efficient switching regulators are used for FPGA core and 3.3V power, allowing the 7I43 to be USB bus pow-ered. The 7I43 can also be powered by an ex-ternal 5V source.

The 7I43 has 48 I/O bits available on two 50-pin connectors. Both connectors use I/O module rack-compatible pinouts. All I/O bits are 5V tolerant. The I/O connectors are compatible with our 7 series daughter cards for isolated I/O, motion control, RS-422 in-terface and other applications. Configurations are provided for simple GPIO, Smart Motion control (SoftDMC), host-based motion control (HostMot2), buffered step & direction genera-tion and a waveform generator. Quantity 100 price of the 7I43 is $59 (200K version) or $67 (400K version).Mesa Electronics, Richmond, CA. (510) 223-9272. [www.mesanet.com].

Passive Tap Module Uses USB Port to Simplify RS232 Troubleshooting

A passive tap module using a USB port provides a low-cost, high-performance RS-232 data monitoring and logging solution in a convenient lightweight package. The EZ-Tap from Stratus Engineering provides an easy-to-use inline passive RS-232 connection in a standard DB9 con-nector pin-out with a digital camera style “mini-B” USB connector to allow efficient USB data extraction from an MS-Windows-based Host PC.

The EZ-View companion host software allows the user to display time-tagged RS-232 communication transactions in real-time on the host PC via a scrolling window-style display. EZ-View supports various display formats as well as data save and recall for off-line analysis.

Each EZ-Tap comes complete with a passive breakout adapter, 6-foot USB cable and Stratus Engineering’s user-friendly EZ-View data-monitoring software. The EZ-Tap data-monitoring package supports standard and non-standard baud rates as high as 250 Kbits, and includes a 30-day Money-Back guarantee. Single unit pricing is $139.95 + S&H. Stratus Engineering, San Diego, CA.

(858) 663-1841. [www.stratusengineering.com].

56 February 2008

Products&technOLOgY

24 VDC UPS Features DIN Rail Mounting

An uninterruptible power supply (UPS) is vital in a mission-critical system. To ensure in-dustrial end users maximum uptime and total protection from unexpected DC power disrup-tions, Sola/Hevi-Duty has introduced the SDU DIN Rail 24V DC UPS. Available in 10 and 20A designs with a choice of two battery modules, the SDU UPS safely mounts on a DIN rail in a control panel, or can be integrated into an enclosure or machine.

Its compact modular design offers a wide operational temperature range (0°-50°C) to ensure reliable and economical power protection to 24V devices on the factory floor. It deliv-ers the ride-through needed to allow sensitive equipment to safely shut down during extended power failure, preventing costly data losses, mission interruptions and equipment damage. Other features include a rugged, industrial-grade steel enclosure with strong metal DIN Rail mounting connectors, batteries back-up expansion capabilities, LED indicators, alarms and self-diagnostic capabilities, and an optional USB port. The Sola/Hevi-Duty SDU DC UPS is expected to ship early this month. List pricing starts at $219.45.Sola/Hevi-Duty, Rosemont, IL. (800) 377-4384. [www.solaheviduty.com].

February 2008 57

Module Offers Increased Memory Support for Rabbit-Based Solutions

A new series of modules for develop-ment of applications with the 8-bit 58.98 MHz Rabbit 4000 microprocessor enables a new generation of applications that use more memory for data and code. The RCM4300 series from Rabbit provides the on-board mass storage and provides even more performance and easier design than any other alternative in its price range.

Software design is supported by a new release of Rabbit’s Dynamic C tools. Dynamic C version 10.21 includes the new Megabyte Code Support (MCS), enabling designers to use over 1 Mbyte of SRAM for shared code and data. Pin-compatible with the complete family of Rabbit 4000-based core modules, the RCM4300 supports twice as much code space compared to any other Rabbit core module, enabling complex embedded applica-tions such as data encryption and security-enabled Web servers. The RCM4300 series also provides the capability to implement up to 1 gigabyte of storage using an industry standard miniSD memory card.

To ease design effort and reduce development time, the RCM4300 development kit is available. The development kit has the essentials to design a microprocessor-based embedded system with mass storage. The kit includes an RCM4300 with a 512MB miniSD card, a prototyping board, accessories and development tools to get design engineers up and running quickly. Along with the Dynamic C integrated development software—incorporat-ing an editor, compiler and in-circuit debugger—there is also the FAT file system familiar to many programmers, RabbitWeb for creating HTML Web pages and Rabbit’s Secure Socket Layer (SSL) utility.

The price for the RCM4300 is $80 qty. 1000 and the RCM4310 is $69 qty. 1000. The RCM4300 development kit, which comes complete with all the hardware and software tools, is priced competitively at $299Rabbit, Davis, CA. (530) 757-8400. [www.rabbit.com].

@@

www.phenxint.com

www.mesanet.com

58 February 2008

Products&technOLOgY

Power Amplifier Meets Stringent VHF/UHF Comms Needs

With so much atten-tion being paid to emerging digital communications, it’s easy to overlook the requirements of analog communications. Demand remains high for power amplifiers specifically designed to meet the strict requirements of VHF/UHF analog communications. AR Modular RF has responded with the KMW2046, a 125W power amplifier. The Model KMW2046 is an RF power amplifier module that supplies 100W continuous out-put power for OEM applications or integration into a user system. The module comprises a printed wiring assembly housed in a machined aluminum enclosure with feed-through capacitive terminals for con-nection to the DC power source.

The unit operates at a frequency range of 225 to 512 MHz. Gain control is 45 dB average at 12V/0V. Gain variation versus frequency is ±1.2 dB maximum at half power. Efficiency at 100W is rated at 30 percent. The KMW2046 provides a DC correct of 12A average at 24V, 14A maximum Noise specs include a harmonic distortion of -45 dBc average, -24 dBc worst case and spurious noise at ≤ -90 dBc. Operat-ing temperature is -45° to +65°C. Baseplate temperature shutdown is at 71°C.AR Modular RF, Bothell, WA. (425) 485-9000. [www.ar-worldwide.com].

Seismic Cabinet Enclosure from Optima Fits Tight Spaces

In a design that allows the cabinet to fit in tight spaces, Optima EPS, an Elma Company, is offering Seismic cabinet enclosures with “French door” style access. In many cabinet en-closure applications, the racks are placed side-by-side closely together or are located in areas where an opened door would hit other equip-ment. The M-series cabinet from Optima solves this problem with doors that open outward with hinges justified inward. This allows the cabinet door to open fully in a French door style without the hinges or door interfering with other equipment nearby.

The M-series cabinets also feature cross bracing, back stiffeners and double-walled extrusions, providing a high strength-to-weight ra-tio to support and protect equipment during the full force of a seismic event. The design incorporates welded sockets and members, double cavity extrusions, thicker gauge rails and a welded base for extra dura-bility. A variety of rail types and hole patterns are available to meet a wide range of requirements. Optional features of the M-series cabinets include dust and moisture protection, cooling systems, cable manage-ment systems, hard-mounting, electrical plug strips, and more. The styl-ish appearance of the cabinets is protected with paint adhesion and cor-rosion resistance via phosphate pre-treating and durable acrylic coating. Pricing for the cabinets starts at under $1,300 depending on type, op-tions and quantity. Elma Electronic, Fremont, CA. 94538 (510) 656-3400. [www.elma.com].

COM Express Board Sports Core 2 Duo CPU

The COM Express form-factor is emerging as a flagship of compute-intensive bus-less modular computing. Nexcom has introduced its Core 2 Duo-based ICES 300 Computer-on-Module (COM) Express board, featuring the Intel GM965 and ICH8M chipset. It supports Intel Core 2 Duo Merom/ Core 2 Duo Merom LV processors with 667/800 MHz FSB. In addition, it also supports 2 x DDR2 memory with 533/677 MHz up to 4 Gbytes. The ICES 300 COM Express offers high processing power and vivid graphic display solutions for advanced embedded applications.

COM Express products, such as the ICES 300, enable develop-ers to implement the new peripherals with increased bandwidth and to take advantage of performance gain from CPU and chipsets, such as PCI Express and Serial ATA. Integrated with Intel Extreme Graphics 2 technology, the ICES 300 COM Express supports 1 x PCI Express x16 for superb graphic display through the carried board. It also sup-ports other display types including LFP, LVDS and wide screen up to 1920 x 1200. The high-performance ICES 300 COM Express Module is compatible with the ICEB 8050 evaluation carrier board, which sup-ports three SATA, eight USB 2.0 and five PCIe x1 lanes through the carrier board.Nexcom, Fremont, CA. (510) 656-2248. [www.nexcom.com].

Li-Ion Battery Family Targets High-Rel Apps

Lithium-ion battery technol-ogy keeps advancing. In long-range space applications using large-cell Li-ion batteries, the trend is toward subsystems that promote the safety and longevity of Li-ion while mini-mizing battery losses, and providing precision cell measurements via te-lemetry to the satellite operator. With that in mind, Aeroflex Plainview, at the NASA Aerospace Battery Workshop, Huntsville, Alabama, has announced their Battery Electronic Unit (BEU) family of Lithium-ion (Li-ion) cell balancing products.

Aeroflex’s BEUs promote and facilitate the safe use of large Li-ion batteries on spacecraft and aircraft missions of greater than 20 years. Employing state-of-the-art DC/DC converter technology integrated with Aeroflex’s legacy RadHard MIL-STD-1553 databus and ASIC so-lutions, allows Aeroflex to deliver a low-mass, energy-conservative sub-system as the ideal solution for satellite programs that desire the benefits of Li-ion technology. The four Aeroflex BEU products all offer cell bal-ancing to within +/- 5.0 mV, cell voltage monitoring accuracy +/-10 mV, total battery voltage monitoring accuracy +/-0.3 percent of full scale, MIL-STD-1553B telemetry and discrete output lines for critical signal-ing. Prices vary per each BEU product dependent on quantities and pro-fessional services associated with the specific statement of work.Aeroflex, Plainview, NY. (516) 694-6700. [www.aeroflex.com].

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60 February 2008

Last month two major events reverberated throughout the news media giving us a glimpse of things to come in at least some areas. The Consumer Electronics Show (CES) in Las Vegas

brought us a look at the newest and latest consumer goodies while automakers took the wraps off their latest offerings at the Inter-national Automobile Show in Detroit. What, you ask, have these events to do with the embedded electronics business? First, the technology shown off at CES—from Apple’s paper thin notebook to Via’s latest chips—will be the technology embedded-computer designers will be working with in coming months and years. Sec-ond, automotive technology is moving increasingly toward a far greater electronic component than ever before. Everything from propulsion-management systems to entertainment to a fully auto-mated, driverless car, is crowding autos with more and more elec-tronic content. In fact, Microsoft’s Bill Gates addressed the Auto show via Satellite.

Smaller than a BreadboxOne of the themes that showed up at CES was a new breed of

devices somewhere between the size of a cell phone and a laptop. A lot of the big players are in the game with no less than Intel, Sony and Qualcomm leading the parade. The new breed of gad-gets is expected to provide full Web access in your pocket—pro-vided your pocket is big enough. Some surveys of users trying to make their cell phones serve as Web devices found that 86% were dissatisfied with their performance. Add one more to that number. Right now the companies are rallying around the x86 architecture and Windows operation system.

A New ContenderAnd while Intel has been aggressive in shrinking its chips,

a new start-up, Via, is targeting that small computer market with an x86 chip of its own. The Taiwanese company has developed a very low-power processor for mobile applications. The chip, designed by design company Centaur and manufactured by Via, is aimed at less than full PC functionality and targeted to draw a maximum of 3.5 watts—compared with the 17 to 35 watts of today’s laptops. Expect to see this technology emerging on a va-riety of embedded platforms.

For what it’s worth (unless you are an AMD stockholder), Intel widened its lead over AMD as Intel posted an 8.5% fourth quarter growth. According to IDC, it holds 76.68% share of world-wide processor shipments up from 74.55% a year ago. According to the study, Intel led in all three categories including desktops, notebooks and servers. And while Intel is running away with the consumer business, AMD is strengthening its position in the em-bedded market with new products and approaches.

Autonomous VehicleGM brought its “self-driving” Tahoe (The Boss) to CES. The

vehicle uses a combination of LIDAR, radar, vision and mapping/GPS to see and avoid the world around it. The vehicle was devel-oped by Carnegie Mellon University, General Motors and other partners for the DARPA 2007 Urban Challenge competition. It won the event by successfully navigating 60 miles of urban traffic, busy intersections and stop signs in less than six hours. Not sure I want to do that commute. The vehicle was controlled with a variety of embedded computers. GM CEO was reported commenting that the future of transportation may well lie with autonomous-type ve-hicles and that GM was planning to continue development.

Electronics for the Auto MarketAt the recent auto show, there was a wide assortment of

electronics on display. Said one analyst, “Auto makers are really starting to understand the need to bring high tech inside the car.” One of the new items on display at this year’s event was SYNC, the Microsoft-developed communications system available only on Ford Motor Company cars. And while these and other gadgets were on display at the show, a lot of the activity surrounded vari-ous electric-car approaches. Many of the entrants boast a heritage of the same venture-capital investors that helped build Silicon Valley. Li-ion battery technology seems to lead the pack for both pure electric and hybrid models.

Drowning in a Sea of Small Form-Factor Boards?As we’ve indicated in these pages there has been an explo-

sion in small form-factor products. Many OEMs are finding they need more information and help in selecting technology suitable

Big Changes for 2008: New Technology on Nervous Economic Footing

FEBRUARY 2008

NEWS, VIEWS &Comment

February 2008 61

for their end products. That help is now on the way. Industry vet-erans Paul Rosenfeld and Colin McCracken have started an or-ganization to help people out of the woods when trying to select a small form-factor board, approach or processor. “We’ve seen customers make costly mistakes that they, in some cases, have had to live with for a long time,” says McCracken. “These could have been avoided,” he says.

The newly formed company, Abacus, plans to help OEMs as well as board vendors to sort out the embedded board business. “There has been an explosion in the number and variety of form-factors,” continues McCracken, “from ultra mobility to conven-tional x86.” He says it’s not easy to sort out the right products particularly for OEMs that only have to make a decision every few years—and fortunately or not, have to live with that decision until the next cycle. Regulatory approvals from the military, FDA or other authority further complicate and delay the process.

“There are so many more vendors,” says Rosenfeld, “with different chipsets and feature content, it’s not clear what the best alternatives might be.” McCracken and Rosenfeld have already been helping clients sort through the complex products out there. They can be reached at www.abacusipc.com.

Market DownturnAs this goes to press, the stock market—and perhaps the entire

economy—is riding a turbulent cycle of ups and downs. A little ear-lier the NASDAQ (notable for its preponderance of hi-tech stocks) took a bath leaving the index 12% below where it began the year. And among the remaining publicly traded companies in the embed-ded-computer market there was not a lot of joy. Mercury Computer reported 2Q earnings and showed a $6.09 million loss on charges. The other players including RadiSys Corporation, Interphase and Performance Technology will be reporting earnings in February.

Figure 1 is a chart of the relative stock performance of these com-panies for the past three months. As is evident, Mercury was able to hold its own until its earnings report and then it fell off a cliff.

However, taken as a whole, the results are less than sterling. Not one of the companies closed out the three months higher than they began. Let’s hope 1) this is not indicative of the embedded-computer industry in general, and 2) that these companies will turn around quickly.

As indicated last issue, many of the manufacturers of em-bedded computers remain bullish—however they are privately held companies and do not release their earnings publicly. As we noted, the fastest growing sector was in small form-factor products primarily in the control, medical, transportation and automation markets. Mercury is heavily skewed in the military and medical markets—though it does have specialty products in industrial automation and communications. RadiSys remains largely in the communications sector with its ATCA and AMC products, however it has a significant presence in some automa-tion and control markets. Interphase and Performance remain largely in the communications market.

RoundupVenture Capital investors sank close to $30 billion into

U.S.-based companies last year, the most since 2001. A lot of the money went to “clean energy” and biotech firms. However, high-

tech electronic and computer start-ups still collected their share. STMicroelectronics saw a 93% profit fall based on re-

structuring and impairment charges. The Swiss chip maker also blamed the weak dollar. However, company executives expect to see growth of 4% to 6% this year.

Motorola completed its sale of its Embedded Computer Group to Emerson Power Systems. That done, Motorola stum-bled reporting an 84% decline in fourth-quarter net as its mobile phone division continued to struggle. It would appear that Nokia is picking up at least part of the slack, posting a 44% increase for its fourth quarter, outpacing all rivals in the mobile-phone business.

Fujitsu is moving to split off its losing chip business. The company forecasts that its net will fall almost 40% through March—at least in part due to its semiconductor operations. Fu-jitsu apparently worked closely with Toshiba, which has been king of the hill as one of the world’s largest chip makers. It’s been aggressively expanding its semiconductor operations, sign-ing deals last year to buy fab lines from Sony.

Start-up Nextreme, Inc. is providing engineering samples of its heat removing technology, talking with virtually every ma-jor semiconductor manufacturer. Its microelectronic technology apparently integrates cooling into the copper pillar bumps on flip chips. For more information on Nextreme’s Thermal Copper Pil-lar Bump approach, visit its website at www.Nextreme.com.

Warren Andrews Associate Publisher

+30%

+20%

+10%

+0%

-10%

-20%

-30%

-40%

-50%November December 08

1/25/08SMAMRCY Daily

PTIXRSYSINPH

Figure 1 Realtime stock performance for the past 3 months.

62 February 2008

advertiser Index

Company Page Website

Acromag .............................................................................................................17 ................................................................................................. www.acromag.com

Critical I/O .........................................................................................................15 ..................................................................................................www.criticalio.com

Data Acquisition Showcase .................................................................................37 .............................................................................................................................

Data Devices Corporation ...................................................................................25 ..................................................................................................www.ddc-web.com

Datalight ............................................................................................................29 ................................................................................................. www.datalight.com

Diamond Systems Corporation ............................................................................31 .....................................................................................www.diamondsystems.com

Elma Bustronic Corp. ..........................................................................................19 .........................................................................................www.elmabustronic.com

Eurotech ............................................................................................................41 ..................................................................................................... www.eurotech.it

Extreme Engineering Solutions, Inc. ....................................................................27 ....................................................................................................www.xes-inc.com

GE Fanuc Embedded Systems ...............................................................................4 .................................................................................. www.gefanucembedded.com

Harting, Inc. EPT .................................................................................................40 ..............................................................................www.harting.com, www.ept.com

McObject LLC .....................................................................................................55 ................................................................................................ www.mcobject.com

Mesa Electronics ................................................................................................57 ................................................................................................. www.mesanet.com

Microsoft Windows Embedded ...........................................................................2,3 ...............................................................................www.microsoft.com/embedded

Moxa Technologies .............................................................................................33 ...................................................................................................... www.moxa.com

MVACEC .............................................................................................................59 ................................................... www.mvacec.com/www.mountainviewalliance.org

One Stop Systems ..............................................................................................45 ..................................................................................... www.onestopsystems.com

Orion Technologies,Inc ..........................................................................................6 .............................................................................................www.otisolutions.com

Performance Technologies ....................................................................................8 ........................................................................................................... www.pt.com

Phoenix International ..........................................................................................57 ................................................................................................. www.phenxint.com

Real-Time & Embedded Computing Conference....................................................53 .......................................................................................................www.rtecc.com

Red Rock Technologies, Inc. ...............................................................................55 ............................................................................................ www.redrocktech.com

Sensoray Company .............................................................................................20 .................................................................................................www.sensoray.com

Thales Computers ..............................................................................................11 .....................................................................................www.thalescomputers.com

White Electronic Designs ....................................................................................64 .......................................................................................................www.wedc.com

Wind River Systems, Inc. ....................................................................................63 ................................................................................................. www.windriver.com

RTC (Issn#1092-1524) magazine is published monthly at 905 Calle Amanecer, Ste. 250, San Clemente, CA 92673. Periodical postage paid at San Clemente and at additional mailing offices. POSTMASTER: Send address changes to RTC, 905 Calle Amanecer, Ste. 250, San Clemente, CA 92673.




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