Journal of the Korean Physical Society, Vol. 55, No. 5, November 2009, pp. 1925∼1930

The Effects of Rapid Thermal Annealingon the Performance of ZnO Thin-Film Transistors

Chan Jun Park, Young-Woong Kim, Young-Je Cho, S. M. Bobade and Duck-Kyun Choi∗

Department of Materials Science and Engineering, Hanyang University, Seoul 133-791

Sung Bo Lee

School of Materials Science and Engineering, Seoul National University, Seoul 151-744

(Received 2 September 2008)

We fabricated and characterized zinc oxide (ZnO)-based thin-film transistors (TFTs) on a glasssubstrate, which can also be applied to plastic substrates such as polyimide or polynorbornene, ata maximum process temperature of 300 C. Most of the component layers in ZnO-TFTs with abottom-gate configuration were deposited by using rf magnetron sputtering techniques, except forthe SiO2 gate insulating layer, which was deposited by using inductively coupled plasma chemicalvapor deposition (ICP-CVD). Silicon-dioxide (SiO2) and ZnO layers were separately heat-treated at300 C by rapid thermal annealing (RTA) to study its effect on the device performance. The RTA-treated film had a surface morphology similar to that of the as-deposited film, but demonstratedhigher crystallinity and transmittance, in addition to enhanced electrical properties, such as carrierconcentration and mobility. When the SiO2 layer was RTA-treated before the ZnO deposition, theZnO TFTs showed high field effect mobility and high on/off current ratio. As a result of the low-temperature RTA treatment, we successfully fabricated high-performance and highly-transparentZnO-TFTs. This process should be promising for various displays, such as organic light emittingdiode (OLED) and liquid crystal display (LCD) that require low-temperature processes.

PACS numbers: 85.30.Tv, 81.40.-z, 81.40.Tv, 73.61.Ga, 78.66.HfKeywords: Oxide TFT (thin film transistor), ZnO, Insulator, RTA (rapid thermal annealing)DOI: 10.3938/jkps.55.1925

I. INTRODUCTION

In the past few years, oxide-semiconductor-based,thin-film transistors (TFTs) have received great inter-ests because they have high mobility and a sufficienton-current [1–3]. Among the potential candidates, theZnO-based TFT has been attracting considerable atten-tion because it has a wide band gap energy of 3.37 eV, anoptical transparency in the visible region, and no degra-dation upon exposure to visible light. Moreover, ZnOcan be deposited in a poly-crystalline form at room tem-perature, extending the choice of substrates to includeeven plastics.

However, ZnO-TFTs have several deficiencies, such aslow field effect mobility, a poor on/off current ratio, andan inadequate threshold voltage, although those charac-teristics are better than those of commercial a-Si-basedTFTs or organic-material-based TFTs [4–8]. Further-more, ZnO-TFTs do not attain these desired character-istics without losing some qualities or aspects, offset-ting the gain of other qualities or aspects. These fea-

∗E-mail: duck@hanyang.ac.kr; Tel: +82-2-2220-0506

tures are affected by various factors, such as the over-all device structure, the semiconductor layer and gatedielectric quality, and the interface between the chan-nel and the gate dielectric layers. Among these rea-sons, especially, the gate dielectric greatly affects thedevice characteristics. The gate dielectric influencesnot only the morphology of the active semiconductorbut also the distribution of the localized states at thesemiconductor-dielectric interface [9]. Subsequently, apoor semiconductor-dielectric interface can increase thethreshold voltage and the gate leakage current, restrict-ing operation of the TFT and thereby limiting its appli-cation [10,11]. Owing to these reasons, the choice of thegate dielectric becomes a crucial step in device fabrica-tion. The use of moderate gate dielectrics could lead to agood-quality semiconductor, a good-quality interface be-tween semiconductor and gate dielectric, and enhancedelectrical properties, such the as threshold voltage, on/offcurrent ratio, and low voltage operation for low powerconsumption.

In this work, we investigated the properties of the in-sulator and the channel layers for ZnO-TFTs throughrapid thermal annealing (RTA) at a low temperature.

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Fig. 1. Schematic illustrations of the ZnO-TFT: (a) cross-section view and (b) top view of bottom-gate-type ZnO-TFTs.

The maximum process temperature was limited to 300C. The deposited ZnO layers were RTA-treated at 300C in order to enhance the properties. TFTs were fabri-cated and characterized to demonstrate the effect of RTAon the ZnO layer and the SiO2 layer separately.

II. EXPERIMENTAL

On the glass substrate, ITO, with a thickness of about100 nm, was deposited as a transparent bottom gate atroom temperature by rf magnetron sputtering. Then, a100-nm-thick SiO2 gate dielectric was deposited by usingan inductively coupled plasma chemical vapor deposition(ICP-CVD) system at 270 C for 100 sec. Before the de-position of ZnO on the SiO2 layer, annealing of SiO2

was carried out by RTA at 300 C for 10 min in a N2

atmosphere to study the effects of RTA treatment on theinterface between the SiO2 and the ZnO layers. Next, wedeposited a ZnO film with a thickness of 100 nm, as anactive channel layer by using rf magnetron sputtering atroom temperature, with a commercial ZnO target witha purity of 99.99 %. Considering the typical behavior ofincreased carrier concentration after RTA [5,12,13], wecontrolled the carrier concentration by using the depo-sition chamber pressure and the deposition time, whichwere 20 mTorr and 5 min, respectively-cite14,15,16. Af-ter ZnO films had been deposited, the layers were treatedby RTA at 300 C for 2 min in a N2 atmosphere in or-der to improve the crystallinity and the optical transmit-tance. Finally, ITO (100 nm) was deposited on the ZnOfilms by rf magnetron sputtering at room temperature,and the source and the drain areas were defined by usinga lift-off process, as shown in Figure 1. Figure 1 presentsa schematic of the component layers and the design ofthe bottom gate, top-contact-type ZnO-TFT. We used 5cm × 5 cm Corning 1737 glass as a substrate. Combina-tions of various channel widths (W: 10, 50, 100 µm) andlengths (L: from 10 to 100 µm with 10 µm interval) wereconsidered in the TFTs, where the W/L ratios rangedfrom 1 to 10. In this study, an unpatterned active layerwas used in fabricating TFT.

The surface morphology of the ZnO films was analyzedby using field emission scanning electron microscopy

Fig. 2. SEM images of ZnO films: (a) surface morphologyof the as-deposited ZnO film showing various grain sizes, (b)an enlarged view of (a), (c) surface morphology of the ZnOfilm treated by RTA at 300 C for 2 min, and (d) an enlargedview of (c).

(FE-SEM, Hitachi S-4700), and the crystallinity wascharacterized by using X-ray diffraction (XRD, RigakuDMAX PSPC MDG 2500). The electrical properties ofthe ZnO films were analyzed by using Hall measurements(Ecopia HMS3000) at room temperature. The opticaltransmittance and the transfer characteristics of the fab-ricated ZnO-TFTs were analyzed by using an UV-VISspectrometer (Agilent 8453) and a semiconductor param-eter analyzer (HP4155), respectively.

III. RESULTS AND DISCUSSION

The surface morphology of the as-deposited ZnO film(Figure 2(a)) shows a fairly wide grain size distribution,ranging from 20 to 180 nm. The morphology of the ZnOfilm after the RTA treatment, shown in Figure 2(c), didnot differ much from that of the as-deposited ZnO film.To evaluate the crystallinity before and after RTA, weanalyzed the deposited ZnO films by using XRD. Asshown in Figure 3, a dominant peak, which correspondedto ZnO (0002), and a very weak peak from the (0004)plane, are visible. This result indicates that the ZnOfilm had a wurtzite structure with a high crystallinityand exhibited a c-axis preferred orientation. The RTA-treated ZnO film showed a sharper and higher intensitypeak than the as-deposited ZnO film. The full width athalf maximum (FWHM) was reduced from 0.70 to 0.58after the RTA, and the ZnO (0002) diffraction angle wasslightly shifted from 34.19 to 34.70, such a tendencyhas also been reported in the literature [17,18]; the peakposition of the ZnO (0002) diffraction peak was shiftedtoward the higher angle side, and the FWHM was re-markably decreased by thermal annealing. This impliesthat the crystallinity of the ZnO film was enhanced by

The Effects of Rapid Thermal Annealing on the Performance of· · · – Chan Jun Park et al. -1927-

Fig. 3. X-ray diffraction patterns of ZnO films on a glasssubstrate: (a) XRD pattern of the as-deposited ZnO film.Only 34.19 and 71.86 peaks are shown, which correspond toZnO(0002) and ZnO(0004), respectively. (b) XRD pattern ofthe ZnO film treated by RTA at 300 C for 2 min. The widthof the ZnO(0002) peak is sharply reduced, and its intensityis increased. In addition, the ZnO(0002) and the ZnO(0004)peaks are slightly shifted to the right.

the RTA-treatment in this study and that the residualstress in the film was relieved.

The optical transmittance of the ZnO film depositedon the SiO2/ITO/Glass substrate was analyzed by us-ing an UV-VIS spectrometer over a wavelength rangefrom 300 to 1100 nm. The RTA-treated ZnO film ex-hibited a higher transmittance than the as-depositedZnO film, probably due to the improved crystallinity.For visible wavelengths from 400 to 700 nm, the as-deposited ZnO film and the RTA-treated ZnO film onthe SiO2/ITO/Glass substrate showed optical transmit-tances of 78 % and 86 %, respectively. In addition, theoptical transmittance of the ZnO-TFT with the RTA-treated ZnO film reached about 83 % in the visible re-gion. This value is similar to the optical transmittancereported in previous work [4, 13] and is very fair fromthe point of view of transparent electronics. The presentexperimental results confirmed that the crystallinity andthe optical transmittance could be improved by using aRTA treatment.

We examined the carrier concentration of the ZnOfilms on the SiO2/ITO/Glass by using Hall measure-ments. We were able to obtain an as-deposited ZnO filmwith a carrier concentration of 1012 – 1014 cm−3. Thecorresponding ranges of the resistivity and the carriermobility were 104 – 106 Ω·cm and 10−1 – 10−3 cm/V·s,respectively. In contrast, the carrier concentration, theresistivity, and the mobility of the RTA-treated ZnO filmwere approximately 1016 cm−3, 103 Ω·cm, and 100 cm/Vs, respectively. These values are in a reasonable and suf-ficient range for the RTA-treated ZnO film to be used asan active layer [17].

As previously mentioned, we treated ZnO layers by

Fig. 4. Optical transmission spectra of the component lay-ers: (a) the as-deposited ZnO film, (b) the ZnO film treatedby RTA at 300 C, and (c) the fabricated ZnO-TFT.

using RTA at 300 C in order to enhance the proper-ties and obtained properties that were better than thoseof the as-deposited layer. Subsequently, a comparativestudy was done of the characteristics of the ZnO-TFTson the RTA-untreated and -treated SiO2 layers to inves-tigate the RTA effects on the interface between the ZnOand the SiO2 layers. Thus, we fabricated ZnO-TFTs un-der the same conditions, except for the execution of RTAtreatment, and evaluated the device characteristics.

The linear region (VDS = 3 V) of the transfer char-acteristics (IDS-VGS) of our fabricated ZnO-TFTs withRTA-treated SiO2 layer is shown in Figure 5(a). Thedrain current was measured as a function of the gatevoltage (IDS-VGS) in the range from −10 V to 20 V. Allthe ZnO-TFTs were n-channel TFTs and exhibited en-hancement mode characteristics, which is preferable todepletion mode for low-power displays because the en-hancement mode is normally in an off-channel state whena gate bias is not applied. We obtained a high on-statecurrent above 20 µA at an applied gate bias of 20 V anda low off-state current of 10 pA. Therefore, the on/offcurrent ratio was 2 × 106. The mobility of ZnO-TFTswas calculated from the trans-conductance by using thestandard linear region IDS-VGS relationship:

IDS =(

W

L

)µFECi(VGS − VTH)VDS (1)

where Ci is the capacitance per area of the gate insulator,µFE is the field effect mobility, VTH is the thresholdvoltage, VGS is the applied gate-to-source voltage, andVDS is the applied drain-to-source voltage. From Eq.(1), the field effect mobility ranged from 4 – 7 cm2/V·s,and the threshold voltage was approximately 8 V.

We also calculated the saturation mobility by usingEq. (2), and the values are included in Table 3:

IDS =(

W

L

)µFEεrεo

(VGS − VTH)2

2(2)

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Table 1. Electrical properties of ZnO films obtained by using Hall measurements.

Carrier Concentration Resistivity MobilitySamples

(cm−3) (cm) (cm2/V·s)As-deposited ZnO 1012∼1014 104 ∼ 106 10−1 ∼ 10−3

300 C-RTA ZnO ∼1016 ∼103 ∼100

Fig. 5. for 10 min. The drain current for various of gatevoltages from ZnO-TFTs with W/L = (a) 100 µm / 10 µm,(c) 100 µm / 20 µm, and (e) 50 µm / 10 µm. The applieddrain voltage was 3 V. The on/off current ratio was nearly106, and the field effect mobilities were 4.83, 6.82, and 4.35cm2/V·s, respectively. The drain current for various of drainvoltages from ZnO-TFTs with W/L = (b) 100 µm / 10 µm,(d) 100 µm / 20 µm, and (e) 50 µm / 10 µm. A gate biasfrom 0 to 15 V in steps of 3 V was applied.

where W is the channel width, L is the channel length,µFE , εo, εr, are the field effect mobility, the permittivity

Table 2. XRD data of ZnO-TFTs on RTA-treated anduntreated SiO2 layers.

ZnO(0002)Samples FWHM

peak position ()

ZnO films on

Untreated SiO2 layer0.97 33.89

ZnO films on

Untreated SiO2 layer0.73 33.98

Fig. 6. X-ray diffraction patterns of ZnO films. (a) un-treated SiO2 layers and (b) on the RTA-treated.

of free space, the permittivity of gate oxide, respectively,VGS is the applied gate voltage, and VTH is thresholdvoltage. The saturation mobility ranged between 0.7 and2.1 cm2/V·s. The saturation mobility of a TFT with L= 20 is higher than that of one with L = 10 µm. Thelower mobility for the latter is associated with the short-channel effect [19].

We also found that the characteristics of all of theZnO-TFTs fabricated on glass were quite uniform, re-gardless of the transistor sizes (Figure 5). All of thetransistors showed high on/off current ratios above 106,an increase in mobility from 4 to 7 cm2/V·s, and thresh-old voltages of about 8 V. These results indicate thatthe quality of the RTA-treated ZnO film is suitable foran active channel.

To evaluate the dependence of the crystallinity of theZnO film on the RTA treatment, for the ZnO films on theRTA-treated and -untreated SiO2/ITO/Glass, we car-ried out XRD analyses. As shown in Figure 6 and Table

The Effects of Rapid Thermal Annealing on the Performance of· · · – Chan Jun Park et al. -1929-

Table 3. Electrical characteristics of ZnO-TFTs on RTA treated and untreated SiO2 layers.

W (µm) On/off µFE(lin) µFE(sat) VTH SS

/L (µm)Samples

current ratio (cm2/Vs) (cm2/Vs) (V) (V/dec.)

100 ZnO-TFTs on the as-deposited SiO2 layer 8 × 104 1.81 0.76 7.8 ∼1.7

/ 10 ZnO-TFTs on the 300 C-RTA treated SiO2 layer 2 × 106 4.35 0.85 7.8 ∼1.7

100 ZnO-TFTs on the as-deposited SiO2 layer 2 × 104 2.39 1.15 8.0 ∼1.7

/ 20 ZnO-TFTs on the 300 C-RTA treated SiO2 layer 1 × 106 6.82 2.13 7.9 ∼1.7

Fig. 7. Transfer characteristics (IDS-VGS) from ZnO-TFTs with RTA-treated and untreated SiO2 layers. Thedrain voltage to drain current with a variation of gate volt-ages from ZnO-TFTs with (a) W/L = 100 µm / 10 µm and(b) 100 µm / 20 µm. The applied drain bias was 3 V.

2, ZnO films on RTA-untreated SiO2 layers showed aFWHM of 0.97 and a ZnO (0002) diffraction angle of33.89. On the other hand, the FWHM and the ZnO(0002) diffraction angle of the ZnO films on RTA-treatedSiO2 layers were 0.73 and 33.98, respectively. For theZnO film on a RTA-treated SiO2 layer, the ZnO(0002)peak position was shifted to the right, and the FWHMwas decreased. These results indicate that the crys-tallinity of the ZnO film on the RTA-treated SiO2 wasmuch better than that of the ZnO film on the RTA-untreated SiO2 because the RTA treatment can inducea good interface between the ZnO and the SiO2 layers.

Moreover, evidence for improvement in the electrical

properties due to the interface modification is shown inFigure 7 and Table 3. The ZnO-TFTs with a W/L of 100µm / 10 µm for the untreated SiO2 layer and the RTAtreated SiO2 layer had on/off current ratios of 8 104and 1.0 106 and the field effect mobilities of 1.81 cm2/Vs and 4.35 cm2/V·s, respectively. The ZnO-TFTs with100 µm (W) and 20 (L) showed results similar to thosefor ZnO-TFTs with a width and length of 100 µm / 10µm. In particular, the on/off ratio and the field effectmobility were affected by the interface between the twolayers. In ZnO-TFTs with the RTA-treated SiO2 layer,the on/off ratio and the field effect mobility were dramat-ically increased compared with the values for ZnO-TFTson RTA-untreated SiO2 layers. The field effect mobil-ity for the devices were determined to be higher thanthe Hall mobility, which is very unusual. However, theHall mobility was measured on a sample that was biggercompared to the TFT with a much smaller channel area.Thus, the effect of scattering centers on the mobility islikely to reduce it. In addition, the use of an unpatternedactive layer can lead to an overestimate of the mobility,which seems to be the case in the present study. Thus,the higher field mobility, compared to the Hall mobility,is attributed to the unpatterned active layer and to thesample-size effect. However, the saturation mobility forthe device with W=100 and L=10 agrees well with theHall mobility. The mobility difference in TFTs with dif-ferent channel lengths is again due to the short-channeleffect.

The off-state current after the RTA treatment wasabout one order of magnitude lower than that withoutany annealing process. We suppose that the RTA treat-ment before the deposition of the ZnO film causes the af-fects better insulating properties to be better than thoseof the untreated layer even though we did not measurethe capacitance. Subsequently, this enhanced the inter-face properties between the ZnO and the SiO2 layers,besides ZnO layer acting as an active channel. Masudaet al. [5] reported that ZnO on SiO2 layers caused the dif-fusion of Zn into the SiO2 layer, thus degrading the insu-lating properties of the SiO2 layer [5]. However, we usedonly a single SiO2 layer as a gate insulator and improvedthe insulating properties with the low-temperature RTAtreatment. Thus, Zn is prevented from diffusing into theSiO2 layer, and our ZnO-TFTs on RTA-treated SiO2 re-vealed an on/off current ratio of above 106, which ismuch higher than that of ZnO-TFTs using SiNx and

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SiO2 double layers as a gate insulator.

IV. CONCLUSION

We successfully fabricated fully transparent ZnO-TFTs with high performance through a RTA treatmentat a low temperature. This was achieved by using aglass substrate and only a single SiO2 layer as a gateinsulator and by conducting the RTA treatments at amaximum temperature of 300 C after the depositions ofthe SiO2 and the ZnO layers. Through the RTA treat-ment, the ZnO film showed a good crystallinity and ahigh transmittance. Further, if the SiO2 substrate wasRTA-treated before deposition of ZnO, the drain off-current was remarkable decreased, and the on/off cur-rent ratio was increased by 102 orders, as compared withZnO-TFTs with RTA-untreated SiO2. Such an enhance-ment can be attributed to a possible enhancement of thequality of the ZnO/SiO2 interface with the application ofthe RTA-treatment. Through this method, ZnO-TFTscould be obtained with a high optical transmittance of83 %, a high on/off current ratio of 2 × 106, a thresh-old voltage of 8 V, and a mobility of about 7 cm2/V sin the linear region, showing that those ZnO-TFTs havesufficient potential for applications in flat panel displays,such as LCDs and OLEDs, and in flexible displays.

ACKNOWLEDGMENTS

This work was supported by the Korea Re-search Foundation Grant funded by the KoreanGovernment(MOEHRD)(KRF-2006-005-J04103) and bythe Korea Science and Engineering Foundation (KOSEF)grant funded by the Korea government(MEST) (No.R11-2005-048-00000-0, SRC/ERC Program, CMPS).

REFERENCES

[1] J. F. Wager, Science 300, 1245 (2003).[2] K. Nomura, H. Ohta, A. Tagaki, T. Kamiya, M. Hirano

and H. Hosono, Nature 432, 488 (2004).[3] R. Navamathavan, J. H. Lim, D. K. Hwang, B. H. Kim,

J. Y. Oh, J. H. Yang, H. S. Kim and S. J. Park, J. KoreanPhys. Soc. 48, 271 (2006).

[4] E. M. C. Fortunato, P. M. C. Barquinha, Ana C. M. B.G. Pimentel, Alecandra M. F. Goncalves, Antonio J. S.Marques, Rodrigo F. P. Martins and Luis M. N. Pereira,Appl. Phys. Lett. 85, 2541 (2004).

[5] S. Masuda, K. Kitamura, Y. Okumura, S. Miyatake, H.Tabata and T. Kawai, J. Appl. Phys. 93, 1624 (2003).

[6] R. L. Hoffman, B. J. Norris and J. F. Wager, Appl. Phys.Lett. 82, 733 (2003).

[7] P. F. Carcia, R. S. McLean, M. H. Reily and G. Nunes,Appl. Phys. Lett. 82, 1117 (2003).

[8] J. H. Jeon, H. H. Choe, K. W. Lee, J. H. Shin, C. S.Hwang, S. H. Ko Park and J. H. Seo, J. Korean Phys.Soc. 53, 415 (2008).

[9] T. B. Singh, N. Marjanovic, P. Stadler, M. Auinger, G.J. Matt, S. Gunes and N. S. Sariciftci, J. Appl. Phys. 97,083714 (2005).

[10] G. Bersuker, P. Zeitzoff, G. Brown and H. R. Huff,Mater. Today 7, 26 (2004).

[11] D. W. Greve, Field-effect Devices and Applications(Prentice Hall, Englewood Cliffs, NJ, 1998), Chap. 7,p. 263ff.

[12] R. L. Hoffman, J. Appl. Phys. 95, 5813 (2004).[13] E. Fortunato, P. Barquinha, A. Pimentel, A. Goncaves,

A. Marques, L. Pereira and R. Martins, Thin Solid Films487, 205 (2005).

[14] Q. J. Li and D. J. Li, J. Non-Cryst. Sol. 351, 3191 (2005).[15] R. Kaltofen and G. Weise, J. Nucl. Mater. 200, 375

(1993).[16] R. Kaltofen and G. Weise, Surf. Coat. Technol. 74 &

75, 469 (1995).[17] V. Gupta and A. Mansingh, J. Appl. Phys. 80, 1063

(1996).[18] J. W. Shin, J. Y. Lee, T. W. Kima, Y. S. No, W. J. Cho

and W. K. Choi, Appl. Phys. Lett. 88, 091911 (2006).[19] Jae Kyeong Jeong, Hyun-Joong Chung, Yeon-Gon Mo

and Hye Dong Kim, J. Electrochem. Soc. 155, H873(2008)