the digital silicon photomultiplier - principle of operation and...
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The Digital Silicon Photomultiplier –Principle of Operation and Intrinsic Detector
PerformanceThomas Frach, Member, IEEE, Gordian Prescher, Carsten Degenhardt, Rik de Gruyter, Anja Schmitz,
and Rob Ballizany
Abstract—We developed a fully digital implementation of theSilicon Photomultiplier. The sensor is based on a single photonavalanche photodiode (SPAD) integrated in a standard CMOSprocess. Photons are detected directly by sensing the voltage atthe SPAD anode using a dedicated cell electronics block nextto each diode. This block also contains active quenching andrecharge circuits as well as a one bit memory for the selectiveinhibit of detector cells. A balanced trigger network is used topropagate the trigger signal from all cells to the integrated time-to-digital converter (TDC). Photons are detected and countedas digital signals, thus making the sensor less susceptible totemperature variations and electronic noise. The integration withCMOS logic has the added benefit of low power consumption andpossible integration of data post-processing.
In this paper, we discuss the sensor architecture and presentfirst measurements of the technology demonstrator test chip.
I. INTRODUCTION
RECENTLY, the Silicon Photomultiplier (SiPM) gained
interest as a potential candidate to replace photomul-
tiplier tubes for reasons of ruggedness, compactness and
insensitivity to magnetic fields. Other advantages of solid
state detectors in general are their low operating voltage, low
power consumption and large scale fabrication possibilities.
Today, silicon photomultipliers operate in an analog way.
The passively-quenched Geiger-mode cells of the SiPM are
connected in parallel through a long interconnect, and the
resulting output signal is therefore the analog sum of the
individual currents of all cells. Hereby, the good intrinsic
performance of the SPAD is not fully utilized, as the generated
signal is deteriorated by the relatively large parasitics of
the on-chip interconnect, the bond wires and the external
load. Furthermore, susceptibility to electronic noise and high
sensitivity to temperature variations are typical characteristics
of the analog SiPM.
Also from the system perspective, large scale applications of
analog silicon photomultipliers imply some design challenges.
In systems comprising several tens of thousands of channels,
reading out every single channel can become a difficult
task. Usually, a dedicated multichannel mixed-signal ASIC is
needed to condition and digitize the silicon photomultiplier
output signals. As the single photon response is still in the
mV range, the signals can be easily affected by interference,
Manuscript received November 13, 2009.The authors are with Philips Digital Photon Counting, Weisshausstrasse 2,
52066 Aachen, Germany (telephone: +49 241 6003 613, e-mail: [email protected], web: www.philips.com/digitalphotoncounting).
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Fig. 1. Scintillation light detector systems based on the analog (a) and digital(b) silicon photomultiplier.
electronic noise or unstable baseline due to high dark count
levels, thus rendering single photon trigger impossible. In-
terference from the switching digital part into the low-noise
analog front-end of the readout ASIC can additionally affect
system performance. Differential current-mode logic design
can be used to minimize the switching noise in the digital
part of the ASIC at the expense of significant increase in
power consumption and heat generation. A typical single-
channel sensor/readout system based on the analog silicon
photomultiplier is shown in Fig. 1(a).
The same functionality can be realized in a single chip
according to the scheme shown in Fig. 1(b). Here, the SPADs
are integrated with conventional CMOS circuits on the same
substrate. Each SPAD has its own readout circuit, which
also provides means for active quenching and recharging
of the SPAD. A one bit memory cell integrated next to
the SPAD can be used to selectively enable or disable the
respective diode. Each cell, composed of the SPAD itself
and the corresponding electronics block, is connected to the
time-to-digital converter via a configurable, balanced trigger
network. A separate synchronous bus is used to connect each
cell to the photon counters to determine the number of detected
photons. Eventually, correction look-up tables and other data
post-processing could be implemented on the same chip. Also,
the bias voltage generation could be fully integrated with the
2009 IEEE Nuclear Science Symposium Conference Record N28-5
9781-4244-3962-1/09/$25.00 ©2009 IEEE 1959
Fig. 2. Microphotograph of the test chip.
sensor and a digital feedback control loop could be used to
automatically adapt the bias voltage to the actual value of the
breakdown and excess voltages, making the device insensitive
to temperature drifts and process variations.
II. SENSOR ARCHITECTURE
Like its analog counterparts, digital silicon photomultiplier
pixels consist of arrays of Geiger-mode microcells, each capa-
ble of detecting single photons. Contrary to the conventional
SiPM, however, each cell is capable of detecting and storing
exactly one photon. Upon the detection of a photon, the
avalanche is actively quenched using a dedicated transistor,
and a different transistor is used to quickly recharge the diode
back to its sensitive state. SPAD breakdown results in an
immediate voltage change of approximately the excess voltage
at the anode. The shape of the anode voltage pulse follows an
exponential defined by the capacitance and the inner resistance
of the diode, as long as the quenching transistor is left open.
Upon reaching the inverter threshold, the anode voltage is
forced to the breakdown voltage level by closing the quenching
transistor, thereby stopping the current flow through the diode.
The combination of the diode capacitance and the quenching
transistor feedback ensures proper storage of the information.
The quenching transistor is disconnected and the diode is reset
to sensitive state by a separate recharge transistor.
Each cell provides a fast asynchronous trigger signal and a
slower synchronous data output signal. The trigger signal is
connected to a balanced, low skew trigger network connected
to the on-chip time-to-digital converter (TDC). The trigger
network can be configured to start the TDC at the first
photon or, alternatively, at higher photon levels to reduce the
number of triggers in the case of high pixel dark count rate.
Except for the first photon trigger level, any diode breakdown
is assumed to be a dark count and is automatically reset
if it does not lead to a trigger within 10 to 15 ns from
its occurrence. This embedded refresh logic prevents dark
counts from accumulating and, eventually, reaching the trigger
threshold.
The data output signals of all cells in a column are con-
nected to the same data line and the data is applied to the
data line using a row output enable signal. Then, the acquired
data can be read out by selecting individual rows of the array
one after the other and reading the data lines at the periphery
of the pixel.
To simplify the design of the chip, the pixel is composed of
four identical subpixels, each consisting of an array of 64 × 32
cells. The cell size is 52 μm × 30 μm with 50% fill factor
including the cell electronics. One diode has been omitted in
each subpixel to make space for the trigger logic at the center
of the pixel, thus resulting in 2047 sensitive cells per subpixel.
Each subpixel has periphery logic on two adjacent sides to
control the access to the cell inhibit memory and to provide
the means to readout the data and recharge the diodes. An
integrated time-to-digital converter is connected to the trigger
block at the pixel center via the master trigger line.
A microphotograph of the technology demonstrator test chip
is shown in Fig. 2. The TDC is located at the right hand side
of the pixel array and has a block size of 96 μm × 3300 μm.
We designed diodes with 20, 25 and 30 V nominal break-
down voltage. All measurements presented in this paper were
obtained using a sensor with 25 V nominal breakdown voltage.
The actual bias voltage of the sensor equals the breakdown
voltage plus the 3.3 V excess voltage and is typically in the
28 to 30 V range, as the breakdown voltage of the sensor can
differ from die to die due to process variations.
A. Trigger and Validation Thresholds
As mentioned in the previous section, the main driver
behind subdividing the pixel into subpixels is the complexity
reduction of the full-custom design. As a side-effect, the data
readout time is also reduced by a factor of two, and the imple-
mentation of the various trigger thresholds is simplified. The
trigger thresholds are implemented in fully digital way using
logic operations on the subpixel trigger lines. Assuming that
ST1, ... ST4 are the first-photon trigger signals corresponding
to the subpixels 1, ... 4, the master trigger MT is implemented
using one of these operations:
MT=1 = ST1 ∨ ST2 ∨ ST3 ∨ ST4
MT≥2 = (ST1 ∨ ST2) ∧ (ST3 ∨ ST4)MT≥3 = (ST1 ∨ ST2) ∧ ST3 ∧ ST4
MT≥4 = ST1 ∧ ST2 ∧ ST3 ∧ ST4
(1)
This way, the trigger network can be configured to start
the TDC at the first photon or, alternatively, at ≥ 2, ≥ 3,
≥ 4 photons. The TDC is stopped by the next rising edge of
the system clock, which is used as a global time reference. A
coarse counter connected to the system clock is used to extend
the time measurement interval to 163835 ns.
The implication of this triggering scheme is that, except for
the first photon trigger, the trigger thresholds are statistical
thresholds, as, for MT≥2, the second photon can fall on the
same subpixel as the first photon and so forth. Higher trigger
1960
READY COLLECT READOUT RESETVALID?
no
yes
5 - 40ns 5 - 2560ns 320ns 10ns
trigger
Fig. 3. Typical acquisition sequence.
levels allow to control the system dead time at the expense of
a slight loss of time resolution. This is especially important in
applications where reduction of the dark count rate by active
sensor cooling is difficult to implement.
A second, higher-level energy-like threshold is implemented
in a similar way to distinguish valid events from dark counts.
The pixel is subdivided into 64 mutually exclusive regions to
allow the adjustment of the validation threshold to up to the
minimum of 64 photons. The validation logic makes use of
the fact that many photons are detected at the very beginning
of the scintillator pulse, thus increasing the probability of the
selected regions to detect a photon. On the other hand, the
probability to detect a dark count event in every selected region
in this short time span is close to zero, as dark count events are
generated independently of each other. The validation signal is
tested at a user-defined time after the trigger has been detected
and a fast pixel reset is issued in case of a dark count event
to minimize sensor dead time.
B. Data Acquisition
A typical data acquisition sequence is shown in Fig. 3.
The pixel state machine starts in the state READY with all
diodes charged above their breakdown voltage and recharge
transistors open. The master trigger starts the acquisition
sequence, forcing the pixel controller to change the state to
VALIDATE. The pixel controller stays in this state for a user-
defined time of 5 to 40 ns. After the validation hold-off timer
expired, the validation signal is checked to determine if the
event is indeed a real light pulse or a dark count. In case of
a dark count generated event, the pixel state machine changes
to RESET to quickly reset the pixel and change back to the
READY state in preparation for the next event.
In case of a real scintillator pulse, the validation threshold is
reached and the state machine changes to the state COLLECT.
While in this state, the pixel waits for the scintillator pulse
to decay. The collection time is user-defined between 5 and
2560 ns. The photons impinging on the sensor are detected and
stored in the cells for later readout. After the expiration of the
timer, the pixel state machine goes to the state READOUT. In
this state, each line of the sensor is selected separately and the
number of photons detected in the line is added to the photon
accumulator. While reading out one line, the preceding line
is recharged to avoid large current surges during the global
reset of the pixel. As the sensor is still sensitive during the
readout, half of the readout time contributes to the collection
time. Finally, the pixel controller goes to the RESET state for
global pixel recharge and TDC reset, and then back to the
READY state.
In the technology demonstrator test chip (Fig. 2), the pixel
state machine has been implemented in an FPGA and the
corrections have been done offline in software. This approach
offered greater flexibility in testing and comparing different
acquisition sequences and simplified the debugging process.
In the final sensor the acquisition controller will be placed
next to the pixel on the same substrate.
C. Saturation Correction
The photon counting capability at low light levels is realized
in the same way as in the analog SiPM, i.e. by spreading the
photons in the light pulse over the cells of the sensor. As
long as there are many more cells than photons, the deviation
from a linear sensor is negligible. At higher photon counts,
however, the saturation cannot be neglected anymore and (2)
can be used to calculate the number of photons detected by a
sensor having Ncells active cells. This equation is valid only
in the case that each cell cannot detect more than one photon
during acquisition, which is the case in the digital silicon
photomultiplier.
Ndetected = Ncells
(1 − e
−P DE·NphotonsNcells
)(2)
Equation (2) can be readily solved for Nphotons, and a look-
up table (LUT) can be used to correct the number of detected
photons for sensor saturation. As the number of active cells
can be different from one pixel to another, one correction LUT
per pixel must be provided. Area permitting, this LUT as well
as the TDC calibration LUT could be integrated on the same
chip, thereby simplifying the overall system architecture.
III. DARK COUNT RATE
The possibility to selectively activate individual cells en-
ables detailed characterization of basic sensor parameters like
the breakdown voltage, sensitivity, time resolution and trigger
network skew, and dark count rate. For example, to measure
the dark counts of a single cell, only the desired cell is enabled
and the trigger level is set to first photon trigger. The dark
count rate can be easily measured by counting the triggers per
second. This procedure can be done for all diodes in the pixel
successively. The result is the dark count rate (DCR) map
as shown in Fig. 4. It is evident that only very few diodes
contribute significantly to the total dark count rate. Switching
these diodes off can significantly reduce the total dark count
rate of the pixel and thereby minimize the system dead time.
Fig. 5 shows the histogram representations of the dark count
rates of all diodes in the pixel at four different temperatures.
The distribution of the dark count rates for most of the diodes
is close to a Gaussian with approximately 90 to 95% of the
diodes having a typical dark count rate close to the average.
Only the remaining 5 to 10% of the diodes show abnormally
high dark count rates due to defects. The average dark count
rate of a good diode at 20 ◦C is approximately 150 cps. This
can be reduced by an order of magnitude by cooling the sensor
to 0 ◦C and, in the extreme case, to less than 1 cps per diode
1961
Fig. 4. Typical dark count rate map of the sensor.
Fig. 5. DCR histograms of all SPADs in a pixel at different temperatures.
below -45 ◦C. Having the possibility to measured the statistical
distribution of the dark count rates of all individual diodes is
also a powerful tool for process development and monitoring,
as any systematic defect distribution becomes easily detectable
as a deviation from the Gaussian distribution.
The total dark count rate of the pixel is the cumulative sum
of the dark count rate distribution, shown in Fig. 5, starting
at the entry with the lowest dark count rate and ending at the
user-defined maximum. As switching off diodes is equivalent
to loss of sensitive area, the pixel dark count rate can also be
computed as a function of the number of active cells or, in
other words, the resulting relative photon detection efficiency
(PDE) of the pixel. Based on the data from Fig. 5, the total
Fig. 6. Total dark count rate of the sensor at different temperatures.
dark count rate of the pixel for the four different temperatures
is shown in Fig. 6 as a function of the resulting relative PDE.
In this particular pixel, switching off 5% of the cells would
reduce the dark count rate of the pixel by a factor of two.
Higher factors have been observed in other pixels, sometimes
leading to a reduction of the dark count rate by more than an
order of magnitude.
IV. PHOTON DETECTION EFFICIENCY
Photon detection efficiency (PDE) describes the probability
to detect a photon of a certain wavelength. The factor includes
the quantum efficiency of silicon, the avalanche generation
probability, and the fill factor of the sensor. While the quantum
efficiency of silicon is very high in the visible region of the
spectrum, the actual charge collection depends strongly on the
internal design of the avalanche photodiode. The avalanche
generation probability denotes the likelihood of an carrier
attracted into the high-field region of the junction to start an
avalanche eventually leading to the junction breakdown. This
depends on the electric field profile and the carrier type, as
the ionization coefficient for electrons is different from the
one for holes. Finally, the fill factor heavily depends on the
lateral design of the device and the area taken by the cell
electronics. In some applications, the PDE loss due to the fill
factor can be mitigated by using microlenses. However, this is
not possible in typical scintillator crystal readout as the light
emission is more or less isotropic. Therefore, high fill factor
is key to high overall PDE of the sensor. Increasing the cell
size also helps to increase the fill factor at the cost of earlier
saturation of the pixel.
Fig. 7 shows the PDE of the test chip, measured using a
monochromator setup and a calibrated reference diode. First,
the response of the optical system was measured using the
reference diode, and the photon flux at the position of the
sensor was calculated. Subsequently, the reference diode was
replaced with the test chip and the flux was attenuated with
a calibrated neutral density filter. The spectral response of
several individual cells was recorded and corrected for the
dark count background of the diodes. As the individual cells
1962
Fig. 7. Photon detection efficiency of the sensor at 3.3 V excess voltage.
TABLE IEFFECTIVE PHOTON DETECTION EFFICIENCIES FOR COMMON
SCINTILLATORS.
Scintillator Effective PDE (%) Light yield (photons/keV)
LYSO 25.9 32
CsI(Na) 23.7 41
CsI(Tl) 20.5 54
NaI(Tl) 24.2 38
BGO 24.2 8 - 10
LaBr3(Ce) 9.6 63
of the pixel were measured sequentially, any distortion due to
optical crosstalk was excluded from the measurement. All data
was measured at room temperature, using the nominal excess
voltage of 3.3 V. The measurement range was limited by the
setup to 340 - 720 nm.
Table I lists the expected effective photon detection effi-
ciencies for a number of scintillator materials. The effective
PDE is obtained through the convolution of the device PDE
with the normalized scintillator emission spectrum. The typical
light yield of the scintillator according to [1] is also given in
the table for reference.
V. OPTICAL CROSSTALK
Optical crosstalk is caused by photons generated during the
avalanche discharge of the diode [2]. These photons can initi-
ate a secondary breakdown in one of the neighboring diodes.
The probability of photoemission is directly proportional to
the current density in the high-field region of the junction.
Thus, reducing the current density inside the diode helps to
reduce the optical crosstalk. In the analog SiPM, this typically
leads to the reduction of the gain, thereby reducing the signal
to noise ratio. In the digital SiPM, the current is reduced by
discharging the diode through a dedicated quenching transistor.
Additionally, the crosstalk can be further suppressed by optical
isolation between the diodes.
The flexible sensor architecture enables direct measurements
of the optical crosstalk. The basic idea is to find a diode with
a high dark count rate in a relatively quiet environment. This
Fig. 8. Dark count map used in the randoms correction.
Fig. 9. Optical crosstalk of center cell to its neighbors.
diode can be used as a ’light generator’ to generate optical
crosstalk to its neighbors. Then, the crosstalk can be measured
selectively for all combinations of the ’light generator’ and all
of its neighbors.
To find a suitable generator diode, we first measure the
complete dark count map of the sensor. Subsequently, the
program sorts all diodes according their dark count rates and
checks the dark count rates of the 5× 5 array surrounding the
potential light source. If the dark counts of all its neighbors are
below a user-specified limit, the actual measurement is started.
The measurement starts with the re-acquisition of the dark
counts of the 5× 5 field, as the conditions may have changed
since the measurement of the full pixel DCR map. The dark
counts of the individual diodes are needed later to correct the
measured data for randomly coincident dark counts. The result
of the measurement is shown in Fig. 8.
In a second step, the ’light generator’ diode and one of the
test diodes are activated simultaneously with the trigger level
set to first photon and validating all events. The received data
packets can contain only one or two photons per event. Photon
count = 1 indicates a dark count in one of the two diodes. Pho-
ton count = 2 means either a random coincidence of two dark
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Fig. 10. Histograms of the photon counts for attenuated laser pulses.
counts, or optical crosstalk between the two diodes. The true
rate of optical crosstalk can be determined by subtracting the
expected randomly coincident dark counts using the previously
measured DCR map (Fig. 8). This procedure is carried out for
all diodes of the 5 × 5 test field separately. The resulting
optical crosstalk between the light generator diode and all its
neighbors is shown in Fig. 9.
VI. LASER MEASUREMENTS
A picosecond laser (36 ps FWHM, λ = 410 nm) was used
to characterize the photon counting performance of the test
chip. The defocussed laser beam was attenuated to flux levels
of one to fifty photons per pulse, and one million pulses were
acquired for each attenuator setting. The trigger threshold was
set at the first photon level and all events were validated. The
average number of photons in the pulse for each measurement
is derived from the histograms shown in Fig. 10. The data
was acquired at 3.3 V excess voltage and -20 ◦C to suppress
the dark count offset due to the finite collection time of the
sensor. The measurement was repeated at room temperature
with essentially the same results except for photon fluxes
below ten photons per pulse, where accumulated dark counts
became visible as a fixed offset of the number of detected
photons.
The time resolution for each attenuator setting was obtained
from the same data set. The time resolution as a function of
the mean number of photons in the laser pulse is shown in
the Fig. 11. The time resolution follows the 1/N relationship
predicted by theory [3]. The only exception is the first point,
which shows an improved time resolution. The root cause of
this anomaly is currently being investigated.
The contributions of individual system components to the
time resolution of the sensor were investigated separately at
low and high photon fluxes. The contribution of the TDC to the
time resolution is 20 ps full-width at half-maximum (FWHM).
Under low light flux conditions, the SPAD contributes 54 ps
FWHM mainly due to the avalanche spreading uncertainty.
Negligible jitter but significant systematic skew of 110 ps
FWHM have been found in the trigger network. Manual fine-
Fig. 11. Time resolution at low photon counts.
tuning of the wire lengths is underway to eliminate the trigger
network skew in future designs.
VII. TEMPERATURE SENSITIVITY
One drawback of the analog SiPM is its pronounced
sensitivity to temperature variations. Temperature affects the
ionization coefficients of the electrons and holes in silicon [4].
This leads to a temperature drift of the breakdown voltage of
the diode. Assuming constant biasing conditions, any change
in the breakdown voltage Vbd leads to a proportional change
of the SiPM gain G, according to
G =C (Vbias − Vbd)
q(3)
with C being the diode capacitance including any parasitics,
and q the electron charge.
In the digital SiPM, the voltage level at one of the SPAD
terminals is sensed and digitized by an logic gate. Therefore,
the digital SiPM is insensitive to any change in the breakdown
voltage as long as the switching threshold of the gate is
reached. The remaining drift observed in the digital SiPM is
due to the change in the photon detection efficiency, caused
by the temperature-dependent avalanche initiation probability.
This drift can only be compensated for by adapting the bias
voltage of the device.
One advantage of the digital SiPM is the possibility to
integrate the bias voltage generator on the same die. A variable
bias voltage source could be realized using e.g. a charge pump
circuit. The charge pump, together with a suitable temperature
sensor or direct breakdown voltage measurement circuit would
allow to completely compensate any temperature dependencies
of the photon detection efficiency of the device. It would
also simplify system integration, as the breakdown voltages
of individual devices can differ significantly from each other.
We measured the drift of both PDE and TDC using an
attenuated picosecond laser with approximately 2100 photons
per pulse. The nominal time resolution at this photon count
was 24 ps FWHM. We observed a drift of 0.33% per degree
Celsius in the average number of photons per pulse over a
1964
Fig. 12. Temperature drift of the mean photon count in the laser pulse.
Fig. 13. Temperature drift of the pulse time stamp.
range of 15 ◦C to 25 ◦C (see Fig. 12). This drift is an order
of magnitude lower compared to the analog silicon photo-
multiplier [5]. As the time-to-digital converter is integrated
next to the SiPM pixel, both the TDC and trigger network are
also affected by any changes in the die temperature. The time
stamp drift has been measured to be 15.3 ps per degree Celsius
(Fig. 13). This drift can be measured and compensated for
using a dedicated electrical SYNC signal, which is intended to
synchronize and calibrate the individual time stamping circuits
in large detectors.
VIII. SCINTILLATOR MEASUREMENTS
The performance of the sensor with scintillators of different
sizes has been measured and published in [5]. As an example,
two 3 mm × 3 mm × 5 mm LYSO scintillator crystals were
measured in coincidence using a 22Na source. The crystals
were wrapped in Teflon tape and mounted to the sensors using
MeltMount. The measurements were done at room temperature
and at the nominal excess voltage of 3.3 V. The energy
resolution was found to be 10.7%, and a coincidence resolving
time of 153 ps for events in the photopeak was measured.
IX. SUMMARY
We have developed a fully digital implementation of the
Silicon Photomultiplier. The device is manufactured in a
high-volume CMOS process and includes the single photon
avalanche photodiodes, the detection and readout circuits as
well as the time-to-digital converter on the same chip. The
sensor is capable of detecting single photons with a time
resolution of 140 ps FWHM. At higher photon counts, the
time resolution of the device increases to 24 ps FWHM.
The device has low temperature dependence and low power
consumption. Measurements using LYSO scintillator crystals
demonstrate the intrinsically good performance of the sensor.
Energy resolution of 10.7% and a coincidence resolving time
of 153 ps FWHM were measured under normal operating
conditions.
One of the benefits of the presented sensor architecture is
its flexibility and extensibility. Depending on the area and
power constraints, advanced data processing can be integrated
on the same die, thereby opening the way to detector-on-
chip designs. Integrated data reduction algorithms and the
possibility to daisy-chain sensors can further simplify the
construction of large-area detector systems. Moreover, the
various configuration options enable the user to optimize the
detector performance for the given operating conditions.
ACKNOWLEDGMENT
The authors thank Dr. Hein Valk of NXP Semiconductors
for many constructive discussions during the process develop-
ment and CMOS integration of the single photon avalanche
photodiode.
REFERENCES
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[3] R. F. Post and L. I. Schiff, ”Statistical limitations on the resolving timeof a scintillation counter,” Phys. Rev., vol. 80, p. 1113, 1950.
[4] S. M. Sze, Physics of Semiconductor Devices, 2nd ed. John Wiley &Sons, 1981.
[5] C. Degenhardt et al., ”The digital silicon photomultiplier - A novel sensorfor the detection of scintillation light,” Nuclear Science SymposiumConference Record, J04-1, 2009.
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