×
Log in
Upload File
Most Popular
Study
Business
Design
Technology
Travel
Explore all categories
The top documents tagged [chip network]
June 20 th 2004University of Utah1 Microarchitectural Techniques to Reduce Interconnect Power in Clustered Processors Karthik Ramani Naveen Muralimanohar
217 views
On-chip Monitoring Infrastructures and Strategies for Many-core Systems Russell Tessier, Jia Zhao, Justin Lu, Sailaja Madduri, and Wayne Burleson Research
219 views
© 2006 Regents University of California. All Rights Reserved RAMP Blue: A Message Passing Multi-Processor System on the BEE2 Andrew Schultz and Alex Krasnov
216 views
Presentation On SurfNoC: A Low Latency and Provably Non-Interfering Approach to Secure Networks-On-Chip DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING
220 views
Non-reciprocity without magneto-optics: a tutorial Shanhui Fan Ginzton Laboratory and Department of Electrical Engineering Stanford University
217 views
Power Issues in On-chip Interconnection Networks Mojtaba Amiri Nov. 5, 2009
216 views
1 Efficient Data Access in Future Memory Hierarchies Rajeev Balasubramonian School of Computing Research Buffet, Fall 2010
218 views
R OUTE P ACKETS, N OT W IRES : O N -C HIP I NTERCONNECTION N ETWORKS Veronica Eyo Sharvari Joshi
214 views
Timing Channel Protection for a Shared Memory Controller Yao Wang, Andrew Ferraiuolo, G. Edward Suh Feb 17 th 2014
217 views
Computing Without Processors By Satnam Singh Presented By : Divya Shreya Boddapati
251 views
Locality-Aware Data Replication in the Last-Level Cache
53 views
Microarchitectural Wire Management for Performance and Power in partitioned architectures
19 views
< Prev
Next >