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CHAPTER 8: SYSTEM-ON-CHIP Chris Desomer Lars Jacobs |H05B9| Advanced Platform Architectures and Mapping Methods for Embedded Applications: Lecture prof. dr. Ir. Ingrid Verbauwhede

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This lesson on System-on-Chip was given for the course "Advanced Platform Architectures and Mapping Methods for Embedded Applications" at the KU Leuven and is based on chapter 8 of 'A Practical Introduction to Hardware Software Codesign (Schaumont P.)'

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Page 1: System-on-Chip

CHAPTER 8:SYSTEM-ON-CHIP

Chris Desomer

Lars Jacobs

|H05B9| Advanced Platform Architectures and MappingMethods for Embedded Applications: Lecture

prof. dr. Ir. Ingrid Verbauwhede

Page 2: System-on-Chip

Topics for today

• SoC Concept

• Design Principles in SoC Architecture

• Example: Portable Multimedia System

• SoC Design Flow

October 4, 2013 2

http://blog.thoughtpick.com/wp-content/uploads/2011/01/web_design_services.11-18.web_content.jpg

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SoC CONCEPTSoC Concept

Design Principles in SoC Architecture

Example: Portable Multimedia System

SoC Design Flow

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Page 4: System-on-Chip

SoC Concept

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• Platform for Domain-Specific Computing

Page 5: System-on-Chip

Advantages

• Specialization of the Platform• High Processing Efficiency• Lower Power Consumption

• Flexibility of the Platform• Lower Design Cost

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Hardware Components

• CPU• Central Controller• Local Instruction Memory

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• Communication Bus• Address Map• Divided into Segments• Bus Bridge

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Hardware Components

• Bus Master• Bus Arbiter needed

when Multiple Masters

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• Custom Hardware• Standard Peripheral on System Bus

• Attached to CPU through Local Bus

• Inside CPU

Page 8: System-on-Chip

DESIGN PRINCIPLES IN SoC

ARCHITECTURESoC Concept

Design Principles in SoC Architecture

Example: Portable Multimedia System

SoC Design Flow

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Design Principles

• Heterogeneous and Distributed Data Processing

• Heterogeneous and Distributed Communications

• Heterogeneous and Distributed Storage

• Hierarchical Control

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Data Processing

• Data Processing Parallelism• Word-Level Parallelism

• Instruction-Level Parallelism

• Task-Level Parallelism

• Domain-Specific Computing

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Communications

• Central bus = bottleneck?!

• Solution: Multiple Bus Segments• Own Function and Speed

• Connected through Bus Bridges

• ≠ types of interconnection mechanisms

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Bus Topologies

• Linear• Bus Bridges

• Bus Arbitration needed

• Hierarchy

• Static Assignment

• Non – linear• Bus Switches

• Limited Scalability

• Network On Chip

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Storage

• ≠ Types of Memories • Registers

• DRAM

• SRAM

• NVROM

• NVRAM

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Control

• SoC• Outside = Single Logical Entity

• Inside = Many Hardware Modules in Parallel

• Challenge to Minimize Conflicts• Task of the Designer

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EXAMPLE: PORTABLE MULTIMEDIA SYSTEM

SoC Concept

Design Principles in SoC Architecture

Example: Portable Multimedia System

SoC Design Flow

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Digital Media Processor

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Page 17: System-on-Chip

Design Principles• Processing

• Hardwired Processing

• Signal Processing

• General-purpose Processing

• Communication• Switchbox

• Additional Dedicated Interconnects (e.g. Bus between ARM andInstruction Memory)

• Storage• Off-chip SDRAM

• Dedicated Instruction Memories attached to DSP and ARM

• Control• Optimal Parallelism controled by ARM

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Exynos 5 Dual

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SoC DESIGN FLOWSoC Concept

Design Principles in SoC Architecture

Example: Portable Multimedia System

SoC Design Flow

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Page 20: System-on-Chip

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Page 21: System-on-Chip

References

• Schaumont, P. (2012) A Practical Introduction to Hardware/Software Codesign. Springer

• Wikipedia, “System on a chip.”, http://en.wikipedia.org/wiki/System_on_a_chip

• Samsung, “Exynos 5 Dual.”, http://www.samsung.com/global/business/semiconductor/product/application/detail?productId=7668

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October 4, 2013 23