SXoM MS2-K7

System-on-Modulecompliant with SMARCTM 2.0 specifi cation

SXoM MS2-K7

Applications

Motion capturing & analysis

Medical & scientifi c imaging

Security and surveillance

High-end machine vision

Traffi c monitoring

Airborne imaging

Low Power

2.0 specifi cationSXoM MS2-K7 Low Power

SXoM MS2-K7 is a complete System-on-Module (SoM) compliant with

the SMARCTM (Smart Mobility ARChitecture) 2.0 specifi cation by SGET.

The board is designed to function as the system core of modular

platforms for high-performance DSP applications.

System-on-Module compliant with SMARCTM 2.0 specifi cation by SGET

Ultra-compact form factor: 82 mm x 50 mm

Powered by Xilinx® Zynq® Z-7030/7035/7045 SoC

Linux® board support package (BSP) available on request

FPGA IP cores and implementation support available available on request

Key Features

SXoM

The core of SXoM MS2-K7 is a Xilinx® Zynq® Z-7030/7035/7045 SoC (System-on-a-Chip)

that combines a Kintex®-7 FPGA fabric featuring up to 350K logic elements with an ARM-based dual-core hard processor

system running at up to 1 GHz, powerful enough to handle real-time processing of 4K video data.

Product and specifications are subject to change without notice.

solectrix GmbHDieter-Streng-Str. 490766 FürthGermany

Fon +49 (0) 911 - 30 91 61 - 0 Fax +49 (0) 911 - 30 91 61 - 299

sales@solectrix.de

www.solectrix.dewww.fpga.sx

Designed as System Core for Modular DSP Platforms

Flexible heterogeneous many-core architecture

Ideal for real-time high-performance image

processing and analysis tasks

FPGA and embedded software framework

Further available from Solectrix:

SMARC™ carrier board SXoM CBS2

Board support package (BSP)

FPGA IP cores and implementation support

SXoM MS2-K7

System-on-Modulecompliant with SMARCTM 2.0 specification

Kintex®-7 FPGA fabric

125K - 350K logic elements

9.3 - 19.1 Mbit block memory

400 - 900 DSP blocks

FPGA Fabric Features

1 GByte DDR3 SDRAM ×32 bit for the FPGA

Dual-core ARM® Cortex™-A9 MPCore™ processor, 667 – 1000 MHz clock frequency

5,000 DMIPS (Dhrystone 2.1) at 1,000 MHz (two cores)

32 KByte of L1 instruction cache and 32 KByte of L1 data cache per processor

512 KByte of shared L2 cache

CPU Features

512 MByte DDR3 SDRAM ×32 bit for the CPU

256 KByte of on-chip RAM

Block Diagram & Interfaces

Xilinx® Zynq® Z-7030/35/45 SoC

Dual CoreCPU

ARM® Cortex®-A9

2xGbEPHY

2xUSB 2.0

PHYHost

FPGAFabric

Xilinx® Kintex®-7

DDR3SDRAM

QSPI128Mb

DDR3SDRAM

PowerSupply

3.0 – 5.25V

x32x32

UARTCAN

2x SPISDIO

24-bit LCD3x UART

CAN

3x Tx/Rx6.6 or 12.5 Gbit/s

4x PCIe Gen2

CSI-2 4 lanes

eMMC64Gb

SDIO

Debug IF (JTAG)

SXoM MS2-K7Rev. A

SMARC™ Edge Fingers