SW and HW platforms for development of SDR systems

SW: Model-Based Design and SDRHW: Concept of Modular Design and Solutions

Fabio Ancona Sundance Italia SRL

CEO – Sales Director

www.sundance.com

Who is Sundance?

Founded in 1989 – Sundance Multiprocessor Technology Ltd. Headquarters in UK – London + Design and Production Sundance Italia SRL: EMEA + INDIA Sundance Asia Ltd: China + Pacific Sundance DSP Inc.: Americas

PRODUCT: designs, develops, manufactures and markets high performance signal processing and re-configurable systems for OEMs in the wireless and signal processing markets. Sundance is a COTS solution provider of modular DSP and FPGA-based systems as well as Data Acquisition, I/O, Communication, and interconnectivity products

Sundance is a ISO9100-2000 compliant

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Model-Based Design

Designing complex systems needs new design methodologies:– Binary coding.– Assembly coding.– C programming.– Model-Based Designing.

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Aim of Model-Based Design

Aim of Model-Based Design methodology is:– Simplify design entry.

Graphical design entry. Hierarchical system design.

– Design reuse: Design library. Sharing designs.

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Model-Based Design tools

Properties of a good Model-Based Design tool:– Easy design entry.– Design simulation.– Code generation.– Testing on real hardware.

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Easy design entry

Easy design entry helps to reduce the system design time.

The design entry tool should be:– Graphical.– Library for different functions.– Library for hardware resources.

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Design simulation

Simulation helps to find errors and bugs in the early stages of design entry.

The simulation should be:– Accurate.– Target to processor specifications.– Simple and fast.

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Code generation

Model to C and VHDL source code. Generated code should be:

– Optimized.– Suitable for embedded systems.– Be fast and without user intervention.– Provide tools to generate a downloadable

application from a generated source code.

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Testing

Testing of generated code on target hardware.

Hardware In the Loop (HIL) testing.– Designed system runs on target hardware.– Workstation send test vectors to system under

test.– Output of system under test is analyzed by

workstation.

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Model-Based Design tools

Simulink/Matlab (The MathWorks Inc) LabView (National Instruments)

– Suitable for test and measurement design.– Limited capability for embedded system

development

VEE (Agilent)– Suitable for developing test and measurement

systems.– No code generation capability.

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Simulink/Matlab

Suitable for a number of crunching systems such as SDR.

Large selection of code generation targets.– SMT6050: DSP code generation– SMT6040: VHDL code generation– SMT6041: Support for SysGen (Xilinx)

code optimization options HIL testing

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Simulink + SMT6050 + SMT6040/41

Simulink (The MathWorks Inc)– Design Entry - Simulation

SMT6040 (Sundance) - FPGA SMT6041 + SysGen (Sundance/Xilinx) - FPGA SMT6050 (Sundance) - DSP

– Code generation compatible with Sundance modules.

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SDR design

Purpose:– To demonstrate how self sufficient code could be generated

using Simulink + SMT6050 and/or SMT6040

System– FM3TR reference waveform modulator/demodulator. – Design– Simulation– Code generation– HIL testing

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FM3TR

Multi-band, Multi-waveform, Modular, Tactical Radio (FM3TR) waveform.

A reference waveform for SDR Forum consideration. – Provides the SDR Forum and its members a non-

proprietary, complex narrowband frequency-hopping waveform for implementation as a common test and demonstration tool. There are a number of systems [US, UK, DE, FR] that have already implemented and successfully demonstrated interoperability using this test waveform.

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FM3TR

Frequency range: 30-400KHz Channel spacing: 25kHz Modulation type: CPFSK Modulation rate: 25kbps Frequency hopping - 250-500 hops/second Framing, packetization 16kbps CVSD Voice coder Data channel with Reed-Solomon Coding

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FM3TR modulator/demodulator

Implemented and simulated in Simulink. Test bench.

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FM3TR modulator

Modulate the incoming signal according to FM3TR standard.

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FM3TR Demodulator

Compatible with developed modulator.

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Hardware

Sundance SDR kit.– DSP: TMS320C6416 running at 1GHz.– FPGA: Xilinx Virtex II– 2 ADC sampling rate up to 105 MHz.– 2 DAC sampling rate up to 400 MHz.– PCI interface for high speed data communication

with PC.

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Code generation (SMT6050)

Targeted Sundance SDR kit.– Building all of the required library automatically.

Libraries were compiled and linked using the specified compiler and linker switches.

– All required files was generated. C source files. Linker command file. Make file. Batch file.

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HIL testing

All of the code for HIL testing is generated automatically– Communicating with host.– Synchronization.

Data flow synchronization.

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HIL testing FM3TR

Modulator/demodulator runs on DSP.– Code for Modulator/Demodulator is generated.

Test bench runs on host.– New test bench model is created.

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FM3TR code generation

Modulator/demodulator dragged and drops to a new model.

Host communication blocks added into it.

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HIL test bench

Modulator/demodulator subsystems is replaced by SMT310 block.

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HIL testing

Generated application from modulator/ demodulator was loaded into DSP.

Test bench ran on host. The validity of generated code was proved.

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Generated code:

Generated code is fully documented:– Comment on source code.– Code generation report with a hyperlink from

Simulink block to the generated code.

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“Is code good ?”

Yes, automatically generated code is good from many perspectives:– speed– memory utilization– reliability– optimization options– one can incorporate legacy/custom code …– …