study of theoretical framework for multilevel inverter · common mode voltage: multilevel inverters...

JISEAT

ISSN: 2454-9606

Journals for International Shodh in Engineering and Technology

Website: http://jiseat.com (Volume 02, Issue 3, July 2017)

Study of Theoretical Framework for Multilevel Inverter

Yamini Joshi

[email protected]

Manoj Gupta

[email protected]

Abstract –Voltage inverters are an essential function of

power electronics in the most varied fields of

application, the best known of which is undoubtedly

that of the speed variation of AC machines. The strong

evolution of this function has relied, on the one hand,

on the development of fully controllable, powerful,

robust and fast semiconductor components, on the

other hand, on the quasi-generalized use of so-called

modulation techniques. Pulse Width Modulation

(MLI). The latter relying on the performance in

cutting frequency allowed by the former. The (noble)

character of this function (completely reversible

inverters, sophisticated form of energy conversion)

corresponds to particular interesting applications. The

objective in this paper is to present the architecture

and the control mode of these inverters, their main

applications, from the most classic to the most recent.

Keywords –EMC, FCMLI, MLI, PWM, SPWM, THD.

I. INTRODUCTION

Since the end of the nineteenth century, "electro-

technical" machines have been invented using the

properties of magnetism, and more particularly

ferromagnetism, to achieve the various possible

conversions of electrical energy forms. With the

development of automation, electronics and

computers, the "machines" can be replaced by static

inverters, which are assemblies using semiconductor

switches that can be controlled by a suitable control.

A transfer of energy between a generator and a

receiver. This transfer may be, in certain cases,

reversible.

So, it plays the role of interface between electric

power source and consumer. In reality, static

inverters can only provide a cut-off voltage (or

current) because the power electronics can only be a

switching electronics. A large number of industrial

processes rely on variable speed electric drives. In

many of these applications, the main element is a

voltage inverter that powers a machine. Inverters are

bridge structures that consist mostly of electronic

switches.

In recent years, the requirements of high voltage

power equipment for the industry has increased, and

reached the level of megawatts. The limited value of

the blocking voltage of the switches that can be

achieved so far is at the basis of the development of

multilevel inverters. This voltage is lower than the

operating voltage of high voltage equipment. To go

beyond these limitations, we have two possibilities:

The Realization of Macro-Switches: These macro-

switches are obtained by serially associating

blocking voltage switches lower than the desired

operating voltage. This technique has the

disadvantage of requiring the establishment of

balancing resistors, so that the voltage in the off state

is distributed uniformly between the different

elements constituting the macro-switch.

The Realization of a Multi-Level Inverter: This

method involves using a more complex topology

inverter. The number of switches used is of the same

order as for the inverter consisting of macro-

switches, but the elements are associated differently.

The command requires more signals, but the

resulting inverter has better performance.

In addition to providing a higher operating voltage

without the use of macro-switches, the adoption of a

multi-level inverter has other advantages:

The quality of a stepped wave: The multi-level

inverter, in addition to generating a voltage with a

very low distortion, reduces the stress dv/dt which

improves the electromagnetic compatibility (EMC)

[1].

Common Mode Voltage: Multilevel inverters

produce reduced common mode voltages; the

constraints on the motor bearings controlled by this

type of inverter are reduced. Even more, the

common mode voltage can be completely eliminated

by advanced control strategies [2].

Switching Frequency: The multi-level inverter can

operate at both the fundamental frequency and

higher PWM frequencies. It should be noted that a

lower frequency reduces switching losses and

improves performance.

Unfortunately, multilevel inverters have some

disadvantages. A particular disadvantage is the

imbalance of voltage levels across capacitors for

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mailto:[email protected]

JISEAT

ISSN: 2454-9606


Website: http://jiseat.com (Volume 02, Issue 3, July 2017) inverters that use capacitors to form DC voltage

sources, in the case of diode inverters loopback, the

goal of this work is to address the resolution of the

problem of the balancing of the voltages of the

continuous bus.

II. LITERATURE REVIEW

Finding out literature review is very important for

any research project. It clearly represents the

background development & also establishes the

need of the work. It obtain related problem regarding

improvements in the study already done in past and

allows unresolved problems to emerge. In such a

way, it clearly defines all limitation & boundaries

regarding the development of the research project.

This section discuss the previous work done on the

multilevel inverter topologies.

José Rodríguez, Jih-Sheng Lai et al. have provided

a brief summary of multilevel inverter circuit

topologies and their control strategies. They

presented the most important topologies like diode-

clamped inverter (neutral-point clamped), capacitor-

clamped (flying capacitor), and cascaded multi cell

with separate dc sources. Also presented the most

relevant control and modulation methods developed

for this family of converters: multilevel sinusoidal

pulse width modulation, multilevel selective

harmonic elimination, and space-vector modulation.

Intention of the authors was simply to provide

groundwork to readers interested in evolution of

multilevel inverter technologies, and to consider the

further way [3].

José Rodríguez, Steffen Bernet et al. have presented

technology review of voltage-source-converter

topologies for industrial medium-voltage drives. In

this highly active area, different converter

topologies and circuits have found their application

in the market. Their research work covers the high-

power voltage-source inverter and the most used

multilevel-inverter topologies, including the neutral-

point clamped, cascaded H-bridge, and flying-

capacitor converters. They have presented the

operating principle of each topology and a review of

the most relevant modulation methods, focused

mainly on those used by industry. In addition, the

latest advances and future trends of the technology

are discussed [4].

In the research work of H. S. Sangolkar and P. A.

Salodkar, they have compared three phase Cascaded

H-bridge multilevel inverter topology with the

Diode Clamped Multilevel Inverter and Flying

Capacitor Multilevel Inverter. The inverters have

been modulated by using the sinusoidal pulse width

modulation (SPWM) technique. The comparison

between these inverters is based on the %THD

present in the output voltage [5].

As suggested by Xiaoming Yuan and Ivo Barbi,

conventional diode clamping inverter suffers from

such problems as dc link unbalance, indirect

clamping of the inner devices, turn-on snubbing of

the inner dc rails as well as series association of the

clamping diodes etc. They proposed a new diode

clamping inverter, which works without the series

association of the clamping diodes. An auxiliary

resistive clamping network solving the indirect

clamping problem of the inner devices is also

discussed for both the new and conventional diode

clamping inverter. Even though the turn-on

snubbing problem and the dc link unbalance

problem are not resolved, the new diode clamping

inverter represents a relevant improvement over the

conventional structure and will facilitate the

practical application of the diode clamping

multilevel inverter in large power conversion area

[6].

Abdelaziz Fria, Rachid El Bachtiria and Abdelaziz

El Ghzizala have presented a comparative study of

three main different topologies (Flying Capacitor

Multilevel Inverter (FCMLI), the Neutral Point

Clamped Multilevel Inverter (NPCMLI), and the

Cascaded H-Bridge Multilevel Inverter (H-bridge

MLI)) of 5 levels three-phase inverters. Comparison

between these inverters is based on some criteria: the

spectral quality of the output voltage, the complexity

of the power circuits and the cost of implementation.

Each inverter is controlled by the same type of

control which is the multi-carrier sinusoidal pulse

width modulation (SPWM) [7].

Fang Zheng Peng has suggested a generalized

multilevel inverter (converter) topology with self-

voltage balancing in his research. The existing

multilevel inverters such as diode-clamped and

capacitor-clamped multilevel inverters can be

derived from the generalized inverter topology.

Moreover, the generalized multilevel inverter

topology provides a true multilevel structure that can

balance each DC voltage level automatically without

any assistance from other circuits, thus, in principle,

providing a complete and true multilevel topology

that embraces the existing multilevel inverters. From

this generalized multilevel inverter topology, several

new multilevel inverter structures can be derived.

Some application examples of the generalized

multilevel converter are given [8].

In the research work of C. Hochgraf, he has

discussed the issues affecting the application of

multilevel inverter structures as reactive power

JISEAT

ISSN: 2454-9606


Website: http://jiseat.com (Volume 02, Issue 3, July 2017) compensators and compares the device MVA and

reactive component MVA requirements of two

topologies. The modulation strategy strongly affects

the voltage balancing in the DC bus capacitors as

well as their ripple current rating and capacitance

values [9].

Liangzong et al. proposed a flying-capacitor-

clamped five-level inverter based on bridge modular

switched-capacitor topology. The inverter features

the switched-capacitor circuit with dc-dc boosting

conversion ability and the multilevel inverter circuit

with flying-capacitor-clamped performance. With

the special composite structure, the number of

components is cut down compared to the topology

of the conventional cascaded multilevel inverter.

Meanwhile, part of switches can be operated under

line voltage frequency, resulting in switching loss

reduction. Hence, the potential of system efficiency

and power density is released due to embed

switched-capacitor circuit. More importantly, the

optimized carrier-based phase disposition pulse

width modulation method is employed as a control

strategy. Under this control strategy, the capacitor

voltage self-balance can be realized and quality of

output waveforms can be improved significantly.

After simulation, the prototype is built to validate

the correctness and practicability of the analysis

[10].

Khadse et al. compare total harmonics distortion in

three level and five level diode clamped multilevel

inverter. Diode–clamped three phase topology is

considered for study. A sinusoidal PWM technique

is used to control the switches of the inverter.

Simulation study confirms the reduction in

harmonics distortion. A SPWM technique is

proposed for three-level and five-level NPC

inverter. The main feature of the modulation scheme

lies in its ability to eliminate the harmonics in the

inverter output voltages [11].

III. THEORETICAL FRAMEWORK

A. Definition of Inverters

An inverter is a static inverter providing continuous

AC conversion. For example, if a DC voltage is

available at the input and if, thanks to

semiconductors, each of the receiver terminals is

connected to one or the other. On the other side of

the input terminals, a positive or negative voltage

can be obtained between the receiver terminals. By

a suitable sequence of control of the semiconductors,

it is therefore possible to produce at the output of the

inverter an alternating voltage of zero average value.

This voltage may include one or more alternating

slots depending on whether it is an alternating slot

control or Pulse Width Modulation (PWM) control.

Figure 1: Schematic of a continuous-alternative conversion

B. Basic Structure of Single-Phase Autonomous

Inverters

Like all static inverters, an autonomous inverter is

very dependent on the characteristics of the

generator and the receiver between which it is

inserted. From these characteristics derives in

particular the nature of the commutations to be

carried out and, hence, the semiconductors to be

used. To approach the structures of the inverters, we

characterize the generator and the receiver,

continuous or alternating, of voltage or current from

the point of view of commutations, this leads us to

distinguish two types of inverters:

Voltage Inverters.

Current Inverters.

The former are powered by a DC voltage source, the

latter by a DC power source. The nature of the

continuous source imposes that of the AC receiver,

the voltage inverters supply current receivers, the

current inverters supply voltage receivers [12].

C. Voltage Inverters

A voltage inverter is an inverter which is powered

by a DC voltage source, its voltage 𝑉𝑒 is not affected

by the variations of the current flowing through it,

the DC source imposes the voltage at the input of the

inverter and therefore at its output. The most general

configuration of the single-phase voltage inverter is

the one whose structure is in full bridge as shown in

Figure 2.

Figure 2: Structure of a bridge voltage inverter

Continuous

source Inverter Load

Order

T1 T4

I

T V

T3

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Website: http://jiseat.com (Volume 02, Issue 3, July 2017) D. Performance Parameter of an Inverter

The performance of the inverters resides in the

stability of the frequency and the voltage. However,

their output quantities have harmonics that affect the

machine and its operation. By applying the Fourier

theorem, the output (voltage) values of the inverter

can be put in the following form:

𝑉(𝑡) = 𝑉0 + ∑√2𝑉𝑛 sin(𝑛𝜔𝑡) (1)

In the case of inverters 𝑉0 is equal to zero.

The effective value of a periodic quantity is given by

the following expression:

𝑉𝑒𝑓𝑓 = [1

𝑇∫ 𝑉2(𝑡)𝑑𝑡𝑇

0]

1

2 (2)

The application of this general formula gives with

the harmonic representation:

𝑉𝑒𝑓𝑓 = [∑ 𝑣𝑛2∞

𝑛=1 ]1

2 (3)

𝑛𝑡ℎ harmonic factor:

𝐻𝐹 = 𝑉𝑛/𝑉1 (4)

Distortion factor:

𝐷𝐹 =1

𝑉1[∑ (

𝑉𝑛

𝑛2)2

∞𝑛=2,3,.. ]

1

2 (5)

Distortion factor of an individual harmonic is:

𝐷𝐹 = (𝑉𝑛

𝑛2.𝑉1)2

(6)

E. Multilevel Inverter

The multilevel inverters include an array of power

semiconductors and capacitors as voltage sources,

the output voltage has a stepped waveform

considering that the switches are closed and open at

different times, depending on the number of power

switches the voltages in the output grows by adding

the voltages of the capacitors, while the power

switches support reduced voltages.

Multilevel converters in recent years have been

consolidated as one more option to convert DC/DC

power in the medium and high power range from the

economic and technical point of view, we can find

an increase in applications where the conversion of

the energy is made by multilevel converters.

F. Different Topologies of Multilevel Inverters

Figure 3: Different topologies of Multi-Level Inverters

This section is devoted to the presentation of the

main structures of the multilevel inverters: the

inverter in cascade, the inverter with loop diode, the

inverter with floating capacities.

Figure 3 shows the top-level multi-level topologies

[3] [13]:

1) Voltage Inverter with Flyback Diodes

The first topology of the multi-level voltage inverter

is the NPC (Neutral-Point-Clamped) structure. It

was first proposed in 1981 by Nabae et al. [14] [15].

At the moment, it is the most used topology in the

industry.

Basic Principles

For the sake of simplicity, we will limit the study to

a NPC inverter arm of three levels, the objective is

to determine the values that can take the voltage 𝑉𝑎0

for the different states possible of the static switches,

to show the sequences of conductions of the

switches.

In its simplest version, each branch of this inverter

has four controllable switches and six diodes, and

two capacitors connected in parallel with the input

voltage 𝑉𝑑𝑐 as shown in Figure 4 (a).

To ensure the voltage levels. The switches 𝑇11, 𝑇11′

and 𝑇12, 𝑇12′ present two switching cells or the two

switches of each cell are complementary.

(a) At three levels

MULTI-LEVEL INVERTERS

C1

Vdc/2

0 .a

T'11

Vdc/2

C2 T'12

Vdc

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(b) At five levels

Figure 4: Circuit of a phase of an NPC inverter

For an NPC inverter with 𝑁 voltage levels, we have

𝑁 possible operating sequences to generate the 𝑁

voltage levels.

And especially for the three-level NPC we have

three work sequences:

Sequences 1: Generation of the maximum level

In this case, the switches 𝑇11, 𝑇12 are on and 𝑇11′ , 𝑇12

′

are off as shown in Figure 5(a). And the output

voltage 𝑉𝑎0 is: 𝑉𝑎0 = +𝑉𝑑𝑐/2.

The voltage applied to the switches 𝑇11′ , 𝑇12

′ is:

+𝑉𝑑𝑐/2.

Sequences 2: Generation of the intermediate level

The switches 𝑇12, 𝑇11′ are on and 𝑇11, 𝑇12

′ are

blocked, in this case point a is connected directly to

the point 0 through one of the holding diodes, as

shown in Figure 5 (b). And the output voltage 𝑉𝑎0 is

therefore zero, 𝑉𝑎0 = 0.

The voltage applied to the switches 𝑇11, 𝑇12′ is:

+𝑉𝑑𝑐/2.

Sequences 3: Generation of the minimum level

In this case, the switches 𝑇11, 𝑇12 are off and 𝑇11′ , 𝑇12

′

are on as shown in Figure 5 (c). And the output

voltage 𝑉𝑎0 is: 𝑉𝑎0 = −𝑉𝑑𝑐/2.

The voltage applied to the switches 𝑇11, 𝑇12 is:

+𝑉𝑑𝑐/2.

(a)

(b)

(c)

Figure 5: Sequences of operation of a three-level NPC inverter

arm

The three possible switching states are summarized

in Table 1. State 1 represents the closed switch and

state 0 represents the open switch.

C1

C2

0

T'11 a

C3

T'12

T'13

C4

T'14

Vdc

C1

0 a

T’11

C2

T’12

Vdc

T12

a

T’11

C1

0

C2

T’12

Vdc

C1

0 a .

T’11

C2

T’12

Vdc

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Table 1: Possible states of the NPC three-level inverter

𝑻𝟏𝟏 𝑻𝟏𝟐 𝑻𝟏𝟏′ 𝑻𝟏𝟐

′ 𝑽𝒂𝟎

1 1 0 0 𝑽𝒅𝒄/𝟐

0 0 1 1 −𝑽𝒅𝒄/𝟐

0 1 1 0 0

Figure 6 illustrates the control sequences of one arm

of the inverter and the phase voltages 𝑉𝑎0, 𝑉𝑏0

(output voltage of the 2nd arm) and the phase-to-

phase voltage 𝑉𝑎𝑏.

Figure 6: The control sequences of an inverter arm and the phase

voltages 𝑉𝑎0, 𝑉𝑏0 and the phase-to-phase voltage 𝑉𝑎𝑏 in the case of a single-phase inverter

To generate the PWM control pulses of this inverter

two triangular carriers are needed. These carriers

have the same frequency fp and the same amplitude

𝐴𝑝 (Figure 7) a.

They are then compared to the reference signal

(sinus) of amplitude 𝐴𝑚 and of frequency 𝑓𝑚. Each

comparison gives 1 if a carrier is greater than or

equal to the reference, and 0 otherwise.

Figure 7: MLI control principle for a three-level NPC inverter

The switches 𝑇11′ and 𝑇12

′ are controlled in a manner

complementary to 𝑇11 and 𝑇12 respectively.

Figure 8 shows the simulation results of the output

voltages of the PWM-controlled NPC inverter. For

a DC bus 𝑉𝑑𝑐 = 100, a load consisting of a resistor

𝑅 = 11 in series with an inductance 𝐿 = 15mH, a

setting factor 𝑟 = 0.8 and the frequency modulation

index mf for the values from 8 to 16.

(a) 𝑉𝑎𝑏 for 𝑟 = 0.8, 𝑚𝑓 = 8

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(b) 𝑉𝑎𝑏 for 𝑟 = 0.8, 𝑚𝑓 = 16

Figure 8: Simulation results of the PWM control of the NPC

inverter

We note from Figure 8, this structure allows to have

3 distinct voltage levels; and that the first harmonics

due to the cutting are around twice the switching

frequency. This property is quite interesting in terms

of filtering because it makes it possible to have a

reduction of the volume of the components of the

output filter.

Advantages and Disadvantages

NPC topologies have several advantages, some of

which are listed below [16]:

All phases share the same continuous bus.

The control method is relatively simple.

Do not use transformers.

On the other hand, the disadvantage of this structure

is [17] [18]

Unbalance of capacitor voltage: Under

certain operating conditions, the voltage of

the capacitive mid-point may have very

large variations. To ensure proper

operation, a control strategy must be

provided to ensure the stability of this

voltage. This problem becomes more

complex when the number of levels is

larger.

The requirement for diodes with high

switching frequency and which must

withstand the maximum current flows in

the circuit.

The inequality of the reverse voltages

supported by the diodes.

2) Voltage Inverter with Floating Capacitors

The topology of the multilevel inverter multi-level

cell or floating capacitor inverter was proposed by

Meynard and Foch in 1992 [19]. This structure is

proposed to solve on the one hand the problem of the

balance of voltages, and on the other hand to reduce

the excessive number of diodes. In this topology, the

capacitors replace the blocking diodes, hence the

term "floating capacitor inverter".

Basic Principles

In this topology, each branch of this inverter, in the

case of a UPS with three levels, comprises four

controllable switches and four diodes, and three

capacitors; two are connected in parallel with the

input voltage Vdc and the third capacity replaces the

two blocking diodes. As shown in Figure 9 (a).

For a floating capacitor inverter with 𝑁-voltage

levels, we have 2𝑁−1 possible operating sequences

to generate the 𝑁 voltage levels.

And especially for a floating capacitor inverter with

three levels we have four sequences of functions:

Table 2 shows the output voltage (𝑉𝑎0) and the

possible switching states for three levels.

Table 2: Possible states of the inverter with floating capacitors at

three levels

𝑻𝟏𝟏 𝑻𝟏𝟐 𝑻𝟏𝟏′ 𝑻𝟏𝟐

′ 𝑽𝒂𝟎

1 1 0 0 𝑽𝒅𝒄 1 0 0 1 𝑽𝒂𝟎/𝟐

0 1 1 0 𝑽𝒂𝟎/𝟐

0 0 1 1 0

(a) At three levels

𝑉𝑑𝑐

𝐶1

𝐶2

𝐶12

𝑇11

𝑇12

𝑇12′

𝑇11′

𝑎 𝑁

0

𝐶1

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(b) At five levels

Figure 9: Circuit of a phase of a floating capacitor inverter

The MLI command for the case of the three-level

floating capacitor inverter is similarly done to the

NPC inverter, only the position of the switches being

changed.

Figure 10 shows the simulation results of the output

voltages of the three-stage floating capacitor

inverter. The parameters of load, continuous bus,

setting factor and modulation index are identical to

the previous NPC structure.

(a) 𝑉𝑎𝑏 for 𝑟 = 0.8, 𝑚𝑓 = 8

(b) 𝑉𝑎𝑏 for 𝑟 = 0.8, 𝑚𝑓 = 16

Figure 10: Simulation results of the control in MLI of the

inverter with floating capacitors Advantages and Disadvantages

This topology has several advantages, including:

Eliminates the problem of blocking diodes

in the NPC topology.

𝑉𝑑𝑐

𝐶1

𝐶2

𝐶3

𝐶4

𝐶13

𝐶13

𝐶13

𝐶12

𝐶12

𝐶11

𝑇11

𝑇12

𝑇13

𝑇14

𝑇11′

𝑇12′

𝑇13′

𝑇14′

𝑁 𝑎

𝟎

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The blocking voltage of the switches is

everywhere the same.

Since it is modular the existence for a high

number of levels is easy.

Since capacitors are never put in series

between different levels, the problem of the

imbalance of their voltage no longer exists.

However, the constraint of these inverters is the need

for a large number of capacitors, especially for a

three-phase configuration which increases the

volume of the inverter.

If its application requires nonzero initial voltages

across the capacitors, it is necessary to associate the

control strategy with a pre-charge strategy.

Moreover, it is evident that large efficient currents

will flow through these capacitors. There is a

potential for parasitic resonance between decoupled

capacitors.

3) Other Topologies

Multi-level Inverter in cascades

In application of the high voltage it is possible to

exploit the advantages of the topologies described

above. A cascaded multi-level inverter is

implemented by replacing the single-phase inverter

forming the cascading topology with a loopback

diode or floating capacitors. Figure 11 illustrates the

circuit of this new topology [17].

The Soft-Switching Inverter

Soft switching is a method that aims to reduce

switching losses and increase inverter efficiency,

this technique is achieved by conventional inverters

[19].

Generalized Multilevel Inverters

This topology was presented by Peng in 2010 as an

inverter structure from which loopback inverters and

floating capacitors can be derived [20].

In addition to these topologies discussed above,

other topologies of multi-level inverters have been

proposed, but most of them are based on "hybrid"

circuits, combinations of two basic topologies or

slight variations thereof. These topologies are:

The hybrid asymmetric inverter [21],

The inverter with cascaded bridges and DC

/ DC sources with isolation [22],

Transformer-connected inverters [23],

Diode / Capacitor-Clamped inverter:

variant of the NPC inverter [17],

The New Diode-Clamped Inverter: another

variant of the NPC inverter [17].

Figure 11: Nine level inverter by cascade association of floating

capacitor inverters

G. Comparative Summary

Table 3 [24] summarizes, for the same number of N

levels of the single output voltage, the number of

components required to design each of the three

multi-level structures for balancing the voltage

stress exerted on the switches constituting them.

Table 3: Number of components needed for the realization of the

three structures of multilevel inverters [24]

Inverter structure

Components NPC A Floating

capacitors

Cascade

Components of Main

Commutations

2. (𝑁− 1)

2. (𝑁 − 1) 2. (𝑁− 1)

Main diodes 2. (𝑁− 1)

2. (𝑁 − 1) 2. (𝑁− 1)

Blocking diodes 2. (𝑁− 2)

0 0

Continuous

Capacitors (Power) (𝑁− 1)

(𝑁 − 1) (𝑁− 1)/2

Balancing

capacitors

0 2. (𝑁 − 2)/2 0

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IV. CONCLUSION

From the point of view of the number of

components, the cascaded cell inverters seem to be

the most advantageous multilevel solution,

especially when the number of levels becomes

important. This is indeed the case for single-phase

applications such as active filtering or static

compensation, when the inverter does not need to

supply power to the system. For three-phase

applications and for a small number of levels, the

NPC inverters are interesting because the capacitors

are shared by the different branches, which allows a

balancing of the power flowing between the phases.

This balancing allows a significant reduction in the

size of the intermediate capacitors

In this paper, we have discussed the principle of

multi-level inverters. We have reviewed the

different topologies by listing the advantages and

disadvantages of each one. The switching strategies

applied to this type of inverter were then described

giving some exemplary simulation for the three-

level floating NPC, cascade and capacitor type

inverters.

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