stop watch sean hicks dongpu jin elec 307 project 2 instructor: alvaro pinto april/12/2011
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Stop Watch
Sean HicksDongpu Jin
ELEC 307 Project 2
Instructor: Alvaro Pinto
April/12/2011
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OverviewBackground and TheorySpecificationExplanationSummaryWork to Be DoneConclusion
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Background and TheoryWe are modeling a stop watch
using a FPGA board. This stop watch has the most
commonly used functionalities:◦Count, Pause and Reset.
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Background and TheoryThis is a hardware and software
co-design project. Models are written in VHDL. Individual model and the entire
system will be tested using simulators.
Design will be implemented on a FPGA board.
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Specification• Hardware: • Altera DE II board with: • Cyclone II FPGA• On board 50MHz internal clock• On board seven segments LEDs• On board push buttons
• Software: • Altera Quartus• ModelSim• VHDL
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Specification
6
Push buttons
FPGA
7-Seg LEDs
50MHz Clock
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ExplanationPrimarily Design:
◦Behavioral Model◦State Transition
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ExplanationWe have tested this model using
ModelSim, and it works fine.
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Explanation• This model does not work in Quartus.
So we moved to develop a Structural Model. • Inputs:• reset, run, pause, 50MHz internal clock.
• Outputs: • five 7-segment LEDs display each digits.
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ExplanationComponents:
◦10Hz Clock Converter, mod 10 counter, mod 6 counter, 7-seg decoder.
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SummaryEach component and the entire
system has been tested using waveform in Quartus.
The entire system also has been tested on FPGA.
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Work to Be DoneWe have done the experiment
part of this project. Just need to write the report.
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ConclusionThis concludes our presentations
of Project 2- Stop Watch.Any questions?
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ConclusionThanks for your attention!