standard arc flash relay schematics for arc quenching ......trip outputs: t1 (cb), t2 (cb), t3 (trip...
TRANSCRIPT
Instruction Booklet IB0191003ENEffective February 2021Supersedes June 2020
ContentsDescription Page
1 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 . Main and feeder breakers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 . Two mains and feeder breakers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 . Main-tie-main and feeder breakers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 . Main-main-tie-main-main and feeder breakers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Standard arc flash relay schematics for Arc Quenching Switchgear
2
Instruction Booklet IB0191003ENEffective February 2021
Standard arc flash relay schematics for Arc Quenching Switchgear
EATON www.eaton.com
1 AbbreviationsCC – Cable compartment
CB – Circuit breaker
BB – Busbar
VT – Voltage transformer
BS – Tie bus /tie circuit breaker
I> (int .) – Internal overcurrent I> (activated by internal overcur-rent module from 3 phase A, B, C &/or G/N)
I> (ext .) – External overcurrent I> (activated from external binary input(s))
Inc . – Energy source Xfmr, or gen set
Out . – Outgoing feeder
SS – Scheme selection
LHS – Left hand side
RHS – Right hand side
L> – Light signal pickup (activated by light sensor)
MT – Master trip
Solid line – Required connection
Dashed line – Optional connection
3
Instruction Booklet IB0191003ENEffective February 2021
Standard arc flash relay schematics for Arc Quenching Switchgear
EATON www.eaton.com
2. Main and feeder breakers2.1. Main and feeder breakers (SAS-1)
Figure 1. Main and feeder breakers (SAS-1).
SAS - 1
BO
2
BI5
BI6
S1
T1
S4T2
S2
S2S3
2b2a
BO
2
BI5
BI6
S4
S3
T2S1T1
SS:0 SS:0
EAFR110PLV SS:1a EAFR101C SS:0
S1/S2: L>/L>+C>S3/S4: L>/L>+C>T1/T2 Latch: ON/OFFCB1: In use / Not in useCB2: In use / Not in use BI5: MT / I>----------
Scheme Select
SS:1a
T1
T2
QD trip only with L>+I> even if setting to L> for CB trip
101C only tripped form MT signalSW1-3 set to MT (ON)
AQ110P S1 activation will only trip Cb1 and Cb2 not QD.If QD installed on line side QD could be tripped for S1 activation. Then CT connection as alt1.
Cb1
1b 1b1a
2b2a1a
1b
NA / Off
4
Instruction Booklet IB0191003ENEffective February 2021
Standard arc flash relay schematics for Arc Quenching Switchgear
EATON www.eaton.com
Trip and I/O description
EAFR110PLV – SS:1a
Table 1. Trip and I/O description - EAFR110PLV SS:1aL> I> (int.) I/O description Trip description
IL, Ig Current inputs phase IL1, IL2, IL3 and ground Ig.
No trip output
Measuring current for incoming feed.BI2 IL, Ig Binary input 2. Trip criteria: I> + L>
Trip outputs: T1 (Main LVCB), T2 (MVCB)Signal output: HSO2 (MT) to outgoing feeder EAFR101C input BI5.Signal input: L> from EAFR101C output BO1Signal output: QD fiber output signal to Arc Quenching Device.
BI2 Binary input 2. No trip output
Table 2. Trip and I/O logic - EAFR110PLV SS:1aL> I> (int.) T1 T2 T3 T4 HSO1 (I>) HSO2 (MT) BO1 QD
IL, Ig √
BI2 IL, Ig √ √ √ √ √*BI2 √
* Arc Quenching Device is triggered by the activation signals of phase overcurrent and arc light.
EAFR101C – SS:0
Table 3. Trip and I/O description - EAFR101C SS:0L> I> (ext.) I/O description Trip description
Sx* Sensor channel monitoring breaker compartment(s).
Trip criteria: I> + L> (MT from EAFR110PLV)Trip outputs: T1 (CB), T2 (CB), T3 (trip alarm). Signal output: BO1 (L> ) to main breaker EAFR11OP LV-SS1A B12 after CBFP setting time. If CB opens (BI 1-4 status signals) activate 50 ms blocking timer. - over 50ms flash, trip activation**- Less than 50ms flash, no tripIf CB closed (BI 1-4 status signals)- No blocking timer. Fast Trip
Sy* Sensor channel monitoring bus compartment. Trip criteria: I> + L>. (MT from EAFR110PLV)Trip output: T1 (CB), T2 (CB), T3 (trip alarm).Signal output: BO1 (L>) to main breaker EAFR110PLV-SS:1a BI2 after CBFP setting time.
Sz* Sensor channel monitoring cable compartment.
Trip criteria: I> + L>. (MT from EAFR110PLV)Trip output: T1 (CB), T2 (CB), T3 (trip alarm).Signal output: BO1 (L>) to main breaker EAFR110P LV-SS:1a BI2 after CBFP setting time.
* Light sensor S1, S2, S3 or S4 inputs.** Blocking timer activates only when a breaker is opened. This prevents potential nuisance operation when a circuit breaker trips to clear a downstream fault.
Table 4. Trip and I/O logic - EAFR101C-SS:0L> MT T1 T2 T3 BO1
BI5 √ √ √S1 √S2 √S3 √S4 √
5
Instruction Booklet IB0191003ENEffective February 2021
Standard arc flash relay schematics for Arc Quenching Switchgear
EATON www.eaton.com
Wiring diagram
Figure 2. Wiring diagram for main and feeder breakers (SAS-1).
EAFR
-110
PLV
X1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
X2X3
_ + _+ + + + +
12 11 10 9 8 7 6 5 4 3 2 1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
+ _
++
+_
DC
Sup
ply
(Vdc
)
AC S
uppl
y (V
ac)
+~ ~ _M
T/C
urre
ntBl
ocki
ng S
igna
l+_
S1: P
> &
L>
T1/T
2 La
tch
/ Non
Lat
ch
S5: N
A / O
ff
HSO
Lat
ch /
Non
Lat
ch8 7 6 5 4 3 2 1
I> 1
A / 5
A
FAST
/ C
BFP
Io>
1A /
5a
100
/ 150
ms
S1: L
> / L
> +
C>
S1: L
> / L
> +
C>
a / b
S2: L
> / L
> +
C>
8 7 6 5 4 3 2 1
ON
S
W2
OFF
ON
S
W1
OFF
S
chem
e
se
lect
X1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
X2_ + _+
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
+ _+_ _ +
BI3 _ +
BI4 _ +
BI5 _ +
BI6 _+ _+BO2 BO3
L>+_
CB2
b<Fd
r.1>
CB2
a<Fd
r.1>
CB1
b<M
ain1
>C
B1a<
Mai
n1>
X1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
X2_ + _+
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
+ _+_ _ +
BI3 _ +
BI4 _ +
BI5 _ +
BI6 _+ _+BO2 BO3
EAFR
-101
CEA
FR-1
01C
CB2
b<Fd
r.3>
CB2
a<Fd
r.3>
CB1
b<Fd
r.2>
CB1
a<Fd
r.2>
S
chem
e Se
lect
Non
Lat
ch
Ligh
t and
Cur
rent
CB1
not
in u
se
ON
OFF
Ligh
t and
Cur
rent
S1/S
2 Se
nsor
Cha
nnel
Lig
ht
T1 /
T2 L
atch
CB1
in u
seC
B2 n
ot in
use
CB2
in u
se
S3/S
4 Se
nsor
Cha
nnel
Lig
ht
BI5
Mas
ter T
ripC
urre
nt
SAS
- 1
Cb1
bC
b1b
Cb1
aC
b1a
Cb2
bC
b2b
Cb2
aC
b2a
6
Instruction Booklet IB0191003ENEffective February 2021
Standard arc flash relay schematics for Arc Quenching Switchgear
EATON www.eaton.com
3. Two mains and feeder breakers3.1. Two mains and feeder breakers (SAS-2)
Figure 3. Two mains and feeder breakers (SAS-2).
EAFR110PLV SS:1a
BO
2
BI5
BI6
S2
S4
S3
T2S1T1
BO
2
BI5
BI6
S2
S4
S3
T2S1T1
BI1
BI1
SS:1aSS:1a
T2
EAFR101C SS:0
S1/S2: L>/L>+C>S3/S4: L>/L>+C>T1/T2 Latch: ON/OFFCB1: In use / Not in useCB2: In use / Not in use BI5: MT / I>----------
Scheme Select
SS:0 SS:0
S1
T1
S4T2
S2
S3
BO
2
BI5
BI6
SS:0
T1
T2
S1
T1
S4T2
S2
S3
BI6
SS:0
T1
T2 T2
L>
BI5
BO
2
SAS - 2
2b2a
1b1a
2b2a
1b1a
2b2a
1b1a
2b2a
1b1a
CCC
NA / Off
7
Instruction Booklet IB0191003ENEffective February 2021
Standard arc flash relay schematics for Arc Quenching Switchgear
EATON www.eaton.com
Trip and I/O description
EAFR110PLV – SS:1a
Table 5. Trip and I/O description - EAFR110PLV SS:1aL> I> (int.) I/O description Trip description
IL, Ig Current inputs phase IL1, IL2, IL3 and ground Ig. No trip outputMeasuring current for incoming feed.
BI1 IL, Ig Binary input 1. Trip criteria: I> + L>Trip outputs: T1 (Main LVCB), T2 (MVCB)Signal output: HSO2 (MT) to outgoing feeder EAFR101C input BI5.Signal input: L> from incomer output BO1Signal output: QD fiber output signal to Arc Quenching Device.
BI2 IL, Ig Binary input2 Trip criteria: I> + L>Trip outputs: T1 (Main LVCB), T2 (MVCB)Signal output: HSO2 (MT) to outgoing feeder EAFR101C input BI5.Signal input: L> from EAFR101C output BO1Signal output: QD fiber output signal to Arc Quenching Device.
BI2 Binary input2 No trip output
Table 6. Trip and I/O logic - EAFR110PLV SS:1aL> I> (int.) T1 T2 T3 T4 HSO1 (I>) HSO2 (MT) BO1 QD
IL, Ig √
BI1 IL, Ig √ √ √ √ √*BI2 IL, Ig √ √ √ √ √ √** Arc Quenching Device is triggered by the activation signals of phase overcurrent and arc light.
EAFR101C-SS:0
Table 7. Trip and I/O description - EAFR101C SS:0L> I> (ext.) I/O description Trip description
Sx* Sensor channel monitoring breaker compartment(s).
Trip criteria: I> + L> (MT from EAFR110PLV)Trip outputs: T1 (CB), T2 (CB), T3 (trip alarm). Signal output: BO1 (L> ) to main breaker EAFR11OPLV-SS1a BI2 after CBFP setting time. If CB opens (BI 1-4 status signals) activate 50 ms blocking timer. - over 50ms flash, trip activation**- Less than 50ms flash, no tripIf CB closed (BI 1-4 status signals)- No blocking timer. Fast Trip
Sy* Sensor channel monitoring bus compartment. Trip criteria: I> + L>. (MT from EAFR110PLV)Trip output: T1 (CB), T2 (CB), T3 (trip alarm).Signal output: BO1 (L>) to main breaker EAFR110PLV-SS:1a BI2 after CBFP setting time.
Sz* Sensor channel monitoring cable compartment.
Trip criteria: I> + L>. (MT from EAFR110PLV)Trip output: T1 (CB), T2 (CB), T3 (trip alarm).Signal output: BO1 (L>) to main breaker EAFR110PLV-SS:1a BI2 after CBFP setting time.
* Light sensor S1, S2, S3 or S4 inputs.** Blocking timer activates only when a breaker is opened. This prevents potential nuisance operation when a circuit breaker trips to clear a downstream fault.
Table 8. Trip and I/O logic - EAFR101C-SS:0
L> MT T1 T2 T3 BO1BI5 √ √ √
S1 √S2 √S3 √S4 √
8
Instruction Booklet IB0191003ENEffective February 2021
Standard arc flash relay schematics for Arc Quenching Switchgear
EATON www.eaton.com
Wiring diagram
Figure 4. Wiring diagram for two mains and feeder breakers (SAS-2).
EAFR
-110
PLV
X1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
X2X3
_ + _+ + + + +
12 11 10 9 8 7 6 5 4 3 2 1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
+ _
++
+_
Batte
ry V
olta
ge (V
dc)
+ _M
T/C
urre
nt (
LHS)
Bloc
king
Sig
nal
+_
S1: P
> &
L>
T1/T
2 La
tch
/ Non
Lat
ch
S5: N
A / O
ff
HSO
Lat
ch /
Non
Lat
ch8 7 6 5 4 3 2 1
I> 1
A / 5
A
FAST
/ C
BFP
Io>
1A /
5a
100
/ 150
ms
S1: L
> / L
> +
C>
S1: L
> / L
> +
C>
a / b
S2: L
> / L
> +
C>
8 7 6 5 4 3 2 1
ON
S
W2
OFF
ON
S
W1
OFF
S
chem
e
se
lect
X1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
X2_ + _+
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
+ _+_ _ +
BI3 _ +
BI4 _ +
BI5 _ +
BI6 _+ _+BO2 BO3
L>(E
AFR
-101
C) +_
CB2
b<Fd
r.1>
CB2
a<Fd
r.1>
CB1
b<M
ain1
>C
B1a
EAFR
-101
CEA
FR-1
10PL
VX1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
X2X3
_ + _+ + + + +
12 11 10 9 8 7 6 5 4 3 2 1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
+ _
++
+_
S1: P
> &
L>
T1/T
2 La
tch
/ Non
Lat
ch
S5: N
A / O
ff
HSO
Lat
ch /
Non
Lat
ch8 7 6 5 4 3 2 1
I> 1
A / 5
A
FAST
/ C
BFP
Io>
1A /
5a
100
/ 150
ms
S1: L
> / L
> +
C>
S1: L
> / L
> +
C>
a / b
S2: L
> / L
> +
C>
8 7 6 5 4 3 2 1
ON
S
W2
OFF
ON
S
W1
OFF
S
chem
e
se
lect
+_
L>(E
AFR
-110
PLV)
+_L>
(EAF
R-1
10PL
V)<M
ain1
>
S
chem
e Se
lect
Non
Lat
ch
Ligh
t and
Cur
rent
CB1
not
in u
se
ON
OFF
Ligh
t and
Cur
rent
S1/S
2 Se
nsor
Cha
nnel
Lig
ht
T1 /
T2 L
atch
CB1
in u
seC
B2 n
ot in
use
CB2
in u
se
S3/S
4 Se
nsor
Cha
nnel
Lig
ht
BI5
Mas
ter T
ripC
urre
nt
SAS
- 2
AC S
uppl
y (V
ac)
~ ~
Cb1
bC
b2b Cb2
a
Cb1
a
MT/
Cur
rent
(RH
S)
9
Instruction Booklet IB0191003ENEffective February 2021
Standard arc flash relay schematics for Arc Quenching Switchgear
EATON www.eaton.com
4. Main-tie-main and feeder breakers4.1. Main-tie-main and feeder breakers (SAS-3)
Figure 5. Main-tie-main and feeder breakers (SAS-3).
BO
2
BI5
BI6
S2
S4
S3
T2S1T1
EAFR110PLV SS:1a EAFR101C SS:0
S1/S2: L>/L>+C >S3/S4: L>/L>+C >T1/T2 Latch: ON/OFFCB1: In use / Not in useCB2: In use / Not in use BI5: MT / I>----------
Scheme Select
SS:0
SS:1a
S1
T1
S4T2
S2
S3
BO
2
BI5
BI6
SS:0
T1
T2
S1
T3
BI1
SS:1aT2
S1
T1
S4T2
S2
S3
SS:0
T1
T2 T2
BO
2
BI5
BI6
S2
S4
S3
T2S1T1
SS:0
L>
BI1
T3
SAS - 4
2b2a
1b1a
2b2a
1b1a
2b2a
1b1a
2b2a
1b1a
NA / Off
BO
2
BI5
BI6
10
Instruction Booklet IB0191003ENEffective February 2021
Standard arc flash relay schematics for Arc Quenching Switchgear
EATON www.eaton.com
EAFR110PLV – SS:1a
Table 9. Trip and I/O description - EAFR110PLV SS:1aL> I> (int.) I/O description Trip description
IL, Ig Current inputs phase IL1, IL2, IL3 and ground Ig. No trip outputMeasuring current for incoming feed.
BI1 IL, Ig Binary input 1 Trip criteria: I> + L>Trip outputs: T1 (Main LVCB), T2 (MVCB)Signal output: HSO2 (MT) to outgoing feeder EAFR101C input BI5.Signal input: L> from EAFR101C output BO1Signal output: QD fiber output signal to Arc Quenching Device.
BI2 IL, Ig Binary input 2. Trip criteria: I> + L>Trip outputs: T1 (Main LVCB), T2 (MVCB)Signal output: HSO2 (MT) to outgoing feeder EAFR101C input BI5.Signal input: L> from EAFR101C output BO1Signal output: QD fiber output signal to Arc Quenching Device.
BI2 Binary input 2. No trip output
Table 10. Trip and I/O logic - EAFR110PLV SS:1aL> I> (int.) T1 T2 T3 T4 HSO1 (I>) HSO2 (MT) BO1 QD
IL, Ig √
BI1 IL, Ig √ √ √ √ √*BI2 IL, Ig √ √ √ √ √ √** Arc Quenching Device is triggered by the activation signals of phase overcurrent and arc light.
Trip and I/O description
EAFR110PLV – SS:1a
Table 11. Trip and I/O description - EAFR110PLV SS:1aL> I> (int.) I/O description Trip description
IL, Ig Current inputs phase IL1, IL2, IL3 and ground Ig.
No trip output
Measuring current for incoming feed.BI1 IL, Ig Binary input 1. Trip criteria: I> + L>
Trip outputs: T1 (Main LVCB), T2 (MVCB)Signal output: HSO2 (MT) to outgoing feeder EAFR101C input BI5.Signal input: L> from incomer output BO1Signal output: QD fiber output signal to Arc Quenching Device.
BI2 IL, Ig Binary input2 Trip criteria: I> + L>Trip outputs: T1 (Main LVCB), T2 (MVCB)Signal output: HSO2 (MT) to outgoing feeder EAFR101C input BI5.Signal input: L> from EAFR101C output BO1Signal output: QD fiber output signal to Arc Quenching Device.
BI2 Binary input2 No trip output
Table 12. Trip and I/O logic - EAFR110PLV SS:1aL> I> (int.) T1 T2 T3 T4 HSO1 (I>) HSO2 (MT) BO1 QD
IL, Ig √
BI1 IL, Ig √ √ √ √ √*BI2 IL, Ig √ √ √ √ √ √** Arc Quenching Device is triggered by the activation signals of phase overcurrent and arc light.
11
Instruction Booklet IB0191003ENEffective February 2021
Standard arc flash relay schematics for Arc Quenching Switchgear
EATON www.eaton.com
EAFR101C – SS:0
Table 13. Trip and I/O description - EAFR101C SS:0L> I> (ext.) I/O description Trip description
Sx* Sensor channel monitoring breaker compartment(s).
Trip criteria: I> + L> (MT from EAFR110PLV)Trip outputs: T1 (CB), T2 (CB), T3 (trip alarm). Signal output: BO1 (L> ) to main breaker EAFR11OPLV-SS1A B12 after CBFP setting time. If CB opens (BI 1-4 status signals) activate 50 ms blocking timer. - Over 50ms flash, trip activation**- Less than 50ms flash, no tripIf CB closed (BI 1-4 status signals)- No blocking timer. Fast Trip
Sy* Sensor channel monitoring bus compartment. Trip criteria: I> + L>. (MT from EAFR110PLV)Trip output: T1 (CB), T2 (CB), T3 (trip alarm).Signal output: BO1 (L>) to main breaker EAFR110PLV-SS:1a BI2 after CBFP setting time.
Sz* Sensor channel monitoring cable compartment.
Trip criteria: I> + L>. (MT from EAFR110PLV)Trip output: T1 (CB), T2 (CB), T3 (trip alarm).Signal output: BO1 (L>) to main breaker EAFR110PLV-SS:1a BI2 after CBFP setting time.
* Light sensor S1, S2, S3 or S4 inputs.** Blocking timer activates only when a breaker is opened. This prevents potential nuisance operation when a circuit breaker trips to clear a downstream fault.
Table 14. Trip and I/O logic - EAFR101C-SS:0L> MT T1 T2 T3 BO1
BI5 √ √ √S1 √S2 √S3 √S4 √
12
Instruction Booklet IB0191003ENEffective February 2021
Standard arc flash relay schematics for Arc Quenching Switchgear
EATON www.eaton.com
Wiring diagram
Figure 6. Wiring diagram for main-tie-main and feeder breakers (SAS-3).
EAFR
-110
PLV
X1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
X2X3
_ + _+ + + + +
12 11 10 9 8 7 6 5 4 3 2 1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
+ _
++
+_
Batte
ry V
olta
ge (V
dc)
+ _M
T/C
urre
nt (L
HS*
)Bl
ocki
ng S
igna
l+_
S1: P
> &
L>
T1/T
2 La
tch
/ Non
Lat
ch
S5: N
A / O
ff
HSO
Lat
ch /
Non
Lat
ch8 7 6 5 4 3 2 1
I> 1
A / 5
A
FAST
/ C
BFP
Io>
1A /
5a
100
/ 150
ms
S1: L
> / L
> +
C>
S1: L
> / L
> +
C>
a / b
S2: L
> / L
> +
C>
8 7 6 5 4 3 2 1
ON
S
W2
OFF
ON
S
W1
OFF
S
chem
e
se
lect
X1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
X2_ + _+
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
+ _+_ _ +
BI3 _ +
BI4 _ +
BI5 _ +
BI6 _+ _+BO2 BO3
L>(E
AFR
-101
C -
LHS*
) +_C
B2b<
LHS*
,Fdr
.1>
CB2
a<LH
S*,F
dr.1
>C
B1b<
LHS*
,Mai
n1>
CB1
a<LH
S*,M
ain1
>
X1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
X2_ + _+
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
+ _+_ _ +
BI3 _ +
BI4 _ +
BI5 _ +
BI6 _+ _+BO2 BO3
EAFR
-101
CEA
FR-1
01C
EAFR
-110
PLV
X1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
X2X3
_ + _+ + + + +
12 11 10 9 8 7 6 5 4 3 2 1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
+ _
++
+_
S1: P
> &
L>
T1/T
2 La
tch
/ Non
Lat
ch
S5: N
A / O
ff
HSO
Lat
ch /
Non
Lat
ch8 7 6 5 4 3 2 1
I> 1
A / 5
A
FAST
/ C
BFP
Io>
1A /
5a
100
/ 150
ms
S1: L
> / L
> +
C>
S1: L
> / L
> +
C>
a / b
S2: L
> / L
> +
C>
8 7 6 5 4 3 2 1
ON
S
W2
OFF
ON
S
W1
OFF
S
chem
e
se
lect
+_
L> (E
AFR
-110
PLV)
+_L>
(EAF
R-1
10PL
V)
L>(E
AFR
-101
C -
RH
S*)
MT/
Cur
rent
(RH
S*)
Cb2
b <R
HS*
,Fdr
.1>
Cb2
a <R
HS*
,Fdr
.1>
Cb1
b <R
HS*
,Mai
n1>
Cb1
a <R
HS*
,Mai
n1>
S
chem
e Se
lect
Non
Lat
ch
Ligh
t and
Cur
rent
CB1
not
in u
se
ON
OFF
Ligh
t and
Cur
rent
S1/S
2 Se
nsor
Cha
nnel
Lig
ht
T1 /
T2 L
atch
CB1
in u
seC
B2 n
ot in
use
CB2
in u
se
S3/S
4 Se
nsor
Cha
nnel
Lig
ht
BI5
Mas
ter T
ripC
urre
nt
SAS
- 4 AC S
uppl
y (V
ac)
~ ~
Cb1
a
Cb2
a
Cb2
bC
b1b
Cb1
bC
b2b Cb2
a
Cb1
a
13
Instruction Booklet IB0191003ENEffective February 2021
Standard arc flash relay schematics for Arc Quenching Switchgear
EATON www.eaton.com
5. Main-main-tie-main-main and feeder breakers5.1. Main main - tie - main main and feeder breakers (SAS-4)
Figure 7. Main-main-tie-main-main and feeder breakers (SAS-4).
S1
BI1
SS:1bT2
T1
T2 T2
BO
2
BI5
BI6
S2
S4
S3
T2S1T1
SS:0
SS:1a
S1
T1
S4T2
S2
S3
BO
2
BI5
BI6
SS:0
T1
T2
S1
BI1
SS:1aT2
S1
T1
S4T2
S2
S3
SS:0
T1
T2 T2
BO
2
BI5
BI6
S2
S4
S3
T2S1T1
SS:0
BI1
T1
SS:1b
T2
BI1
EAFR110PLV SS:1b EAFR101C SS:0
S1/S2: L>/L>+C>S3/S4: L>/L>+C>T1/T2 Latch: ON/OFFCB1: In use / Not in useCB2: In use / Not in use BI5: MT / I>----------
Scheme Select
L>
BO
2
BI5
BI6
S4T2
S3
BO
2
BI5
BI6
SS:0
S1
T1
S2 S1
T1
S4T2
S2
S3
SS:0
BO
2
BI5
BI6
SAS - 6
2b2a
1b1a
2b2a
1b1a
2b2a
1b1a
2b2a
1b1a
2b2a
1b1a
2b2a
1b1a
2b2a
1b1a
T3 T3
EAFR110PLV SS:1a
NA / OffNA / Off
14
Instruction Booklet IB0191003ENEffective February 2021
Standard arc flash relay schematics for Arc Quenching Switchgear
EATON www.eaton.com
Trip and I/O description
EAFR110PLV – SS:1b
Table 15. Trip and I/O description - EAFR110PLV SS:1bL> I> (int.) I/O description Trip description
IL, Ig Current inputs phase IL1, IL2, IL3 and ground Ig. No trip outputMeasuring current for incoming feed.
BI1 IL, Ig Binary input 1 Trip criteria: I> + L>Trip outputs: T1 (Main LVCB), T2 (MVCB)Signal output: HSO2 (MT) to outgoing feeder EAFR101C input BI5.Signal input: L> from EAFR101C output BO1Signal output: QD fiber output signal to Arc Quenching Device.
BI2 IL, Ig Binary input 2. Trip criteria: I> + L>Trip outputs: T1 (Main LVCB), T2 (MVCB)Signal output: HSO2 (MT) to outgoing feeder EAFR101C input BI5.Signal input: L> from EAFR101C output BO1Signal output: QD fiber output signal to Arc Quenching Device.
BI2 Binary input 2. No trip output
Table 16. Trip and I/O logic - EAFR110PLV SS:1bL> I> (int.) T1 T2 T3 T4 HSO1 (I>) HSO2 (MT) BO1 QD
IL, Ig √
BI1 IL, Ig √ √ √ √ √*BI2 IL, Ig √ √ √ √ √ √** Arc Quenching Device is triggered by the activation signals of phase overcurrent and arc light.
EAFR101C – SS:0
Table 17. Trip and I/O description - EAFR101C SS:0L> I> (ext.) I/O description Trip description
Sx* Sensor channel monitoring breaker compartment(s).
Trip criteria: I> + L> (MT from EAFR110PLV)Trip outputs: T1 (CB), T2 (CB), T3 (trip alarm). Signal output: BO1 (L> ) to main breaker EAFR11OPLV-SS1A B12 after CBFP setting time. If CB opens (BI 1-4 status signals) activate 50 ms blocking timer. - Over 50ms flash, trip activation**- Less than 50ms flash, no tripIf CB closed (BI 1-4 status signals)- No blocking timer. Fast Trip
Sy* Sensor channel monitoring bus compartment. Trip criteria: I> + L>. (MT from EAFR110PLV)Trip output: T1 (CB), T2 (CB), T3 (trip alarm).Signal output: BO1 (L>) to main breaker EAFR110PLV-SS:1a BI2 after CBFP setting time.
Sz* Sensor channel monitoring cable compartment.
Trip criteria: I> + L>. (MT from EAFR110PLV)Trip output: T1 (CB), T2 (CB), T3 (trip alarm).Signal output: BO1 (L>) to main breaker EAFR110PLV-SS:1a BI2 after CBFP setting time.
* Light sensor S1, S2, S3 or S4 inputs.** Blocking timer activates only when a breaker is opened. This prevents potential nuisance operation when a circuit breaker trips to clear a downstream fault.
Table 18. Trip and I/O logic - EAFR101C-SS:0L> MT T1 T2 T3 BO1
BI5 √ √ √S1 √S2 √S3 √S4 √
15
Instruction Booklet IB0191003ENEffective February 2021
Standard arc flash relay schematics for Arc Quenching Switchgear
EATON www.eaton.com
Wiring diagram
Figure 8. Wiring diagram for main-main-tie-main-main and feeder breakers (SAS-4).
EAFR
-110
PLV
X1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
X2X3
_ + _+ + + + +
12 11 10 9 8 7 6 5 4 3 2 1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
+ _
++
+_
Batte
ry V
olta
ge (V
dc)
+ _M
T/C
urre
nt (L
HS*
)Bl
ocki
ng S
igna
l+_
S1: P
> &
L>
T1/T
2 La
tch
/ Non
Lat
ch
S5: N
A / O
ff
HSO
Lat
ch /
Non
Lat
ch8 7 6 5 4 3 2 1
I> 1
A / 5
A
FAST
/ C
BFP
Io>
1A /
5a
100
/ 150
ms
S1: L
> / L
> +
I>
S1: L
> / L
> +
I>
a / b
S2: L
> / L
> +
I>8 7 6 5 4 3 2 1
ON
S
W2
OFF
ON
S
W1
OFF
S
chem
e
se
lect
X1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
X2_ + _+
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
+ _+_ _ +
BI3 _ +
BI4 _ +
BI5 _ +
BI6 _+ _+BO2 BO3
L>(E
AFR
-101
C -
LHS*
) +_C
B2b<
LHS*
,Fdr
.1>
CB2
a<LH
S*,F
dr.1
>C
B1b<
LHS*
,Mai
n.1>
CB1
a<LH
S*,M
ain.
1>
X1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
X2_ + _+
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
+ _+_ _ +
BI3 _ +
BI4 _ +
BI5 _ +
BI6 _+ _+BO2 BO3
EAFR
-101
CEA
FR-1
01C
EAR
F-11
0PLV
X1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
X2X3
_ + _+ + + + +
12 11 10 9 8 7 6 5 4 3 2 1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
+ _
++
+_
S1: P
> &
L>
T1/T
2 La
tch
/ Non
Lat
ch
S5: N
A / O
ff
HSO
Lat
ch /
Non
Lat
ch8 7 6 5 4 3 2 1
I> 1
A / 5
A
FAST
/ C
BFP
Io>
1A /
5a
100
/ 150
ms
S1: L
> / L
> +
C>
S1: L
> / L
> +
C>
a / b
S2: L
> / L
> +
C>
8 7 6 5 4 3 2 1
ON
S
W2
OFF
ON
S
W1
OFF
S
chem
e
se
lect
+_L>
(EAF
R-1
10PL
V)
L>(E
AFR
-101
C -
RH
S*)
MT/
Cur
rent
(RH
S*)
Cb2
b <R
HS*
,Fdr
.1>
Cb2
a <R
HS*
,Fdr
.1>
Cb1
b <R
HS*
,Mai
n.1>
Cb1
a <R
HS*
,Mai
n.1>
S
chem
e Se
lect
Non
Lat
ch
Ligh
t and
Cur
rent
CB1
not
in u
se
ON
OFF
Ligh
t and
Cur
rent
S1/S
2 Se
nsor
Cha
nnel
Lig
ht
T1 /
T2 L
atch
CB1
in u
seC
B2 n
ot in
use
CB2
in u
se
S3/S
4 Se
nsor
Cha
nnel
Lig
ht
BI5
Mas
ter T
ripC
urre
nt
EAFR
-110
PLV
X1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
X2X3
_ + _+ + + + +
12 11 10 9 8 7 6 5 4 3 2 1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
+ _
++
+_
S1: P
> &
L>
T1/T
2 La
tch
/ Non
Lat
ch
S5: N
A / O
ff
HSO
Lat
ch /
Non
Lat
ch8 7 6 5 4 3 2 1
I> 1
A / 5
A
FAST
/ C
BFP
Io>
1A /
5a
100
/ 150
ms
S1: L
> / L
> +
C>
S1: L
> / L
> +
C>
a / b
S2: L
> / L
> +
C>
8 7 6 5 4 3 2 1
ON
S
W2
OFF
ON
S
W1
OFF
S
chem
e
se
lect
EAR
F-11
0PLV
X1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
X2X3
_ + _+ + + + +
12 11 10 9 8 7 6 5 4 3 2 1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
+ _
++
+_
S1: P
> &
L>
T1/T
2 La
tch
/ Non
Lat
ch
S5: N
A / O
ff
HSO
Lat
ch /
Non
Lat
ch8 7 6 5 4 3 2 1
I> 1
A / 5
A
FAST
/ C
BFP
Io>
1A /
5a
100
/ 150
ms
S1: L
> / L
> +
C>
S1: L
> / L
> +
C>
a / b
S2: L
> / L
> +
C>
8 7 6 5 4 3 2 1
ON
S
W2
OFF
ON
S
W1
OFF
S
chem
e
se
lect
SAS
- 6
AC S
uppl
y (V
ac)
~ ~
Cb1
a
Cb2
a
Cb2
bC
b1b
Cb1
a
Cb2
a
Cb2
bC
b1b
Eaton1000 Eaton BoulevardCleveland, OH 44122United StatesEaton .com
© 2021 EatonAll Rights ReservedPrinted in USAPublication No . IB0191003EN / TBG 001490February 2021
Eaton is a registered trademark.
All other trademarks are property of their respective owners.
Standard arc flash relay schematics for Arc Quenching Switchgear
Instruction Booklet IB0191003ENEffective February 2021
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