spry 241

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Building blocks of a power-efcient system Several techniques can be implemented to reduce active and static power consumption. Typ ically the highest impact on power consumption is due to four key components – the processor, DDR memory, display and power design, as shown by Figure 1. Power optimization can be achieved by selecting the right system components and designing dynamic software architecture. Processor TI’s Sitara AM335x processors provide highly exible power management architecture. De- pending on the application, the processor and core can be adapted to take advantage of the best performance and power conguration. The power, reset and clock management (PRCM) module, shown in Figure 2, and the Linux™ power management software stack can be used to optimize AM335x processor power . This minimizes power consumption of the processor since it aids control of the core Introduction  Advanc ement in techn ology has aided pro- gression of automation and control systems that provide a cohesive operation of various mechanical, electronics and lighting systems.  Apart from offeri ng a conven ient lifest yle, these solutions play an essential role in energy mon- itoring. These solutions require diligent under- standing and optimization of complete systems. While each solution has a common goal of energy conservation, they have completely different system requirements. The Texas In- struments (TI) Sitara™ processor solutions offer the flexibility to design application- specific systems. The latest Sitara AM335x processors provide a scalable architecture with speed ranging from 300MHz to 1GHz. In addition to the scalable frequency, pin- to-pin compatible devices enable custom- ers to innovate and develop a highly flex- ible and comprehensive range of solutions. This white paper will outline system choic es and their impact on the system power. It will pro- vide a comprehensive overview of the proc essor power management features and discuss the key contributors to the overall system power. P ower optimi zation techniques for energy- efcient systems Punya Prakash, Product Marketing Manager, Sitara™ processors Kazunobu Shin, Systems Engineer, Sitara™ processors Texas Instruments WHITE PAPER  Figure 1: Power consumption of various key system components. This gure assumes 85 percent power design efciency, DDR3 memory and active display.

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