Special Feature:

Nanoprogrammingvs.

Microprogramming

G. Franco CasagliaIng. C. Olivetti & C. S.p.a.

Introduction

Vertical microprogramming (or, as others say,functional microprogramming or firmware) was in-troduced in contrast with Wilkes' microprogram-ming (generally called horizontal or structural micro-programming), and has greatly enhanced the use ofmicroprogramming in control design and implemen-tation. As applied today, the former technique isnot yet a way of designing control structures, butan additional software level whose implications inthe system are not well clarified.The aim of this paper is to show that the meaning

of the term nanoprogramming, used by Rosin in con-nection with the QM-1 machine, is the same as theterm microprogramming as used by Wilkes. Inaddition, we will briefly show that horizontal micro-programming is powerful in implementing not onlymodifiable and extensible instructions sets, but alsoresource management algorithms.

Finally, though we will be unable to completelyjustify the introduction of the additional softwarelevel (vertical microprogramming), we will hypothe-size a structured computer architecture in whichthree major levels are identified.

Horizontal and VerticalMicroprogramming

First of all we define the meaning of some key-words:

Instruction: a bit pattern that is interpreted bythe executing control hardware in a wired controlmachine or by a microprogram in a micropro-grammed machine.

Microprogram: a sequence of microinstructions.A machine-level instruction is normally interpretedby a microprogram.

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Microinstruction: a bit pattern normally storedin control memory which controls, at a primitivelevel, the processor hardware.

Microoperation: a primitive hardware operatione.g., addition, shift, transfer into a register, etc.

Microcycle: the cycle of control which performsthe fetch and execution of a microinstruction.

Horizontal microprogramming corresponds to thedefinition given by Wilkes, and it will serve no pur-pose to describe it again. Vertical microprogram-ming' was introduced in order (a) to make easierthe operation of writing microprograms and theimplementation of the control store of mini-mediumsize computers, and (b) to utilize fast and cheap readonly and R/W memories with short length words.Consider the following comparison between the

two microprogramming techniques, as extractedfrom McClure2:

Horizontal Microprogramming

1. Microinstruction word lengths of 40-120 bits,with 70-80 bit lengths being very common. (Thenumber is directly related to available systemresources.)

2. Multiple operand specification.3. Relatively simultaneous execution of micro-

orders, with little internal sequencing.4. Fields in the microinstruction word utilized

with relatively little decoding.5. Relatively short microinstruction executing

times.6. Little classification into functions.7. Most bit combinations not meaningful.

Vertical Microprogramming

1. Usually 16-20 bit long microinstructions thatmay be packed two or more per memory word foraccess efficiency.

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2. Typically two- or three-operand addressing.3. Microinstructions sufficiently complex that

several internal clock cycles are needed to mechanizethe microinstruction's execution.

4. Highly decoded fields in microinstruction words.5. Relatively long microinstruction execution

times.6. Microinstructions classifiable into several

major functions.7. Most bit combinations meaningful.

It is interesting to note that in a horizontalmicroprogrammed structure we define first a micro-operation set (refer to Instruction, above). A subsetof microoperations that can be executed in paralleldefines a microinstruction: in combining micro-operations, in order to obtain microinstructions, weare limited by the parallelism of the ALU and theother functional units and by the coding techniqueof the control store word. Finally a microprogramdefines in its turn an instruction of the machinelanguage instruction set.In a vertical microprogrammed structure, how-

ever, the microoperation level is eliminated, definingdirectly a microinstruction set by which micro-programs are obtained.Starting from the previous considerations one can

conclude, as did Flynn,3 that horizontal and verticalmicroprogramming are merely two coding tech-niques. This is true only if this "coding technique"is defined disregarding the logical design of thestructure of the system. According to Agrawala andRauscher,4 vertical microinstructions effect singleoperations-load, add, do-I/O, branch, etc., and theyoften resemble machine language instructions. Hori-zontal microinstructions, in contrast, control manyresources which operate in parallel. Again, in thesame reference,4 we find: "The determining charac-teristic between vertical and horizontal micro-instructions is the number of simultaneously con-trolled resources."Considerations like these allow us to state that

vertical and horizontal microprogramming have agreat influence on the system structure and thatthey are used to obtain different system structures.An example of the implications in the control

structure of the choice between vertical and hori-zontal microprogramming may be seen in Figures 1and 2. Figure 1 shows a general scheme of a hori-zontally or vertically microprogrammed control.The distinction becomes clear when we specify thestructure of the ROSDR and DECODERS blocks.The circuits indicated as microinstruction decoders

in the case of Figure 2a are n to 2n decoders,while in the case of Figure 2b decoders are circuitsby which, starting from a microinstruction code, weobtain a number of sequential ALU commands,independent from the number of the microinstruc-tion code bit. In order to obtain more powerful andfast microinstructions, these decoders are realizedas sequential circuits; they are similar to traditionalcontrol structures, taking into account that oftenthe microinstruction set is as complex as themachine language instruction set of a minicom-

January 1976

puter. These traditional control structures areobviously implemented by non-microprogrammedhardware.

It is easy to state now that, as the power and theexecution speed of the microinstructions increase,the vertical microprogramming approach moves to-ward non-microprogrammed structures* in whichthe term microinstruction set is only a synonymof the term "machine language instruction set."This statement can be derived also from Chroust,5

*Note that this is not equivalent to say that in general micro-.programmed structures are slower than non-microprogrammedones.6

DECODERAND DRIVER

DATA PATH

CONT ROLS

Figure 1. Scheme of microprogrammed control

ROS DR

DATA PATH CONTROL

Figure 2a. Decoder scheme in a horizontally micropro-grammed control

CLOCK 0m;0

z

m

m

--

0z

DATA PATHCONTROL

Figure 2b. Decoder scheme in a vertically microprogrammedcontrol

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wherein a machine is said to be microprogrammed ifand only if the decoding network is combinational.Chroust also defines it as a formalism by meansof which it is possible to evaluate the degree ofmicroprogramming of a system with a continuoustransition from strictly microprogrammed systemsto more complex control structures.

Finally, disregarding some implementation ad-vantages, we can say that in realizing a verticalcontrol structure, as we described above, we have asignificant lack of flexibility in CPU resourceutilization if the design objective is a machine forvarious and different applications supported by thesame host hardware machine.

Evolution of Vertical Microprogramming

The first attempt, in order to avoid this lack offlexibility, is realized by introducing the residualcontrol technique (see Flynn and Rosin7 for a de-scription of residual control and the IBM 2025CPU8 for an application). Residual control charac-teristics are briefly summarized below.Much information specified in the microinstruc-

tion is static-i.e., it represents environmental in-formation. The status remains unchanged duringthe execution of a number of microinstructions. Ifthis static information and specification are filteredout of the microinstruction and placed in setupregisters, the combination of a particular field of amicroinstruction with its corresponding setup regis-ter would completely define the control for re-source (Figure 3). This idea is not strictly connectedwith vertical microprogramming and can be usedalso as a coding technique for horizontally micro-

SET UPREGISTERSELECTIONMECANISM

DECODER

DATA PATH CONTROL

Figure 3. Residual control scheme

programmed structures. Nevertheless, we want tonote that residual control has been used togetherwith vertical microprogramming in order to main-tain a minimum level of control of the hardwareresources within each individual microinstruction.This control is not apparent (though its functionremains) when we substitute the enabling bits to amicroinstruction bit pattern.The flexibility of residual control obviously de-

pends on the number of such setup registers, on themeaning assigned to their content, and on the waychosen to set and select them.A second attempt to enhance flexibility is repre-

sented by the introduction of nanoprogramming; inthe following section we will introduce this techniqueby reviewing two significant examples.

Nanoprogramming

Nanodata QM-1 Machine.9' 10, 11 This machinehas been designed as an experimental machine tobe implemented and used in order to carry outresearch on microprogramming. Two critical items,among' a set, by which the machine was evaluatedbefore implementation, are (1) flexibility/generalityof the instruction set, and (2) flexibility/generality ofaddressing.

Disregarding the overall architecture, we sum-marize the control organization of such a machineas follows (refer to Figure 4): Local store is com-posed of 32 registers, one of which (IR) holds a repre-

I R. CO4TROL CONROL

I~~~~~~~~~~~~~~~~ ATRILW0U

NotesIR -holds a representation of the 16-bit micro-

instruction currently being executedCIA -COS addressbusOlD-OSt sCID -CS input busCOD - CS output bus

Figure 4. Control structure of the QM-1 machine

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sentation of the 16-bit microinstruction currentlybeing executed. Control store (CS) consists of 2K16-bit words storage; the basic instruction formatof these words is usually a 6-bit op code and two5-bit address parts. Nanostore consists of 256(expandable to 2K) 342-bit words of memory.The microinstruction fetching phase is composed

of the following steps: (1) Add one to the 16-bitvalue in the local storage word whose address isin CIA. (2) Move that value into the control storeaddress register and fetch a word which will beused as a microinstruction. (3) Use the 6-bit op codefield of the microinstruction which has been fetchedto fetch a 342-bit word from nanostore.Now we consider nanoinstruction sequencing and

control structure. A 342-bit word contains fournanoinstructions. Each nanoword contains a nano-program branch address; therefore a nanoprogramcan span more than one word of nanostore and cancontain loops. The selection of the next nanowordto be processed in QM-1 is also determined, in part,by the interrupt status of the system.As an example of the complexity of one of the

four steps defined by a nanoword and of the com-plexity of a microinstruction, consider the micro-ins'truction (see Figure 5.) "ADD register [A] toregister [B]" where the ADD operation is defined

[A] [B]

ALUx lhold Reg. l

V(5

Notes

a, is issued by S1 p or by 0,a-2 is issued by S1 p or by 02a3 is issued by S2p or by 04a4 is issued by S3p or byO3Oa5 is issued by S4p or by 04

Delay problems are solved in the two exampleswith two different clocking mechanisms.

Figure 5. Schematic ALU structure as used by microinstruc-tions M1 and M2

with the operation code, and A, B are the two addressparts of the microinstruction pointing to registers.'This microinstruction (M,) can be executed in foursteps (Slp is the first of the four steps definedby the pth nanoword):

Sip: move A toIALU left-side input bus,move B to ALU right-side input bus,increment the register containing the micro-instruction buffer;

S2p: move B to ALU output bus, initiate themicroinstruction fetching phase;

S3p: fill the ALU hold register;S4p: gate the ALU hold register;

STOP

CII MITRA 15 Machine.'2 In order to produce asmall general-purpose computer, whose main charac-teristics, in addition to a good price/performanceratio, have to be flexibility and modularity, CIIdesigned a microprogrammed general processingunit to be used to realize the CPU, various indepen-dent I/O external processing units, and specialcomplex operations.

This general processing unit has been implementedusing two levels of microprogramming. The firstlevel is held in a 16-bit word size control store;the sixteen bits are used as follows:

* memory dialogue control-2 bits* type of microfunction-5 bits* general register address-3 bits* address of the next microinstruction-6 bits.

The microfunctions are interpreted through asecond level of ROS; the 5 bits are directly usedto address a ROS word whose bits, defining nano-instructions, are directly used by the operation partof the computer. The microfunction is translatedfrom a 5-bit code to a 48-bit word.

Nanoprogramming vs. Microprogramming

We want now to compare the microprogrammedstructures of the Nanodata QM-1 and CII Mitra15 with a traditional microprogrammed structure:the 360 control described by Tucker.'3 This controlis schematically shown in Figure 1; an example ofthe nature of microoperations, microinstructions,and microprograms is shown in the followingexample (refer to Figure 5).Let us write a microinstruction to add the comple-

ment of register A to register B and put the resultsinto register B:

M2 Gate register A bit positions 0-31 in comple-ment form to adder left side (01).Gate register B bit positions 0-31 to adder rightside (02).Pass adder output straight through shifter(03).

Set shifter output into register B (04).

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In microinstruction M, each phase (0, through04) defines a microorder; a set of microinstructionslike M2 defines a microprogram. A ROS word con-tains the bit pattern of a microinstruction includingthe ROS next address field.The model shown in Figure 1, and traditionally

called microprogrammed control, is similar to theone used to describe the nanostore, the decodersbeing similar to those shown in Figure 2a. Moreparticularly, the content of avAanoword defines foursteps, each of which is of the type and complexityof the microinstruction M, described above. There-fore we affirm that QM-1 nanoprogramming isnothing but microprogramming, as originally con-ceived by Wilkes.

Conclusions

The introduction of vertical microprogramminggave an easy way to implement extensible and modi-fiable instructions sets, but masked one of the mostimportant characteristics of the original definition:a flexible and systematic way of hardware resourcemanagement. The first main result of a project suchas the one started with the design of the QM-1machine is, in our opinion, the following:

When it is necessary to maintain flexibility inorganizing the hardware resources of a hostmachine, in order to obtain different systems fordifferent purposes, we have to impl6hient a hori-zontally microprogrammed control using a R/Wcontrol store. In this situation we also are ableto decide, at any time of the overall systemdesign, at which level particular resource manage-ment algorithms, special instructions, and so on,have to be implemented. In our opinion this isthe level in which it is useful to implement inter-process synchronization primitives and virtualaddress mapping mechanisms. This is the way tobe followed in order to eliminate the present rigidboundary among software, firmware, andhardware.

Our results and conclusions do not clarify themeaning and the real implication of the intro-duction of a second level of microprogrammingas was done in the QM-1 machine. Why, for example,is the QM-1 control store not considered as a moduleof the main memory? An answer to that questionwill probably come from works that deal with theimplementation of block structured architectures."4, 15Our working approach t& block structured archi-

tectures is the following: A computer structure canbe seen as level organized; the level boundary andthe features contained in each level are definedfollowing functional criteria and not following a pre-defined structure. The level "O" is- realized by thebare machine, the first level is implemented by hori-zontal microprogramming, and the following levelby software of increasing complexity. The simplestlevel of this software can be the one called firmware.

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References1. R. F. Rosin, "Contemporary Concepts of Microprogram-

ming and Emulation," Computing Surveys, Vol. 1, No. 4,pp. 202, 203, Dec. 1969.

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6. G. F. Casaglia, G. B. Gerace, and M. Vanneschi, "MaximumComputation Speed of Microprogrammed Systems," Proc.,International Computing Symposium, Venice, Italy, pp.91-99, April 1972.

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gm B ,kGianfranco Casaglia is with ing. C. Olivetti &C. S.p.a., Ivrea, Italy. At Olivetti since 1973,he is in charge of the definition of the archi-tecture of terminal concentrator systems forcommercial applications. Before joining Oli-vetti he did research in the field of micro-programming and parallel system organiza-tion.

_ Dr. Casaglia received the Dr. Ing. degreein electronic engineering from the Universita

of Pisa, Pisa, Italy, in 1967. He is a member of the IEEEComputer Society, ACM, and the AICA (Associazione Italianaper il Calcolo Automatico).

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