Extended Abstracts of

the 1995 International Conference on

SOLID STATE DEVICES AND MATERIALS

August 21-24, 1995

Osaka

International House, Osaka

Sponsored by

THE JAPAN SOCIETY OF APPLIED PHYSICS

in cooperation with

The Institute of Electronics, Information and Communication Engineers of Japan

IEEE Electron Devices Society

IEEE Tokyo SectionThe Institute of Electrical Engineers of Japan

The Electrochemical Society of JapanThe Institute of Television Engineers of Japan

CONTENTS

August 21, Monday

Main Hall

A-0: Opening Session (9:50-12:25)

9:50 (0) Welcome AddressC. Hamaguchi, Organizing Committee Chairperson

10:00 (1) Four-Terminal Device Electronics for Intelligent Silicon Integrated Systems (Invited)T. Ohmi and T. Shibata, Tohoku Univ., Japan 1

10:40 (2) The Control of Optical Beams in Imaging and High Data Rate Fiber Communications

(Invited)A. Yariv, California Inst. Tech., U.S.A 5

11:30 (3) 300mm Implementation (Invited)F. Robertson, SEMATECH, U.S.A 7

12:10 (4) SSDM Awards Presentation

Room A

Symposium 1-1: Amorphous and Crystalline Insulating Thin Films HIFormation and Characterization of Insulating Films I (13:50-15:40)

13:50 (1) The Role of Thermodynamics in Determining the Short Range Order in Amorphous

Insulating Films (Invited)F.W. Smith, The City Univ. New York, U.S.A 10

14:20 (2) In-Situ Observation of Oxygen Exposed Hydrogen Terminated Silicon Surfaces

H. Ogawa, K. Ishikawa, M, Aoki*, S. Fujimura, N. Ueno**, Y. Horiike*** and

Y. Harada**, Fujitsu, *Univ. Tokyo, **Chiba Univ. and ***Toyo Univ., Japan 13

14:40 (3) Study on Oxidation of Si(100)-2xl Surfaces by Scanning Tunneling Microscopy/Scanning

Tunneling SpectroscopyH. Ikegami, K. Ohmori, H. Ikeda, H. Iwano, S. Zaima and Y. Yasuda, Nagoya Univ.,

Japan 16

15:00 (4) Interface States at Ultrathin Chemical Oxide/Silicon Interfaces Obtained from

Measurements of XPS Spectra under Biases

H. Kobayashi, Y. Yamashita, K. Namba, Y. Nakato and Y. Nishioka*, Osaka Univ., and

*Texas Instruments Japan, Japan 19

15:20 (5) Observation of Oxide Thickness Dependent Interface Roughness in Si MOS Structure

J. Koga, S. Takagi and A. Toriumi, Toshiba, Japan 22

Symposium 1-2: Amorphous and Crystalline Insulating Thin Films III

Formation and Characterization of Insulating Films II (16:00-17:40)

16:00 (1) Theoretical Analysis of Oxygen-Excess Defects in Si02 Thin Film by Molecular Orbital

Method

T. Kanashima, M. Okuyama and Y. Hamakawa, Osaka Univ., Japan 25

16:20 (2) The Valence Band Alignment at Ultra-Thin SiO2/Si(100) Interfaces Determined by High-

Resolution X-Ray Photoelectron SpectroscopyJ.L. Alay, M. Fukuda, K. Nakagawa, S. Yokoyama and M. Hirose, Hiroshima Univ.,

Japan 28

16:40 (3) A New Low-Temperature Oxidation Technique by Gas Cluster Ion Beams

M. Akizuki*, J. Matsuo, S. Ogasawara*, M. Harada*, A. Doi* and I. Yamada, Kyoto

Univ. and *SANYO Elec, Japan 31

xvu

17:00 (4) Low-Thermal-Budget, Process-Controlled Monolayer Level Incorporation of Nitrogen into

Ultra-Thin Gate Dielectric Structures: Applications to MOS Devices

G. Lucovsky, D.R. Lee, S.V. Hattangady, H. Niimi, C. Parker and J.R. Hauser, North

Carolina State Univ., U.S.A 34

17:20 (5) Clarification of Nitridation Effect on Oxidation Methods

T. Kuroi, S. Shirahata, Y. Okumura, S. Shimizu, A. Teramoto, M. Anma, M. Inuishi

and T. Hirao, Mitsubishi Elec, Japan 37

Room B

B-l: Power Devices and Advanced Structures (13:50-16:00)

13:50 (1) Semiconductor Silicon Carbide for Power Electronic Application (Invited)H. Matsunami and A. Itoh, Kyoto Univ., Japan 40

14:20 (2) Super-j8 Bipolar Transistor Equivalent in CMOS TechnologyG. Kim, M.-K. Kim, W. Kim and A. Bouzerdoum, Seoul Nat'I Univ., Korea 43

14:40 (3) CVD-EPI MOS Transistors with a 65 nm Vertical ChannelF. Hofmann, W.H. Krautschneider, L. Risch and H. Schaefer, Siemens, F.R.G 46

15:00 (4) Effects of Pixel Electrode Structure on Image Lag of STACK-CCD Image Sensor

E. Oba, R. Miyagawa, H. Ihara, M. Sasaki, H. Yamashita, H. Tango, O. Yoshida andS. Manabe, Toshiba, Japan 49

15:20 (5) Polysilicon Thin Film Transistors with PN Junction Gate

B.-H. Min, C.-M. Park and M.-K. Han, Seoul Nat'I Univ., Korea 5215:40 (6) In-Situ Doped CMOS Polysilicon Thin Film Transistors

B.-H. Min, C.-M. Park, B.-S. Bae* and M.-K. Han, Seoul Nat'I Univ. and *Samsung,Korea 55

B-2: Flash Memories (16:20-17:40)

16:20 (1) A Novel High Density EEPROM Cells Using Poly-Gate Hole (POLE) Structure Suitable forLow Power ApplicationsM. Takebuchi, J. Noda, D. Tohyama*, S. Ueno, K. Osari and K. Yoshikawa, Toshiba

and *Toshiba Microelectronics, Japan 5816:40 (2) A Flash Memory Technology for Operating Voltage Reduction and Self-Convergence of the

Over Erased Cells

S. Sato, T. Tanigami, K. Hakozaki, N. Shinmura, K. Iguchi and K. Sakiyama, Sharp,Japan 61

17:00 (3) Comparison of Over Erase Susceptibility and Cycling Reliability between Channel Erase

and Bitline Erase in Flash EEPROM

J.-T. Hsu and S. Shumway, Nat'I Semiconductor, U.S.A 6417:20 (4) High-Reliability Programming Method Suitable for Flash Memories of More Than 256 Mb

N. Miyamoto, T. Kawahara*, S. Saeki, Y. Jyouno*, M. Kato* and K. Kimura*, HitachiDevice Eng., and *Hitachi, Japan 67

Room C

Symposium IV: Advanced Metallization for Semiconductor Devices (13:50-18:00)

13:50 (1) Thin Film Challenges of the SIA National Technology Roadmap (Invited)D.B. Fraser, Intel, U.S.A 71

14:20 (2) Dissociative Adsorption Mechanism of Product Gas in W-CVD Revealed by MolecularOrbital Calculation and Its Determinant Role in Filling Features

Y. Takemura, J. Ushio, T. Maruizumi, R. Irie and N. Kobayashi, Hitachi, Japan 73

14:40 (3) Surface Reaction Controlled W-CVD Technology for 0.1-/um Low-Resistive, Enc¬

roachment-Free CMOS-FET ApplicationsY. Nakamura, N. Kobayashi, D. Hisamoto, K. Umeda and R. Nagai, Hitachi, Japan 76

15:00 (4) W as a BIT Line Interconnection in COB Structured DRAM and Feasible Diffusion Barrier

LayerJ.S. Byun, J.K. Kim, J.W. Park and J.J. Kim, LG Semicon, Korea 79

XVUJ

15:40 (5)

16:10 (6)

16:30 (7)

16:50 (8)

17:10 (9)

17:40 (10)

Formation of Metal/Silicon Contacts for ULSI and Induced Defects by Silicidation

(Invited)Y. Yasuda and S. Zaima, Nagoya Univ., Japan 82

Novel Low Leakage and Low Resistance Titanium Salicide Technology with Recoil

Nitrogen Achieved by Silicidation after Ion Implantation through Contamination-Restrain¬ed Oxygen Free LPCVD-Nitride Layer (SICRON)

H. Kotaki, M. Nakano, S. Hayashida, T. Matsuoka, S. Kakimoto, A. Nakano, K. Udaand Y. Sato, Sharp, Japan 85

Low Damage In-Situ Contact Cleaning Method by a Highly Dense and Directional ECRPlasma

I.S. Park, M. Yoon, H.-D. Lee, C.S. Park, Y.J. Wee, G.H. Choi, K.Y. Oh, S.I. Lee andM.Y. Lee, Samsung, Korea 88

In Situ Study of Electromigration in Submicron-Wide Layered Al-0.5%Cu Lines by Side-View TEM Observation

H. Okabayashi, M. Komatsu* and H. Mori*, NEC and *Osaka Univ., Japan 91

Copper Interconnects Fabricated by Dry Etching Process (Invited)Y. Igarashi, T. Yamanobe and T. Ito, Oki Elec. Ind., Japan 94

Double-Level Cu Inlaid Interconnects with Simultaneously Filled Via-PlugsG. Minamihaba, Y. Shimooka, H. Tamura, T. Iijima, T. Kawanoue, H. Hirabayashi,N. Sakurai, H. Ookawa, T. Obara, H. Egawa, T. Idaka, T. Kubota, T. Shimizu,M. Koyama, G. Ooshima and K. Suguro, Toshiba, Japan 97

Room D

D-l: Transport Properties (13:50-16:00)

13:50 (1) Terahertz Quantum Transport in Semiconductor Superlattices and Quantum Wells (Invited)S.J. Allen, U. Bhattacharya, K.L. Campman, J. Galan*, A.C. Gossard, J.P. Kaminski,B.J. Keay, K.D. Maranowski, M.J.M. Rodwell and S. Zeuner, Univ. California and

*Ohio State Univ., U.S.A 100

14:20 (2) Nanometer-Scale Current-Voltage Spectra Measurement of Resonant Tunneling Diodes

Using Scanning Force MicroscopyM. Tanimoto, K. Kanisawa and M. Shinohara, NTT, Japan 103

14:40 (3) Deep Levels and Conduction Mechanism in Low-Temperature GaAs Grown by MolecularBeam Epitaxy

S. Shiobara, T. Hashizume and H. Hasegawa, Hokkaido Univ., Japan 106

15:00 (4) The Electrical Properties of High Quality Stacked CdTe/Photo-Enhanced-Native-Oxide for

HgCdTe PassivationY.K. Su, C.T. Lin, H.T. Huang, S.J. Chang, T.P. Sun*, G.S. Chen* and J.J. Luo*,

Nat'I Cheng Kung Univ. and *Chung Shan Inst. Sci. & Tech., Taiwan, China 109

15:20 (5) Efficient MIS Electric Field Effect on Diamond Thin Film Transistors

Y. Otsuka, S. Suzuki, T. Maki, K. Sakuta and T. Kobayashi, Osaka Univ., Japan 112

15:40 (6) Fabrication and Characterization of a Phase Controlled SNS Quantum Electron In¬

terferometer.

V.T. Petrashov, V.N. Antonov, P. Delsing* and T. Claeson*, Russian Academy Sciences

and *Chalmers Univ. Tech. & Univ. Goteborg, Sweden, Russia 113

D-2: Optical Properties (16:20-18:00)

16:20 (1) Nearinfrared Intersubband Transitions in InGaAs/AJAs Quantum Wells on GaAs Substrate

T. Asano, S. Noda, T. Abe and A. Sasaki, Kyoto Univ., Japan 118

16:40 (2) Carrier Dynamics in Piezoelectric Quantum Wells Grown on GaAs (111)A, (211)A and (311)

A Studied by Time Resolved Photoluminescence SpectroscopyP.O. Vaccaro, M. Hosoda, K. Fujita and T. Watanabe, ATR, Japan 121

17:00 (3) Subpicosecond Carrier Lifetime in Low-Temperature-Grown GaAs Layer on (31 l)-Oriented

Substrate

T.M. Cheng, C.Y. Chang, G.R. Lin, F. Ganikhanov, C.L. Pan and J.H. Huang*, Nat'I

Chiao Tung Univ. and * Nat'I Tsing Hua Univ., Taiwan, China 124

xix

17:20 (4) Extremely Sharp Photoluminescence Lines from Nitrogen Atomic-Layer-Doped AlGaAs/GaAs Single Quantum Wells

T. Makimoto and N. Kobayashi, NTT, Japan 127

17:40 (5) Influence of Type-I to Type-II Transition by an Applied Electric Field on

Photoluminescence and Carrier Transport in GaAs/AlAs Type-I Short-Period Superlattices

N. Ohtani, H. Mimura, M. Hosoda, K. Tominaga, T. Watanabe and K. Fujiwara*, ATR

and *Kyushu Inst. Technol., Japan 130

August 22, Tuesday

Room A

Symposium 1-3: Amorphous and Crystalline Insulating Thin Films IIISilicon Nitride and Its Application (9:20-10:30)

9:20 (1) Defects in Amorphous Silicon-Nitrogen Alloy Films (Invited)

T. Shimizu, Kanazawa Univ., Japan 133

9:50 (2) Interface States in Top Gate Metal-Silicon Nitride-Silicon Structures

J. Kanicki, S. Backert* and N. Picard*, Univ. Michigan, and *Ecole Polytechnique,

U.S.A 137

10:10 (3) Oxynitride Pad LOCOS (ON-LOCOS) Isolation Technology for Gigabit DRAMs

Y. Sambonsugi, T. Yamazaki, S. Kawashima and T. Sugii, Fujitsu Labs., Japan 139

Symposium 1-4: Amorphous and Crystalline Insulating Thin Films III

Formation and Simulation of Dielectric Films (10:50-12:20)

10:50 (1) Simulations of Crack Propagation and Fracture in Silica and Silicon Nitride Films on

Parallel Computers (Invited)P. Vashishta, A. Nakano and R.K. Kalia, Louisiana State Univ., U.S.A 142

11:20 (2) Application of CVD Si02 Single Layer Films to Inter-Poly Dielectrics of Flash Memories

T. Kobayashi, M. Ushiyama, N. Miyamoto*, J. Yugami, H. Kume and K. Kimura,Hitachi and *Hitachi Device Eng., Japan 145

11:40 (3) Investigation of Interlayer Dielectric Material Influence on DRAM Retention Time

M. Ohishi, K. Matsui and K. Koyama, NEC, Japan 148

12:00 (4) Low-Temperature CVD of Si02 by Alkoxy-Silane-Iso-CyanateY. Uchida, S. Takei and M. Matsumura*, Nishi-Tokyo Univ. and *Tokyo Inst. Technol.,

Japan 151

Symposium 1-5: Amorphous and Crystalline Insulating Thin Films IIILow & Interlayer Dielectric Films

(13:50-15:30)

13:50 (1) Low Permittivity Organic Dielectrics for Multilevel Interconnection in High Speed ULSIs

(Invited)Y. Homma, T. Furusawa, K. Kusukawa, S. Moriyama, H. Morishima* and H. Sato*,Hitachi and *Hitachi Chemical, Japan 154

14:20 (2) Fluorine Doped Si02 for Low Dielectric Constant Films in Sub-Half Micron ULSI

Multilevel Interconnection (Invited)N. Hayasaka, H. Miyajima, Y. Nakasaki and R. Katsumata, Toshiba, Japan 157

14:50 (3) Formation of SiOF Films by PECVD Using (C2H50)3SiFH. Kito, M. Muroyama, M. Sasaki, M. Iwasawa and H. Kimura, Sony, Japan 160

15:10 (4) Preparation of Low Dielectric Constant F-Doped Si02 Films by PECVDS.W. Lim, Y. Shimogaki, Y. Nakano, K. Tada and H. Komiyama, Univ. Tokyo, Japan... 163

Symposium 1-6: Amorphous and Crystalline Insulating Thin Films HI

Gap-Fill/Planarization & Organic Films (15:50-17:50)

15:50 (1) Developments in Consumables Used in the Chemical Mechanical Polishing of Dielectrics

(Invited)S. Sivaram, R. Tolles* and A. Sethuraman**, Intel, *Applied Materials and ** Rodel,U.S.A 166

16:20 (2) "H20-TOP-PECVD": A New Plasma Enhanced CVD Technology Using Alternate TEOS-Ozone Low Pressure CVD and H20 Assisted 03 Plasma Treatment.

K. Kishimoto, K. Imaoka*, K. Koyanagi and T. Homma, NEC and *Applied Materials

Japan, Japan 16816:40 (3) High Rate Bias Sputtering Filling of Si02 Film Employing Both Continuous Wave and

Time-Modulated Inductively Coupled PlasmasY. Kobayashi, Y. Chinzei, H. Asanome*, R. Kurosaki**, J. Kikuchi**, S. Shingubara***and Y. Horiike, Toyo Univ., *Toshiba Machine, **Fujitsu and ***Hiroshima Univ.,Japan 171

17:00 (4) Low Dielectric Constant Films for ULSI Interconnect Applications (Invited)C. Chiang, C. Pan, A.S. Mack, Y. Ling, Q. Vu and D.B. Fraser, Intel, U.S.A 174

17:30 (5) Nitrogen Doped Fluorinated Amorphous Carbon Thin Films Grown by Plasma EnhancedChemical Vapor DepositionK. Endo and T. Tatsumi, NEC, Japan 177

Room B

Symposium II: Single Electron Devices (9:20-12:35)

9:20 (1) Artificial Quantum Solids that Compute: Quantum-Mechanical Logic Gates and Neuromor-

phic Networks (Invited)S. Bandyopadhyay and V.P. Roychowdhury*, Univ. Notre Dame and *Purdue Univ.,U.S.A 180

9:50 (2) Single-Electron Tunneling in Coupled Nanowire SystemsA.A. Tager, M. Lu, J.M. Xu and M. Moskovits, Univ. Toronto, Canada 183

10:10 (3) Single Electron Device with Asymmetric Tunnel Barriers

Y. Matsumoto, T. Hanajiri, T. Toyabe and T. Sugano*, Toyo Univ. and *RIKEN,

Japan 186

10:50 (4) Novel Fabrication Technique for a Si Single-Electron Transistor and Its High Temperature

Operation (Invited)Y. Takahashi, M. Nagase, H. Namatsu, K. Kurihara, K. Iwadate, Y. Nakajima,S. Horiguchi, K. Murase and M. Tabe, NTT, Japan 189

11:20 (5) Room Temperature Operation of Single Electron Transistor Made by STM Nano-Oxidation

Process

K. Matsumoto, M. Ishii, K. Segawa, Y. Oka, B.J. Vartanian* and J.S. Harris*, ETL and

Stanford Univ., U.S.A., Japan 192

11:40 (6) Novel Schottky In-Plane Gate Single-Electron Transistors Using GaAs/AlGaAs System

Operating up to 10K

K. Jinushi, H. Okada, T. Hashizume and H. Hasegawa, Hokkaido Univ., Japan 195

12:00 (7) Resonant Tunneling Properties of Single Electron Transistors with a Novel Double-Gate

GeometryT. Fujisawa and S. Tarucha, NTT, Japan 198

12:20-12:35 Poster Preview

Symposium II: Single Electron Devices

(1) Characterization of One-Dimensional Conduction in an Ultra-Thin Poly-Si Wire

T. Ishii, K. Yano, T. Sano*, T. Mine, F. Murai and K. Seki, Hitachi and *Hitachi Device

Eng., Japan 201

(2) Complementary Digital Logic Using Resistively Coupled Single Electron Transistor

N. Yoshikawa, Y. Jinguu, H. Ishibashi and M. Sugahara, Yokohama Nat'I Univ., Japan... 204

xxi

(3) Cotunneling-Tolerant Single-Electron Logic

S. Amakawa, H. Fukui, M. Fujishima and K. Hoh,Univ. Tokyo, Japan 207

(4) Bistable Locking of Single-Electron TunnelingJunctions for Digital Circuitry

R.A. Kiehl and T. Ohshima, Fujitsu Labs., Japan 210

B-3: Advanced CMOS (13:50-15:40)

13:50 (1) Low-Voltage and Power CMOS Technology (Invited)

M. Kakumu, M. Kinugawa, K. Ishimaru and H. Oyamatsu, Toshiba, Japan 213

14:20 (2) A New Triple-Well Process to Accomplish aLower Vth and a Low Cost for Low Power-

Supply Voltage VLSI

J. Mitani, K. Itabashi, M. Nagase, M. Kawano and T. Ema, Fujitsu, Japan 216

14:40 (3) Impact of Nitrogen Implantation on Highly Reliable Sub-QuarterMicron LDD MOSFETs

S. Shimizu, T. Kuroi, S. Kusunoki, Y. Okumura, M.Inuishi and T. Hirao, Mitsubishi

Elec, Japan219

15:00 (4) A High Performance 0.15 jum Single Gate CMOS Technology

T. Yoshitomi, M. Saito, T. Ohguro, M. Ono, H.S. Momoseand H. Iwai, Toshiba,

Japan222

15:20 (5) Tungsten Gate Technology for Quarter-Micron Application

H. Noda, H. Sakiyama*, Y. Goto, T. Kure and S. Kimura,Hitachi and *Hitachi VLSI

Eng., Japan225

B-4: Modeling and Physics of Si Devices (16:00-18:10)

16:00 (1) Monte Carlo Simulations of Impact Ionization Feedback in Sub-Micron MOSFET

Technologies (Invited)J.D. Bude, AT&T Bell Labs., U.S.A 228

16:30 (2) Novel Impact Ionization Model for Device Simulation Using Generalized Moment Conserva¬

tion EquationsK. Sonoda, M. Yamaji, K. Taniguchi and C. Hamaguchi, Osaka Univ., Japan 231

16:50 (3) Characteristics of Conductivity Modulated Polysilicon Thin Film Transistors

A. Kumar K.P. and J.K.O. Sin, Hong Kong Univ. Sci. Tech., Hong Kong 234

17:10 (4) Anomalous Capture and Emission by Individual Si-Si02 Interface Defects in Advanced Self-

Aligned Bipolar Transistors

J.-Q. Lu, S. Schottl, F. Koch, R. Mahnkopf* and H. Klose*. Tech. Univ. Munich and

*Siemens AG, F.R.G 237

17:30 (5) Simulation of Enhanced Drain Current Characteristics in a MOSFET with a Quantum Wire

Structure Incorporating a Periodically Bent Si-Si02 Interface

J. Tanaka and A. Sawada, Hitachi, Japan 240

17:50 (6) Analysis of Chaos in Capacitance-npn-Transistor Pair and Its Application to Neuron

Element

T. Irita, M. Fujishima and K. Hoh, Univ. Tokyo, Japan 243

18:30-20:45 Rump Session b: HBT: HBTs are taking off. Where to land?

Room C

C-l: Surface Cleaning (9:20-10:40)

9:20 (1) Characterization of a Cleaning Technology for Silicon Surface by Hot Pure Water Contain¬

ing a Little Dissolved OxygenY. Hayami, M.T. Suzuki, Y. Okui, H. Ogawa and S. Fujimura, Fujitsu, Japan 246

9:40 (2) Cleaning of Silicon Surfaces by NF3 Added Hydrogen and Water Vapor PlasmaDownstream Treatment

J. Kikuchi, M. Nagasaka, S. Fujimura, H. Yano and Y. Horiike*. Fujitsu and *Toyo

Univ., Japan 249

10:00 (3) Study of Cu Contamination Removal Using Electrolytic Ionized WaterH. Aoki, S. Yamasaki, Y. Shiramizu, N. Aoto, T. Imaoka*, T. Futatsuki*, Y. Yamasita*

and K. Yamanaka*, NEC and *ORGANO, Japan 252

10:20 (4) Precise Control of Si02 Etching Characteristics Using Mono-Layer Adsorption of HF/H20

VaporN. Nakanishi and N. Kobayashi, Hitachi, Japan 255

XXll

11:00-12:40 Poster Preview

Symposium I: Amorphous and Crystalline Insulating Thin Films IIIGate Insulators I

(1) Formation Process of Highly Reliable Ultra-Thin Gate OxideK. Ohmi, T. Iwamoto, T. Yabune, T. Miyake and T. Ohmi, Tohoku Univ., Japan 258

(2) Highly Reliable Ultra Thin Gate Dielectrics for Dual-Gate CMOS DevicesL.K. Han, D. Wristers, T.S. Chen, C. Lin, K. Chen, J. Fulford* and D.L. Kwong, Univ.

Texas and *Advanced Micro Devices, U.S.A 261

(3) Reliability of Structurally Modified Ultra-Thin Gate OxidesH. Satake, N. Yasuda and A. Toriumi, Toshiba, Japan 264

(4) Electron Tunneling through Chemical Oxide of SiliconM. Matsuda, K. Watanabe, M. Yasutake* and T. Hattori, Musashi Inst. Technol. and

Seiko Instruments, Japan 267

(5) The Oxide Reliability Improvement with Ultra-Dry Unloading in Wet Oxidation Using Load

Lock Oxidation SystemJ. Yugami and M. Ohkura, Hitachi, Japan 270

(6) Effect of Organic Compounds on Gate Oxide ReliabilityY. Shiramizu and H. Kitajima, NEC, Japan 273

(7) Correlating Charge-to-Breakdown with Constant-Current Injection to Gate Oxide Lifetime

under Constant-Voltage Stress

K. Eriguchi and Y. Uraoka, Matsushita Elec. Ind., Japan 276

(8) Trap Generation Induced by Local Distortion in Amorphous Silicon Dioxide Film

C. Kaneta, Fujitsu Labs., Japan 279

(9) Dynamics of Hot-Carrier Induced Interface State Generation in Polysilicon Thin-Film Tran¬

sistors

A. Pecora, I. Policicchio, G. Fortunato, F. Plais* and D. Pribat*, IESS-CNR and *Thom-

son-CSF, France, Italy 282

(10) Magnetic Field Induced Prolonged Changes of Electric Parameters of MOS Structures

V.M. Maslovsky, Jury O. Lichmanov Nickolai S. Samsonov and E.V. Simanovich,

Zelenograd Res.Inst.Phys.Prob., Russia 285

Symposium I: Amorphous and Crystalline Insulating Thin Films IIIFerroelectric Thin Films

(1) Electrical Characterizations of Pt/(Ba,Sr)Ti03/Pt Planar Capacitors for ULSI DRAM

Applications.S.O. Park, C.S. Hwang, H.J. Cho, C.S. Kang, H.-K. Kang, S.I. Lee and M. Y. Lee, Sam¬

sung, Korea287

(2) Quasi-Epitaxial Growth of PZT Thin Film to Fabricate Capacitor Suitable for 256Mb

DRAM and Beyond

S. Yamauchi and M. Yoshimaru, Oki Elec. Ind., Japan 291

(3) Substrate Orientation Dependence of the Properties of Metal-Ferroelectric BaMgF4-Silicon

Capacitors by Post-Deposition AnnealingK.-H. Kim, J.-D. Kim and H. Ishiwara*, Cheong-Ju Univ. and *Tokyo Inst. Technol.,

Japan, Korea 294

(4) Bi4Ti3012 Films Grown on Si02/Si at Low Temperature by Laser Ablation Method

W. Wu, K. Fumoto, Y. Oishi, M. Okuyama and Y. Hamakawa, Osaka Univ., Japan .. .297

(5) All-Perovskite Ferroelectric/Semiconductor Field Effect Transistor

Y. Watanabe, M. Tanamura and Y. Matsumoto, Mitsubishi Chemical, Japan 300

Symposium IV: Advanced Metallization for Semiconductor Devices

(1) Suppression of Resistance Increase in Al/W Interconnects by N2 PlasmaTreatment

M. Sekiguchi, T. Fujii* and M. Yamanaka, Matsushita Elec. Ind. and *MatsushitaElec,

Japan 303

xxm

(2) An Efficient Improvement for Barrier Effect of W-Filled Contact

W.-K. Yeh, T.-C. Chang, M.-H. Tsai, S.-H. Chen, K.-Y. Chan, M.-C. Chen and

M.-S. Lin*, Nat'I Chiao Tung Univ., and *Taiwan Semiconductor Manufacturing,Taiwan, China 306

(3) Comparison of CVD and PVD TaN as Diffusion Barriers for Al and Cu Metallization

S.C. Sun, M.H. Tsai, C.E. Tsai and H.T. Chiu, Nat'I Chiao Tung Univ., Taiwan, China... 309

(4) Optimization of Contact Process with Monte-Carlo Study for Advanced CMOS Devices

H. Sumi, T. Yanagida, H. Yamada, Y. Miyamori, Y. Sugano, S. Kishida* and H.

Tokutaka*, Sony and *Tottori Univ., Japan 312

(5) Direct Formation of Selective CVD-A1 Contact Plug on Titanium Silicide Obtained bySilicidation of Titanium Including NitrogenT. Komiya, Y. Takai and H. Shinriki, Kawasaki Steel, Japan 315

(6) Effects of Y or Gd Addition on the Structure of Al Thin Films

S. Takayama and N. Tsutsui*, IBM Japan and *Intern. Test and Eng. Services, Japan.. .318

(7) New Characterization of TiSi2 Local Wiring Technology and Its Impact on Low Power /

High Speed Quarter Micron CMOS

A. Ohtomo, J. Ida, N. Ozawa, M. Kageyama and H. Onoda, Oki Elec. Ind., Japan 321

(8) High-Speed and Low-Power Interconnect Technology for Sub-Quarter-Micron ASICsM. Miyamoto, T. Takeda and T. Furusawa, Hitachi, Japan 324

(9) Electrochemical Analyses for Corrosion Mechanism of Al-Cu Alloy Thin-FilmsN. Aoi, A. Kawaguchi, S. Mayumi and K. Yano*, Matsushita Elec. Ind. and

Matsushita, Japan 327

Modeling and Physics of Si Devices

(1) Investigation of Non-Equilibrium Carrier Transport in Sub-O.l/im MOSFET's Based onMonte Carlo Analysis

T. Shimatani and M. Koyanagi, Tohoku Univ., Japan 330

(2) Tail Electron Hydrodynamic Model for Consistent Modeling of Impact Ionization and Gate

InjectionJ.-G. Ahn, Y.-J. Park* and H.-S. Min*, LG Semicon and *Seoul Nat'I Univ., Korea .. .333

(3) Study of Quasi-Two Dimensional Hole Gas Si/Si„Gej.x/Si Quantum WellsS. Cheon, S.C. Lee*, S. Hong and K.-H. Yoo**, KAIST, *Elec. and Telecom. Res. Inst,and **Korea Res. Inst. Standards and Science, Korea 336

(4) Fabrication and Transport Properties of Gate-Ail-Around Silicon Quantum Wire Transistor

K. Morimoto, Y. Hirai, K. Yuki and K. Morita, Matsushita Elec. Ind., Japan 339

(5) Extremely Large Amplitude of Random Telegraph Signals in a Very Narrow Split-GateMOSFET at Low Temperatures

H. Ishikuro, T. Saraya, T. Hiramoto and T. Ikoma*, Univ. Tokyo and *Texas In¬

struments, Japan 342

(6) Guided Modes of Electron Wave in a Si-Quantum Wire

Y. Okawa, H. Tsuchiya and T. Miyoshi, Kobe Univ., Japan 345

(7) The Possibility of Quantized Conductance at Temperatures above 4.2K in Bulk SiMOSFETs

K. Takeuchi, D. Hisamoto, H. Yamashita* and M. Aoki, Hitachi and *Hitachi VLSI

Eng., Japan 348

C-2: Doping (13:50-16:00)

50 (1) Plasma Immersion Ion Implantation for Electronic Materials Applications (Invited)N.W. Cheung, W. En, J. Gao, S.S. Iyer, E.C. Jones, B.P. Linder, J.B. Liu, X. Lu,J. Min and B. Shieh, Univ. California, U.S.A 351

20 (2) Ultra Shallow p-!-n Junction Formation Using the Solid Phase Diffusion(SPD) through'a-Si/Thin Barrier Oxide' Layer

S.J. Kwon, B.G. Park* and J.D. Lee*, Kyungwon Univ., and *Seoul Nat'I Univ., Korea... 35440 (3) On the Use of Indium and Gallium as P-Type Dopants in Si 0.1 /am MOSFETs

S. Biesemans, S. Kubicek, J.V. Laer, F. Loosen, L. Geenen, K. Maex and K.D. Meyer,IMEC, Belgium 357

XXIV

15:00 (4) Study of Penetrated Boron Concentration through Ultra-Thin Oxynitrided Gate Dielectrics

M. Kawata, M. Kitakata, E. Hasegawa, A. Ishitani, K.S. Krisch*, M.L. Green*,D. Brasen*, L. Manchanda* and L.C. Feldman*, NEC, and *AT&T Bell Labs. U.S.A.,

Japan 360

15:20 (5) Characteristics of Boron Diffusion from BSG Film and the Formation of Ultra-Shallow,Low-Resistance Junctions

H. Kujirai, E. Murakami and S. Kimura, Hitachi, Japan 363

15:40 (6) Effect of Substrate Boron Concentration on the Integrity of 450°C-Annealed Ion-ImplantedJunctions

A. Nakada, M.M. Oka, Y. Tamai, T. Shibata, H. Aharoni and T. Ohmi, Tohoku Univ.,

Japan 366

C-3: Others (16:20-17:50)

16:20 (1) Assigning Core-Level Si 2p Photoemission Shifts at the Si/Si02 Interface (Invited)S. Lee, M.B. Holl, W.H. Hung* and F.R. Mcfeely*, Brown Univ. and *IBM T.J. Watson

Res. Cir., U.S.A 369

16:50 (2) Optical Cavity Based on Porous Silicon Superlattice TechnologyM. Araki, H. Koyama and N. Koshida, Tokyo Univ. Agri. Tech., Japan 371

17:10 (3) Fabrication of a Si Nanometer Column pn Junction and Implanted Damage Evaluation by

TEM

H. Sukesako, K. Inoue, T. Kawasaki, H. Sakaue, S. Shingubara, T. Takahagi and

Y. Horiike*, Hiroshima Univ., and *Toyo Univ., Japan 374

17:30 (4) Extremely Low ON-Resistance Metal to Metal Antifuses with Al/p-SiN/Al Structure for

Next Generation FPGAs

Y. Kimura, Y. Tamura, C. Tsutsui and H. Shinriki, Kawasaki Steel, Japan 377

18:30-20:45 Rump Session d: Planarization Technology for Dielectric and Metal Films in ULSI Applications

Room D

D-3: HBTs & Tunneling Devices (9:20-11:10)

9:20 (1) High Volume Production of Heterojunction Bipolar Transistors (Invited)D.C. Streit, TRW, U.S.A 380

9:50 (2) Orientation Effect on AlGaAs/GaAs Heterojunction Bipolar Transistors

H. Ishida and D. Ueda, Matsushita, Japan 383

10:10 (3) 1.5V Low-Voltage Microwave Power Performance of InAlAs/InGaAs Double Heterojunc¬

tion Bipolar Transistors

T. Iwai, H. Shigematsu, H. Yamada, T. Tomioka, K. Joshin and T. Fujii, Fujitsu Labs.,

Japan 386

10:30 (4) Nonequilibrium Noise in the Current Flowing through Modulation-Doped Double-Barrier

Resonant Tunneling Structures

S. Sasaki, D.G. Austing, T. Honda and S. Tarucha, NTT, Japan 389

10:50 (5) Lateral Tunneling Devices on GaAs (111)A and (311)A Patterned SubstratesGrown by

MBE Using Only Silicon Dopant

H. Ohnishi, M. Hirai, K. Fujita and T. Watanabe, ATR, Japan 392

11:30-12:30 Poster Preview

Novel Electron Devices

(1) The Low-Temperature Characteristics of GaSb/AlSb/InAs/GaSb/AlSb/InAs Broken-Gap

Interband Tunneling StructureM.H. Liu, Y.H. Wang, M.P. Houng, J.F. Chen and A.Y. Cho, Nat'I Cheng Kung Univ.,

Taiwan, China395

(2) Numerical Study of Collector-Base Junction Design for Ultra-High-SpeedInP/InGaAs

Heterojunction Bipolar Transistors

G. Khrenov and E. Kulkova*, Univ. Aizu and *Res. Ctr. "MICROEL", Russia, Japan... 398

xxv

(3) Optimization of Current-Voltage Characteristics of Organic-on-Inorganic HeterostructureDiodes.

P. Urbach, C. Rompf, D. Ammermann and W. Kowalsky, Tech. Univ. Braunschweig,F.R.G

'

.. 4oi

(4) Solid State GMR MemoryZ. Wang, Tohoku Univ., Japan 404

(5) Crossover of Noise Power from Thermal to Shot Noise in Superconducting MesoscopicDevices

Y. Misaki, A. Saito* and K. Hamasaki*, Takuma Nat'I College Technol. and *NagaokaUniv. Technol., Japan 407

(6) Electric Field Effect in LaTi03/SrTi03 Heterostructure

C. Yoshida, H. Tamura, A. Yoshida*, Y. Kataoka, N. Fujimaki* and N. Yokoyama*,

Fujitsu Labs, and *Fujitsu, Japan 410

III-V FET

(1) New Fabrication Technology Integrating FETs and DiodesJ.-W. Jung, S.-C. Hong and Y.-S. Kwon, KAIST, Korea 413

(2) Low Noise Characteristics of 0.2 [im Alo.24Gao.76As/Ino.15Gao.s5As/GaAs PseudomorphicHEMTs with Wide Head T-Shaped Multifinger Gate

H.-S. Yoon, J.-H. Lee, C.-S. Park, K.-E. Pyun and H.-M. Park, Elec. Telecomm. Res.

Inst., Korea 416

(3) Excellent Thermally-Stable Epitaxial Channel for Implanted Planar-Type Hetero-JunctionField-Effect Transistors

S. Matsushita, E. Fujii, D. Inoue, S. Terada, S. Banba, K. Matsumura, M. Sawada and

Y. Harada, Sanyo Elec, Japan 419

(4) A Short Channel HEMT Model for Circuit Simulation Based on Physical Structure

K. Nakashi, K. Taniguchi, Y. Oka and F. Nakamura, Kyushu Univ., Japan 422

Late News

(LI) A 4:1 MUX Circuit Using 1/4-Micron CMOS/SIMOX for High-Speed and Low-Power

ApplicationsS. Yasuda, Y. Ohtomo, M. Ino, Y. Kado, H. Inokawa and T. Tsuchiya, NTT, Japan.. 1031

(L2) Effects of Implanted Dopants in the LDD Region on the Short Channel Effect of a DeepSub-Micron MOS Device

B.J. Koo, D.J. Jung, J.W. Park, N.S. Kang, T.E. Shim and M.Y. Lee, Samsung, Korea.. 1033

(L3) A High Performance p-Channel Transistor: /3-MOS FET

K. Yoh, R. Koizumi, N. Hashimoto* and S. Ikeda*, Hokkaido Univ. and *Hitachi,

Japan 1035

(L4) Polymide Waveguide as Optical Interconnection for multi-Chip Module ApplicationT. Matsumoto, Y. Kudoh, T. Yonezawa and M. Koyanagi, Tohoku Univ., Japan 1037

(L5) Light-Emitting Porous Silicon Prepared by Pulsed Anodic EtchingX. Hou, H. Fan, F. Zhang, M. Yu and M. Koyanagi, Tohoku Univ., Japan 1037

(L6) New Methods for ultra-Shallow Boron Doping by Using Plasma, Plasma-Less and Sputter¬

ingB. Mizuno, H. Nakaoka, M. Takase, A. Hori, I. Nakayama and M. Ogura, Matsushita

Elec. Ind., Japan 1041

(L7) Fabrication of Si/Al203/Si SOI Structures Grown by the UHV-CVD Method

T. Kimura, A. Sengoku and M. Ishida, Toyohashi Univ. Technol., Japan 1043

(L8) Determination of Chemical Shifts in Si2p Core-Level Spectra for Silicon-Hydrogen Bonds

on Chemically-Cleaned Su(100) and Si(lll) SurfacesC.H. Bjorkman, J.L. Alay, H. Nishimura, M. Fukuda, T. Yamazaki and M. Hirose,

Hiroshima Univ., Japan 1045

(L9) ULSI Technology Evaluation and Precautions: A Novel View of Si02 Layer Properties in

the nano- and Sub-Nanoscale.

O.V. Romanov, I.A. Kotov and H.-C. Lee*, St.-Petersburg Univ. and *KAIST, Korea,

Russia 1047

xxvi

D-4: Semiconductor Lasers (13:50-15:40)

13:50 (1) Tapered Thickness Waveguide Integrated BH MQW Lasers (Invited)H. Soda, H. Kobayashi, T. Yamamoto, M. Ekawa and S. Yamazaki, Fujitsu Labs,

Japan 425

14:20 (2) Beam Expander-Integrated Lasers Grown by Single-Step MOVPE

H. Sato, M. Aoki, M. Takahashi, M. Komori, K. Uomi and S. Tsuji, Hitachi, Japan . ..428

14:40 (3) Novel Structure of 1.3 /im Strained-Layer MQW Complex-Coupled DFB Lasers

M. Kito, S. Nakamura, N. Otsuka, M. Ishino and Y. Matsui, Matsushita Elec. Ind.,

Japan 431

15:00 (4) Anisotropic Oscillation Properties in Fractional-Superlattice Quantum Wire Lasers

H. Saito, N. Kobayashi and H. Ando, NTT, Japan 434

15:20 (5) Self-Sustained Pulsation in 650nm-Band AlGalnP Visible Laser Diodes with Highly Doped

Saturable Absorbing LayerH. Adachi, S. Kamiyama, I. Kidoguchi and T. Uenoyama, Matsushita Elec. Ind., Japan... 437

D-5: Novel Optical Devices (16:00-18:00)

16:00 (1) First Lasing Operation of Aluminum-Free 0.98-//m-Range InGaAs/InGaP/GaAs Vertical-

Cavity Surface-Emitting LasersK. Shinoda, K. Hiramoto, M. Sagawa and K. Uomi, Hitachi, Japan 440

16:20 (2) Low Threshold Current Density Surface-Emitting Lasers Buried by Amorphous GaAs

H.-H. Park, B.-S. Yoo, E.-H. Lee, M.S. Park* and B.T. Ahn*, Elec. Telecomm. Res.

Inst, and *KAIST, Korea 443

16:40 (3) InGaAs/GaAs Strained Quantum Well Lasers with Etched Micro-Corner Reflectors

J. Kato, F. Koyama, A. Matsutani, T. Mukaihara and K. Iga, Tokyo Inst. Technol.,

Japan 446

17:00 (4) 1100 Hours Stable Operation in 0.87-/^m InGaP/GaAs LED's on Si SubstratesGrown by

MOCVD

T. Egawa, J. Dong*, K. Matsumoto*, T. Jimbo and M. Umeno, Nagoyalnst. Technol.,

and *Nippon Sanso, Japan 449

17:20 (5) High Sensitivity Photodetector with Self-Amplification CapabilityH. Yamamoto, K. Taniguchi and C. Hamaguchi, Osaka Univ., Japan 452

17:40 (6) Growth and Characterization of Organic Semiconductor Devices: Photodetectorsand Light

Emitting Diodes (OLEDs)C. Rompf, D. Ammermann, A. Bohler and W. Kowalsky, Tech. Univ. Braunschweig,

F.R.G 455

Room E

14:00-16:00 Poster Presentation , , , , , , ,

August 23, Wednesday

Room A

Symposium 1-7: Amorphous and Crystalline Insulating Thin Films III

Gate Dielectrics and MOS Reliability I (9:20-10:50)

9:20 (1) Single, Individual Traps at the Si02/Si Interfacein Sub-^m MOSFETs (Invited)

M. Schulz, H.H. Mueller and U. Schirl, Univ. Erlangen, F.R.G458

9:50 (2) Time-Dependent Dielectric Degradation (TDDD)Influenced by Ultrathin Oxidation Process

M. Kimura and T. Ohmi, Tohoku Univ., Japan461

10:10 (3) Impact of Negative-Bias Temperature Instability onthe Lifetime of Single-Gate CMOS

Structures with Ultrathin(4-6 nm)Gate Oxides

S. Ogawa, M. Shimaya and N. Shiono*, NTT and *RCJ, Japan464

10:30 (4) Effect of Nitrogen Profile on Tunnel Oxynitride Degradationwith Charge Injection Polarity

T. Arakawa, R. Matsumoto and A. Kita, Oki Elec. Ind., Japan467

xxvn

Symposium 1-8: Amorphous and Crystalline Insulating Thin Films III

Gate Dielectrics and MOS Reliability II (11:10-12:10)

11:10 (1) Thermal Budget for Fabricating A Dual Gate Deep-Submicron CMOS with Thin Pure Gate

Oxide

K. Suzuki, A. Satoh, T. Aoyama, I. Namura, F. Inoue, Y. Kataoka, Y. Tada and

T. Sugii, Fujitsu Labs., Japan 47011:30 (2) New Dielectric Breakdown Model of Local Wearout in Ultra Thin Silicon Dioxides

K. Okada and S. Kawasaki*, Matsushita and *Matsushita Elec. Ind., Japan 473

11:50 (3) Superior Immunity to the Effects of Plasma-Induced Charging Damage on the Hot-Carrier

Reliability of MOSFET's with NO-nitrided Si02 Gate Dielectrics

B.W. Min, L.K. Han, M. Bhat, T.H. Cho, A.B. Joshi*, R. Mann*, L. Chung* and D.L.

Kwong, Univ. Texas and *Rockwell Telecommunications, U.S.A 476

12:10-12:40 Poster Preview

Symposium I: Amorphous and Crystalline Insulating Thin Films III

Gate Insulator Process

(1) N20-Anneal Induced Local Thinning of Regrown Oxide due to Nitrogen Residue at LOCOS

Isolation EdgesC. Huang, K.T. Sung, N.C. Peng, M. Chao, Y. Chang and F.C. Shone, Macronix Interna¬

tional, Taiwan, China 479

(2) Properties of "Stoichiometric" Silicon Oxynitride Films

L.N. He, T. Inokuma and S. Hasegawa, Kanazawa Univ., Japan 482

(3) Growth Kinetics of Ultrathin Silicon Dioxide Films Formed by Rapid Thermal Oxidation

H. Fukuda, K. Akase, T. Endoh and S. Nomura, Muroran Inst. Technol., Japan 485

(4) Low-Temperature Chemical-Vapor-Deposition of Silicon-Nitride Film from Hexachloro-

Disilane and HydrazineW.C. Yeh, R. Ishihara, S. Morishita and M. Matsumura, Tokyo Inst. Technol., Japan.. .488

(5) Excellent Quality of Si02 Dielectric Film Prepared by Room-Temperature Ion Plating and

Its Application to Thin-Film Transistors

T.-J. Chen, C.-F. Yeh, C.-L. Fan and J.-S. Kao*. Nat'I Chiao Tung Univ. and *Precision

Instrument Development Ctr., Nat'I Science Council, Taiwan, China 491

(6) Si02 Thin Films Formation by Reactive Evaporation of SiO at a Low Temperature and Its

Device ApplicationT. Sameshima and G. Langguth*, Tokyo Univ. Agri. Tech. and *Max-Planck-Inst.,

F.R.G., Japan 494

(7) Initial Stage of Si02/Si Interface Formation on Hydrogen-Terminated Silicon Surfaces

E. Iijima, T. Aiba, K. Yamauchi, H. Nohira, N. Tate*, M. Katayama* and T. Hattori,

Musashi Inst. Technol. and *Shin-Etsu Handotai, Japan 497

(8) Thickness-Deconvolved Structural Properties of Thermally Grown Silicon Dioxide Film

K. Ishikawa, H. Ogawa, S. Oshida, K. Suzuki and S. Fujimura, Fujitsu, Japan 500

Symposium 1-9: Amorphous and Crystalline Insulating Thin Films IIIFerroelectric Thin Films I (13:50-15:50)

13:50 (1) Atomically Controlled Formation of Dielectric and High Tc Oxide Thin Films by Laser

Ablation (Invited)T. Kawai, Osaka Univ., Japan 503

14:20 (2) High Dielectric Constant (Ba, Sr)Ti03 Thin Films for ULSI DRAM Application (Invited)Y. Miyasaka, NEC, Japan 506

14:50 (3) High-Frequency Characteristics of SrTi03 Thin Films in the mm-Wave BandK. Ikuta, Y. Umeda and Y. Ishii, NTT, Japan 509

15:10 (4) Fabrication and Characterization of the Single Grained PZT Thin FilmJ.-H. Joo and S.-K. Joo, Seoul Nat'I Univ., Korea 512

15:30 (5) A Comparison of Defect States in Tantalum Pentoxide (Ta2Os) Films after Rapid Thermal

Annealing in 02 or N20 by Zero-Bias Thermally Stimulated Current SpectroscopyW.S. Lau, K.K. Khaw and N.P. Sandler*, Nat'I Univ. Singapore and *Lam Res., U.S.A.,

Singapore 515

xxvui

Symposium MO: Amorphous and Crystalline Insulating Thin Films IIIFerroelectric Thin Films II (16:10-17:50)

16:10 (1) Ferroelectric Nonvolatile Memory Technology and Its Applications (Invited)T. Sumi, Matsushita, Japan 518

16:40 (2) A Comparison of the Properties of Candidate Ferroelectric Films for Non VolatileMemories (Invited)

A.I. Kingon, North Carolina State Univ., U.S.A 52117:10 (3) Imprint in PZT Capacitors: Causes and Solutions

W.L. Warren, D. Dimos, G.E. Pike, B.A. Tuttle, M.V. Raymond, R. Ramesh* andJ.T. Evans, Jr.**, Sandia Nat'I Labs., *Univ. Maryland and **Radiant TechnologiesInc., U.S.A 524

17:30 (4) Ferroelectric Properties of BaMgF4 Films Grown on Si(100), (111), and Pt(lll)/Si02/Si(100) StructuresK. Aizawa, T. Ichiki and H. Ishiwara, Tokyo Inst. Technol., Japan 527

Room B

B-5: TFT Devices and Processing (9:20-10:50)

9:20 (1) Does a Low Thermal Budget Help Us? -Crystallization, Si02 and TFT- (Invited)T. Sameshima, Tokyo Univ. Agri. Tech., Japan 530

9:50 (2) Impact of fi A-ON-Current Gate Ail-Around TFT (GAT) for 16MSRAM and BeyondS. Maegawa, T. Ipposhi, S. Maeda, H. Kuriyama, Y. Kohno, Y. Inoue and T. Hirao,Mitsubishi Elec., Japan 533

10:10 (3) Hydrogen Passivation on the Grain Boundary and Intragranular Defects in Various

Polysilicon Thin Film Transistors

K.Y. Choi, J.S. Yoo, H.-S. Cho, M.K. Han, Y.S. Kim* and I.G. Lim**, Seoul Nat'I

Univ., *Myongji Univ. and **LG Elec. Res. Ctr., Korea 53610:30 (4) PMOS Thin-Film Transistors Fabricated in RTCVD Polycrystalline Silicon Germanium

Films

S.-K. Lee, H.-G. Kim, W.-J. Chung*, B.K. Kang and O. Kim, Pohang Univ. Sci. Tech.,and *RIST, Korea 539

Symposium III: SOI Technology (11:10-17:50)

11:10 (1) Sub-0.2um Silicon-On-Insulator (SOI) CMOS: Opportunities and Challenges (Invited)

L.T. Su, IBM, U.S.A 542

11:40 (2) Formation of SiGe Source/Drain Using Ge Implantation for Floating-Body Effect Resistant

SOI MOSFETs

A. Nishiyama, O. Arisumi, M. Terauchi, M. Yoshimi, S. Takeno and K. Suzuki,

Toshiba, Japan 545

12:00 (3) Vth Rolloff Free Sub 0.1 /um SOI MOSFETs Using Counter Doping into a Uniformly and

Heavily Doped Channel RegionA. Satoh, K. Suzuki and T. Sugii, Fujitsu Labs., Japan 549

12:20 (4) Improvement of Breakdown Voltage in SOI MOSFET Using Gate-Recess (GR) Structure

J.-H. Choi, Y.-J. Park and H.-S. Min, Seoul Nat'I Univ., Korea 551

13:50 (5) Characterization of SOI Substrates for ULSI Applications (Invited)

S. Cristoloveanu, LPCS, France 554

14:20 (6) The Status and Future of Low-Dose SIMOX Technology (Invited)

M. Imai, T. Katayama and J. Jablonski, Komatsu Elec. Metals, Japan 557

14:50 (7) A High Performance 0.05/um MOSFET with Thin SOI/Buried Oxide Structure

K. Ohuchi, R. Ohba, H. Niiyama, K. Nakajima and T. Mizuno, Toshiba, Japan 560

15:10 (8) Two-Dimensionally Confined Carrier Injection Phenomena in Sub-10-nm-Thick SOI

Insulated-Gate pn-Junction Devices

Y. Omura, NTT, Japan 563

15:50 (9) Process Technology of Bonded SOI Wafers:Recent Development and Quality (Invited)

K. Mitani, Shin-Etsu Handotai, Japan 566

xxix

16:20 (10) Active Matrix Liquid Crystal Displays(AMLCD's) and Active Matrix Electroluminescent

(AMEL) Displays Using Silicon-On-InsuIator(SOI) Technology (Invited)

A.C. Ipri, G. Dolny, R.G. Stewart, R. Khormaei*, C. King*, M. Spitzer**, D.-P. Vu**,T. Keyser***, G. Becker***, D. Kagey***, M. Tilton****, H. Franklin*****,

R. Ellis*****, M. Jeppson*****, M. Helgeson***** and S. Nelson*****, David Sarnoff

Res. Ctr., *Planar America, **Kopin, ***Allied Signal Aerospace, ****Standish Ind. and

*****Honeywell, U.S.A 569

16:50 (11) Comparison of 1/4-Micron-Gate Fully-Depleted CMOS/SIMOX and Bulk Gate Arrays for

Low-Voltage, Low-Power Applications

Y. Kado, H. Inokawa, K. Nishimura, Y. Okazaki, M. Sato, T. Ohno, T. Tsuchiya,

M. Ino, K. Takeya and T. Sakai, NTT, Japan 572

17:10 (12) High-Speed 0.5/im SOI 1/8 Frequency Divider with Body-Fixed Structure for Wide Range

of ApplicationsT. Iwamatsu, Y. Yamaguchi, K. Ueda, K. Mashiko, Y. Inoue and T. Hirao, Mitsubishi,

Japan 575

17:30 (13) New MOS Current Mode Logic Using SOI-MOSFET with Body Terminal

N. Terao, T. Matsumoto, Y. Kudoh, S. Pidin and M. Koyanagi, Tohoku Univ., Japan... 578

18:30-20:45 Rump Session a: Ultra Large Diameter Bulk, Epi. and SOI Wafers for 1 GHz MPU and 1 G bit

DRAM

Room C

C-4: CMP/Isolation (9:20-10:50)

9:20 (1) Planarization by Polishing: Chemical Processes in Dielectric and Metal CMP (Invited)

L.M. Cook, Rodel, U.S.A 5819:50 (2) Ultra-Uniform CMP Using a Hydro Film Buffered Chuck (Hydro Chuck)

Y. Hayashi, T. Nakajima and T. Kunio, NEC, Japan 584

10:10 (3) A Post Gigabit Generation Flash Memory Shallow Trench Isolation Scheme. The LATI-STIProcess (LArge Tilt Implanted Sloped Trench Isolation) Using 100% CMP Planarization.

S. Deleonibus, M. Heitzmann, Y. Gobil, F. Martin, O. Demolliens and J.C. Guibert,LETI, France 587

10:30 (4) Highly Manufacturable Shallow Trench Isolation for Giga Bit DRAMB.H. Roh, Y.H. Cho, Y.G. Shin, C.G. Hong, S.D. Gwun, K.Y. Lee, H.G. Kang,K.N. Kim and J.W. Park, Samsung, Korea 590

.1:10-12:30 Poster Preview

Symposium I: Amorphous and Crystalline Insulating Thin Films III

Interlayer

(1) Characterization of Charged Traps near Si-Si02 Interface in Photo-CVD SiOz FilmH. Yamamoto, S. Iwasaki, K. Okumura, T. Kanashima, M. Okuyama andY. Hamakawa, Osaka Univ., Japan 593

(2) Leakage Current Conduction Mechanism of Liquid Phase Deposited (LPD)Si02 FilmT.-H. Fan, S.-S. Lin and C.-F. Yeh, Nat'I Chiao Tung Univ., Taiwan, China 596

(3) The Behavior of Alkoxy-Functional Groups on Atmospheric-Pressure Chemical VaporDeposition Using Alkoxysilane and Ozone

K. Ikeda and M. Maeda, NTT, Japan 599

(4) Low Dielectric Constant Fluorinated Oxide Films Prepared by Remote Plasma Chemical

Vapor DepositionS.M. Lee, M. Park*, K.C. Park, J.T. Baek* and J. Jang, Kyung Hee Univ. and *ETRI,Korea 602

(5) Densified SiOF Film Formation for Preventing Water AbsorptionH. Kudo, R. Shinohara, S. Takeishi, N. Awaji* and M. Yamada, Fujitsu and *FujitsuLabs., Japan 605

xxx

(6) Elimination of Al Line and Via Resistance Degradation under HTS Test in the Applicationof F-Doped Oxide as Intermetal Dielectrics

B.K. Hwang, J.H. Choi, S.W. Lee, K. Fujihara, U.I. Chung, S.I. Lee and M.Y. Lee, Sam¬

sung, Korea 608

(7) The Origin of Micro-Loading Effect of TEOS-03 Oxide IIU.I. Chung, M.B. Lee, I.S. Park, S.I. Lee and M.Y. Lee, Samsung, Korea 611

(8) Thermal Stability of Amophous Ion Beam Sputtered Refractory Oxides for AR/HR DFB

Coatings and Low Loss Optical Waveguide PurposesB. Kempf and H.W. Dinges, Deutsche Bundespost Telekom, F.R.G 615

Doping and Cleaning for Si

(1) Enhanced Boron Diffusion in the Base of SiGe HBTs Induced by Implants into PolysiliconEmitters

S. Ito and S. Nishikawa, Oki Elec. Ind., Japan 617

(2) The Cleaning of Particle and Metallic Impurity on Si Wafer Surface by Fluorine EtchantH. Izumi, M. Nose, S. Ojima, K. Kubo and T. Ohmi, Tohoku Univ., Japan 620

(3) Surface Observation and Modification of Si Substrate in SolutionsA. Ando, K. Miki, K. Matsumoto, T. Shimizu*, Y. Morita* and H. Tokumoto, ETL and

*NAIR, Japan 623

(4) Oxidation Processes on H-Terminated Si(100) Surfaces Studied by High-Resolution Elec¬tron Energy Loss SpectroscopyH. Ikeda, K. Hotta, S. Furuta, S. Zaima and Y. Yasuda, Nagoya Univ., Japan 626

(5) Atomic-Scale Planarization of 6-Inch Si(001) Substrate by UHV HeatingK. Idota, M. Niwa and I. Sumita*, Matsushita Elec. Ind. and *Matsushita Res. Inst.

Tokyo, Japan 629

Characterization of Si

(1) Characterization of Surface Potential of Si-Si02 Interface by Photoreflectance SpectroscopyA. Fujimoto, T. Imai*, M. Okuyama* and Y. Hamakawa*, Wakayama Nat'I Coll.

Technol. and *Osaka Univ., Japan 632

(2) Gas-Surface Interaction Influence on Electrical Properties of New Gas Sensitive Metal Oxi¬

de-Metal Sandwich Structure

A. Galdikas, A. Mironas, D. Senuliene and A. Setkus, Semiconductor Physics Inst.,

Lithuania 635

(3) Angle Position Detection Using a Novel Double Hollow Four Quadrant Orientation Detec¬

tor for Application to Pattern RecognitionK.-C. Lin and S.-C. Lee, Nat'I Taiwan Univ., Taiwan, China 638

(4) Effects of Dielectrics on the Characteristics of Large-Area Silicon Microstrip Sensors

W.-C. Tsay, Y.-A. Chen, J.-W. Hong, A. Chen, W.T. Lin, Y.H. Chang, S.R. Hou,

S.L. Hsu, C.R. Li, H.-J. Ting* and S.-T. Chiang*, Nat'I Central Univ. and *ITRI,

Taiwan, China 641

(5) Modeling and Analysis of RF Plasma Using Electrical Equivalent Circuit

K. Ino and T. Ohmi, Tohoku Univ., Japan 644

TFT Devices and Processing

(1) Effects of Channel Thickness on Poly-Crystalline Silicon Thin Film Transistors

M. Miyasaka, T. Komatsu, W. Itoh, A. Yamaguchi and H. Ohshima, Seiko Epson,

Japan 647

(2) Back-Gate Effects of Amorphous-Si TFTs with an Inorganic Black Matrix on Array

Y. Kato, Y. Kaida, Y. Miyoshi, M. Atsumi, S.L. Wright* and L.F. Palmateer*. IBM

Japan and IBM Thomas J. Watson Res. Ctr., U.S.A., Japan 650

(3) Application of Electron Cyclotron Resonance Plasma Thermal Oxidation to Bottom Gate

Polysilicon Thin Film Transistors

J.-I. Han, J.-Y. Lee, D.-S. Choi, C.-K. Kim and C.-H. Han, KAIST, Korea 653

(4) Self-Aligned Offset Gated Poly-Si TFTs by Employing a Photo Resistor Refiow Process

C.-M. Park, B.-H. Min, K.-H. Jang, J.-H. Jun and M.-K. Han, Seoul Nat'I Univ.,

Korea 656

xxxi

(5) Hydrogenation of Polysilicon Thin Film Transistors Using Inductively Coupled PlasmaS.-H. Hur, K.-S. Choi, C.-K. Kim and C.-H. Han, KAIST, Korea 659

(6) Grain Boundary Structure and Bandtail Transport in High Mobility Poly-Si TFTs

T. Serikawa, S. Shirai, S. Takaoka*, K. Nakagawa*, K. Oto*, K. Murase* and S.

Ishida**, NTT, *Osaka Univ. and **Science Univ. Tokyo, Japan 662

Symposium V: Blue/Green Light Emitters and Related Materials

Science (13:50-17:50)

13:50 (1) Blue/Green Light Emitters Based on II-VI Heterostructures on ZnSe Substrates (Invited)C. Boney, D.B. Eason, Z. Yu, W.C. Hughes, J.W. Cook, Jr., J.F. Schetzina,

G. Cantwell* and W.C. Harsch*, North Carolina State Univ. and *Eagle-Picher, U.S.A... .66514:15 (2) Observation of Dark Line Defects in Optically Degraded ZnSxSe,_x-Based LEDs by

Transmission Electron Microscopy (Invited)

L. Salamanca-Riba and L.H. Kuo, Univ. Maryland, U.S.A 66814:40 (3) RT Operation of ZnSe-Active-Layer and ZnCdSe-Active-Layer Laser Diodes

H. Okuyama, N. Nakayama, S. Itoh, M. Ikeda and A. Ishibashi, Sony, Japan 67114:55 (4) Low Threshold and Low Divergence Blue Vertical-Cavity Surface-Emitting Laser Diodes

T. Yokogawa, S. Yoshii, A. Tsujimura, Y. Sasai and J. Merz*, Matsushita Elec. Ind. and

*Univ. Notre Dame, U.S.A., Japan 67415:10 (5) P- Type Conducting ZnSe and ZnSSe by N2-Gas Doping during Molecular Beam Epitaxy

Y. Hishida, T. Yoshie, K. Yagi, K. Yodoshi and T. Niina, Sanyo Elec, Japan 67715:25 (6) Characterization and Improvements of Metal-p Type ZnSe Interfaces

K. Ando, T. Hirakawa, A. Ohki*, T. Ohno* and H. Yonezawa*, Tottori Univ. and

*NTT, Japan 680

16:00 (7) Fabrication and Properties of GaN-Based Quantum Well Structure for Short Wavelength

Light Emitter (Invited)

H. Amano and I. Akasaki, Meijo Univ., Japan 68316:25 (8) InGaN Light-Emitting Diodes with Quantum Well Structures (Invited)

S. Nakamura, Nichia Chem. Ind., Japan 686

16:50 (9) Optical Gain of Wurtzite GaN/AlGaN Quantum Well LasersT. Uenoyama, M. Suzuki and S. Kamiyama, Matsushita Elec. Ind., Japan 689

17:05 (10) MBE Growth and Properties of GaN, AlxGa,.xN and A1N on GaN/SiC Substrates

S. Fujita, M.A.L. Johnson, W.H. Rowland, Jr., W.C. Hughes, Y.W. He, N.A.E. Masry,J.W. Cook, Jr., J.F. Schetzina, J. Ren* and J.A. Edmond*, North Carolina State Univ.and *Cree Res., U.S.A 692

17:20-17:50 Poster Preview

Symposium V: Blue/Green Light Emitters and Related Materials Science

(1) Excitonic Emissions in GaN Films on A1N Substrates Using Microwave-Excited N Plasma

Epitaxial GrowthK. Okada, A. Kai, Y. Yamada, T. Taguchi and H. Taniguchi*, Yamaguchi Univ. and

Tokuyama, Japan 695

(2) MBE Growth and Properties of ZnO on Sapphire and SiC SubstratesM.A.L. Johnson, S. Fujita, W.H. Rowland, Jr., W.C. Hughes, J.W. Cook, Jr.,J.F. Schetzina, J. Ren* and J.A. Edmond*, North Carolina State Univ., and *Cree Res.,

Inc., U.S.A 699

(3) withdrawn

(4) Room-Temperature Excitonic Optical Bistability in ZnSe-ZnCdSe/CaF2 Multiple QuantumWells.

Y.M. Lu, L.C. Chen, Z.P. Guan, D.Z. Shen and X.W. Fan, Academia Sinica, China.. .701

(5) Effects of GaAs Surface Pretreatment and Post-Growth Annealing on Interface Propertiesof MBE-ZnSe/GaAs(Sub.) System

Y. Yamagata, T. Sawada, K. Imai, I. Tsubono and K. Suzuki, Hokkaido Inst. Technol.,

Japan 704

(6) Schottky Barrier Height Reduction for p-ZnSe Contacts by Sulfur TreatmentM. Onomura, S. Saito, J. Rennie, Y. Nishikawa, P.J. Parbrook, M. Ishikawa and

G. Hatakoshi, Toshiba, Japan 707

xxxn

(7) Operating Current Dependence of CdZnSe/ZnMgSSe Laser Diodes on Band Gap and Car¬rier Concentration of P-Type Cladding Layer.

S. Nakatsuka, J. Gotoh, K. Mochizuki, A. Taike, M. Kawata and M. Momose, Hitachi,

Japan 710

(8) MOMBE Growth of Nitrogen-Doped p-Type ZnSeG. Sato, T. Numai, M. Hoshiyama, I. Suemune, H. Machida* and N. Shimoyama*, Hok¬kaido Univ. and *Trichemical Lab., Japan 713

Symposium V: Blue/Green Light Emitters and Related Materials Science

(LI) Raman Scattering Characterization of the Crystalline Qualities of ZnSe Films Grown on

S-Passivated GaAs(lOO) SubstratesJ. Wang, X.H. Liu, Z.S. Li, Z. Ling, X.Y. Hou and X. Wang, Fudan Univ., China ... 1049

18:30-20:45 Rump Session c: Memory Device Application of Ferroelectric Thin Films

Room D

Symposium VI: Fabrication and Characterization of Quantum Nanostructures (9:20-10:40)

9:20 (0) Introductory TalkY. Arakawa, Univ. Tokyo, Japan

9:30 (1) InAs-GaAs Quantum Dot Lasers: in Situ Growth, Radiative Lifetimes and Polarization Pro¬

perties (Invited)D. Bimberg, N.N. Ledentsov, N. Kirstaedter, O. Schmidt, M. Grundmann, V.M.

Ustinov*, A.Y. Egorov*, A.E. Zhukov*, M.V. Maximov*, P.S. Kop'ev*, Z.I. Alferov*,

S.S. Ruvimov**, U. Gosele** and J. Heydenreich**, Tech. Univ. Berlin, *A.F. Ioffe

Physical-Technical Inst., Russia and **Max-Plank-Inst., F.R.G 716

10:00 (2) InAs/GaAs Multi-Coupled Quantum Dots Structure Enabling High-Intensity, Near-1.3-/mi

Emission due to Cascade Carrier Tunneling

A. Tackeuchi, Y. Nakata, S. Muto, T. Inata, T. Usuki, Y. Sugiyama, N. Yokoyama and

O. Wada, Fujitsu Labs., Japan 719

10:20 (3) First Fabrication of a Reliable AlGaAs/GaAs LED on Si with Self-Assembled GaAs Islands

Active RegionY. Hasegawa, T. Egawa, T. Jimbo and M. Umeno, Nagoya Inst. Technol., Japan 722

11:00-12:10 Poster Preview

Non Si Materials

(1) Formation of (411)A Faceted GaAs Ridges Using Chemical Beam Epitaxy

J.-R. Ro, S.-J. Park, S.-B. Kim and E.-H. Lee, Elec. Telecomm., Korea 725

(2) Surface Stoichiometry and Reconstruction of GaP(OOl)

M. Yoshikawa, A. Nakamura, T. Nomura and K. Ishikawa, Shizuoka Univ., Japan 728

(3) High Carbon Doping of GaAs and AlAs in Distributed Bragg Reflectors

H.T. Grahn, H. Norenberg*, A. Mazuelas, B. Jenichen and R. Hey, Paul-Drude-Inst.,

F.R.G 731

(4) Valence Band Modulation in InGaAs/InAlAs Superlattices with TensilelyStrained Wells

Grown on InGaAs Quasi-Substrate on GaAs

K. Tominaga, M. Hosoda, T. Watanabe and K. Fujiwara*, ATR and *Kyushu Inst.

Technol., Japan 734

(5) withdrawn

(6) The in Situ Growth of Lateral Confinement Enhanced RectangularAlGaAs/AlAs Quantum

Wires by Utilizing the Spontaneous Vertical Quantum Wells

W. Pan, H. Yaguchi, K. Onabe, R. Ito, N. Usami* and Y. Shiraki*. Univ. Tokyo and

*RCAST, Japan 737

(7) Robust Quantum Levels for Electrons and Holes in n-AlxGai.xAs/u-GaAs/u-AlxGai.xAs

Modulation-Doped Corrugated Double Heterojunctions

K. Vacek and T. Usagawa, Hitachi, Japan 740

(8) Optical Characterization of InAs Quantum Dots Fabricated byMolecular Beam Epitaxy

T. Saitoh, H. Takeuchi, J. Konda and K. Yoh, Hokkaido Univ., Japan 743

xxxiu

(9) Enhancement of Average Velocity of Hot Carriers in Appropriate Heterostructures Due toInversion of Distribution Functions.

V.A. Kozlov and A.B. Kozyrev, Russian Academy Sciences, Russia 746

(10) Anomalous Effect in La2.xSrxCu04 on Doping Level x= 1/4"M. Sugahara, A. Ito, S. Maejima, S.B. Wu, H. Gao, K. Uno, X.Y. Han, H.F. Lu,H. Haneji and N. Yoshikawa, Yokohama Nat'I Univ., Japan 749

(11) Vanishing of Negative Differential Resistance Region Due to Electric Field Screening in Wan-nier-Stark Localization Type Self-Electro-Optic Effect Devices

M. Hosoda, K. Tominaga, T. Watanabe and K. Fujiwara*. ATR and *Kyushu Inst.

Technol., Japan 752(12) Study on Sulfur Passivation for CuInSe2 Polycrystalline Thin Film with (NH4)2SX Solution

Y.H. Cheng, B.H. Tseng*, J.J. Loferski and H.L. Hwang, Nat'I Tsing-Hua Univ. and

Nat'I Sun Yat Sen Univ., Taiwan, China 755

(13) Nitrogen Ion Implantation and Thermal Annealing in SiC Single CrystalT. Miyajima, N. Tokura, A. Fukumoto*, H. Hayashi* and K. Hara, Nippondenso and

Toyota Central Res. & Develop. Labs., Japan 758(14) Electronic Raman Scattering and DX Centers in GaNxAlxAs: Te

S. Lian, B. Zhou, Z. Chen, J. Xu and H. Zhou, Univ. Xiamen, China 761

(15) Cathodo-Electro-Luminescence of Diamond p-i-p Layered StructureT. Maki and T. Kobayashi, Osaka Univ., Japan 764

(16) Simple Kinetic Model of ECR-RIBE Reacor for the Optimization of GaAs Etching ProcessM. Sugiyama, T. Yamaizumi, M. Nezuka*, Y. Shimogaki, Y. Nakano, K. Tada andH. Komiyama, Univ. Tokyo and Plasma System, Japan 767

Late News

(LI) Proposal of a Technique to Detect Sub-Surface Hot Electrons with a Scanning Probe

MicroscopeF. Vazquez, K. Furuya and D. Kobayashi, Tokyo Inst, Technol., Japan 1051

(L2) Observation of the Electron Reflection from N~/N+ Junction in GaAs by Resonant Tunnel¬

ing through Pseudoquantum Well in Single Barrier Heterostructure.Y.V. Dubrovskii, T.G. Andersson*, Y.N. Khanin, LA. Larkin and E.E. Vdovin, Russian

Academy Sciences and *Chaimers Univ. Technol., Sweden, Russia 1053

(L3) Reconstruction Dependent Electron-Hole Recombination on GaAs(OOl) SurfacesH. Yamaguchi, K. Kanisawa and Y. Horikoshi, K. Kanisawa and Y. Horikoshi, NTT,Japan 1055

(L4) Ordering Phenomenon in Highly Doped III-V Semiconductor materialsV.A. Bogdanova, V.I. Dubovic, V.V. Prudnikov and N.A. Semikolenova, Russian

Academy Sciences, Fussia 1057

(L5) Ruduction of Threading Dislocation Density in InP-on-Si Heteroepitaxy with StrainedShort-Periods SuperlatticesK. Samonji, Y. Takagi, H. Yonezu, K. Iwaki, N. Ohshima, J.K. Shin and K. Pak,Toyohashi Univ. Technol., Japan 1059

(L6) The Application of CVD Si02 and PECVD Si3N4 in Fabrication and Passivation of Long-Wavelength HgCdTe Photodiode ArraysV.M. Emeksuzyan, L.N. Romashko, G.Y. Saleeva, T.I. Zakharyash, N.K. Talipov,V.V. Vasil'ev and V.N. Ovsyuk, Russian Academy Sciences, Fussia 1061

Symposium VI: Fabrication and Characterization of Quantum Nanostructures (13:50-18:10)

50 (1) Ordered Quantum Dots: A New Self-Organizing Growth Mode on High-Index Semiconduc¬tor Surfaces (Invited)R. Notzel, J. Temmyo*, A. Kozen*, T. Tamamura*, T. Fukui and H. Hasegawa, Hok¬kaido Univ. and *NTT, Japan 770

20 (2) Stacked InAs Self-Assembled Quantum Dots on (001) GaAs Grown by Molecular BeamEpitaxyY. Sugiyama, Y. Nakata, K. Imamura, S. Muto and N. Yokoyama, Fujitsu Labs., Japan... 773

40 (3) Preferential Nucleation of Nanocrystalline Silicon along MicrostepsM. Otobe, J. Kawahara and S. Oda, Tokyo Inst. Technol., Japan 776

xxxiv

15:00 (4)

15:20 (5)

16:00 (6)

16:30 (7)

16:50 (8)

17:10 (9)

17:30 (10)

17:50 (11)

In Situ Direct Imaging of Scanning Tunneling Microscope Tip ApexS. Heike, T. Hashizume and Y. Wada, Hitachi, Japan 779

Confinement Potential in an Asymmetrically Biased Quantum Point ContactF. Wakaya, J. Takahara, S. Takaoka, K. Murase and K. Gamo, Osaka Univ., Japan .. .782

Formation and Characterization of AlGaAs Quantum Wires on Vicinal (110) Surfaces

(Invited)H. Nakashima, M. Takeuchi, K. Kimura, M. Iwane, H.K. Huang, K. Inoue,J. Christen*, M. Grundmann** and D. Bimberg**, Osaka Univ. *Otto-von-GuerickeUniv. Magdeburg and **Tech. Univ. Berlin, F.R.G 785

Substrate Misorientation Effect on Self-Organization of Quantum-Wires in (GaP)m/(InP)mShort Period Binary Superlattices

J. Yoshida, I. Nomura, A. Kikuchi and K. Kishino, Sophia Univ., Japan 788Photoluminescence and Cathodoluminescence Characterization of InGaAs Ridge QuantumWires Formed by Selective Molecular Beam EpitaxyH. Fujikura and H. Hasegawa, Hokkaido Univ., Japan 791

Design and Fabrication of InGaAs/GaAs Quantum Wires for Vertical-Cavity Surface-Emit¬

ting LasersN. Hatori, T. Mukaihara, Y. Hayashi, N. Ohnoki, F. Koyama and K. Iga, Tokyo Inst.

Technol., Japan 794

A Novel Lateral Surface Superlattice Structure Utilizing Schottky Barrier Height Control by

Doped Silicon Interface Control LayersS. Kasai and H. Hasegawa, Hokkaido Univ., Japan 797

Polarization Controlled Spontaneous Emission from a GalnAsP/InP Strained QW 2D

Photonic CrystalT. Baba and T. Matsuzaki, Yokohama Nat'I Univ., Japan 800

Room E

14:00-16:00 Poster Presentation , , , , , ,

August 24, Thursday

Room B

LB: Late News (9:20-12:10)

9:20 (LI) Real-Time TEM Studies of Electromigration in Submicron Aluminum Runners

S.P. Riege, A.W. Hunt and J.A. Prybyla, AT&T Bell Labs., U.S.A 1063

9:30 (L2) Octahedral-Structured Gigantic Precipitates as the Origin of Gate-Oxide Defects in

MOSLSIs

M. Itsumi, H. Akiya, T. Ueki, M. Tomita and M. Yamawaki, NTT, Japan 1065

9:40 (L3) Deposition and Characterization of Fluorine Doped Si02 Films Using Atmospheric Pressure

Organosilane/03 ChemistryY. Nishimoto, Y. Yuyama, N. Tokumasu and K. Maeda, Semiconductor Process Lab.,

Japan 1067

9:50 (L4) Preparation of SrBi2Ta209 Films by Laser Ablation Method

Y. Oishi, K. Fumoto, W. Wu, M. Okuyama and Y. Hamakawa, Osaka Univ., Japan .. 1069

10:00 (L5) Ultra-Thin Fatigue Free Bi4Ti3012 Thin Films for Nonvolatile Ferroelectric Memories

T. Kijima, S. Satoh, H. Matsunaga and M. Koba, Sharp, Japan 1071

10:10 (L6) Three-Diensional Integration Technology Based on Wafer Bonding Technique Using Micro-

Bumps

T. Matsumoto, Y. Kudoh, M. Tahara, K.-H. Yu, N. Miyakawa*, H. Itani**,

T. Ichikizaki**, A. Fujiwara**, H. Tsukamoto** andM. Koyanagi, Tohoku Univ., *Fuji

Xerox and **Mitsubishi Heavy Ind., Japan 1073

10:20 (L7) Optically Interconnected Kohonen Net for Pattern Recognition

T. Doi, T. Namba, A. Uehara, M. Nagata, S. Miyazaki, K. Shibahara, S. Yokoyama, A.

Iwata, T. Ae and M. Hirose, Hiroshima Univ., Japan 1075

xxxv

10:30 (L8) Light-Emitting pn Homo-Junction Diode with Direct Doping into PorousSi

T. Suzuki, T. Sakai and L. Zhang, Toshiba, Japan 1077

10:40 (L9) Stable Operation of Single Electron Logic Circuitswith Feed-Back Loop

K. Masu and K. Tsubouchi, Tohoku Univ., Japan 1079

11:10 (L10) InP-Based High-Performance Monostable-Bistable Transition Logic elements (MOBILEs)

Using Resonant-Tunneling Devices

K.J. Chen, K. Maezawa and M. Yamamoto, NTT, Japan 1081

11:20 (Lll) Direct Observation of Electron Jet from a Point Contact

Y. Nagamune, T. Noda, H. Watabe, Y. Ohno, H. Sakakiand Y. Arakawa, NTT, Japan.. 1081

11:30 (LI2) Coherent Resonant Transport and Coulomb BlockadeOscillations through Quantum Dot

Structures with a Novel Gate Configuration Realized from a Pseudomorphic AlGaAs/

InGaAs/GaAs Heterostructure

T.H. Wang, T. Honda and S. Tarucha, NTT, Japan 1085

11:40 (L13) Regular Array Formation of Self-Assembled InAs Dots Grown on Patterned (lll)B GaAs

Substrate by MBE

T. Saitoh, A. Tanimura and K. Yoh, Hokkaido Univ., Japan 1087

11:50 (LI4) Observation of OD Subband Structures in Single Quantum Dots by Microscopic

Photoluminescence Excitation Spectroscopy

M. Notomi, T. Furuta, H. Kamada, J. Temmyo and T. Tamamura, NTT, Japan 1089

12:00 (L15) First Epitaxial Growth of Zincblende ZnSe/MgS SuperlatticesT. Obinata, H. Kumano, K. Uesugi, J. Nakahara and I. Suemune, Hokkaido Univ.,

Japan 1091

B-6: Hot-Carrier Effects in MOSFETs (13:50-15:20)

13:50 (1) Extreme-Submicron Si-Based MOSFETs:Scaling Characteristics and Engineering Tradeoffs

(Invited)D.A. Antoniadis, Massachusetts Inst. Technol., U.S.A 803

14:20 (2) Hot-Carrier Reliability of 0.1 pm Delta-Doped MOSFETs

K. Noda, T. Uchida, T. Tatsumi and C. Hu*. NEC and *Univ. California, U.S.A.,

Japan 806

14:40 (3) Analysis of Structure-Dependent Hot Carrier Effect in Various LDD MOSFET's Using an

Efficient Interface State Profiling Method

J.-J. Yang, S.S. Chung, P.-C. Chou, J.-R. Shih*, C.-H. Chen* and M.-S. Lin*, Nat'I

Chiao Tung Univ. and *Taiwan Semiconductor Manufacturing, Taiwan, China 809

15:00 (4) Analysis of Mechanisms for Hot-Carrier-Induced VLSI Circuit Degradation

Y. Huh, D. Yang, S. Kim and Y. Sung*, LG Semicon and *Korea Univ., Korea 812

B-7: Device Characterization (15:40-17:00)

15:40 (1) Large 1/f Noise in Polysilicon TFT Loads and Its Effects on the Stability of SRAM Cells

M. Aoki, T. Hashimoto, T. Yamanaka and T. Nagano, Hitachi, Japan 815

16:00 (2) A Novel Technique for Investigating Hot-Electron-Induced Oxide Damages and Device

Degradations in Submicron LDD n-MOSFET's

G.-H. Lee and S.S. Chung, Nat'I Chiao Tung Univ., Taiwan, China 818

16:20 (3) Lateral Carrier Profile Measurement under Quarter-Micron MOS Devices Using Chemical

Etch/AFM Method

H. Hasegawa, N. Kodama, J. Hayashi and S. Saito, NEC, Japan 821

16:40 (4) Statistical Performance-Instability Due to Three-Dimensional Nonuniformity of DopantAtoms in a System of Many MOSFETs

T. Mizuno, Toshiba, Japan 824

Room C

C-5: Others (9:20-10:40)

9:20 (1) Direct Observation of Working Vacuum Tunnel Junctions Using a Transmission Electron

MicroscopeM.I. Lutwyche and Y. Wada, Hitachi, Japan 827

xxxvi

9:40 (2) High-Efficiency Micromirrors and Branched Optical Waveguides on Si ChipsT. Namba, A. Uehara, T. Doi, T. Nagata, Y. Kuroda, S. Miyazaki, K. Shibahara,S. Yokoyama, A. Iwata and M. Hirose, Hiroshima Univ., Japan 830

10:00 (3) Contactless and Nondestructive Characterization of Silicon Surfaces by Capacitance-Voltage and Photoluminescence Methods

S. Koyanagi, M. Akazawa and H. Hasegawa, Hokkaido Univ., Japan 83310:20 (4) X-Ray Reflectometry and Infrared Analysis of Native Oxides on Si(100) Formed in

Chemical Treatment

Y. Sugita, N. Awaji, S. Ohkubo, S. Watanabe, S. Komiya and T. Ito, Fujitsu Labs.,Japan 836

11:00-12:30 Poster Preview

Symposium III: SOI Technology

(1) Thin-SOI Process Using Bonding and Etch-Back Method without Epitaxial GrowthH. Unno and K. Imai, NTT, Japan 839

(2) X-Ray Topographic Investigations on Bonded Silicon on Insulator (BESOI) Wafers

T. Abe, H. Takeno, K. Sawai* and T. Takama*, Shin-Etsu Handotai and *Hokkaido

Univ., Japan 842

(3) Advanced Quality in Epitaxial Layer Transfer by Bond and Etch-Back of Porous Si

N. Sato, K. Sakaguchi, K. Yamagata, Y. Fujiyama, J. Nakayama and T. Yonehara,

Canon, Japan 845

(4) Partially Bonded SOI Substrates for Intelligent Power ICs

H. Kikuchi and K. Arai, NEC, Japan 848

(5) SOI LIGBT Structure with the Collector-Short Region for Improved Latch-Up Perfor¬

mance

H. Sumida and A. Hirabayashi, Fuji Elec, Japan 851

(6) Comparison of Standard and Low-Dose SIMOX Substrates for 0.15/um SOI MOSFET

ApplicationsH.-O. Joachim, Y. Yamaguchi, T. Fujino, T. Kato, Y. Inoue and T. Hirao, Mitsubishi,

Japan 854

(7) Advantages of Ultra-Thin SIMOX/CMOS Based on Weil-Established O.Sfim Mass-Produc¬

tion Technologies for Low Power IV PLL Circuits

O. Tsuboi, S. Warashina, K. Sukegawa, S. Kawai, S. Kawamura, S. Sekine, K. Takada

and Y. Suzuki, Fujitsu, Japan 857

(8) Analysis of Si-Ge Source Structure in 0.15 ^m SOI MOSFETs Using Two-Dimensional

Device Simulation

O. Arisumi, K. Matsuzawa, N. Shigyo, M. Terauchi, A. Nishiyama and M. Yoshimi,

Toshiba, Japan 860

(9) Modeling on the Channel-To-S/D Capacitance and the Short Channel Effect for 0.1 //m

Fully Depleted SOI-MOSFETR. Koh, H. Kato and H. Matsumoto, NEC, Japan 863

(10) An Accurate Impact Ionization Current Model for LDD SOI MOSFETs

S. Pidin, N. Terao, T. Matsumoto, Y. Inoue* and M. Koyanagi, Tohoku Univ. and

Mitsubishi Elec, Japan 866

Advanced MOS Devices

(1) A 0.25//m CMOSFET Using Halo Implantation for 1Gb DRAM

D.J. Jung, J.K. Park, K.Y. Lee, N. Kang, K.N. Kim, T.E. Shim and J.W. Park, Sam¬

sung, Korea869

(2) Substrate Engineering for Reduction of a-Particle-Induced Charge Collection Efficiency

T. Yamashita, S. Komori, T. Kuroi, M. Inuishi and T. Hirao, Mitsubishi Elec, Japan.. .872

(3) A Comparative Study of Interface Trap Induced Drain Leakage Current in Various

n-MOSFET Structures

T. Wang, T.-E. Chang, L.P. Chiang and C. Huang+, Nat'I Chiao Tung Univ.and

Macronix Intern., Taiwan, China 875

xxxvn

(4) Reliability of Non-Uniformly Doped Channel (NUDC)MOSFETs for Sub-Quarter-Micron

RegionM. Shirahata, Y. Okumura, Y. Abe, T. Kuroi, M. Inuishi and T. Hirao, Mitsubishi Elec,

Japan 878

(5) An Experimental Study of Impact Ionization Phenomena in Sub-O.l/im Si MOSFETs

A. Hori, A. Hiroki, K.M. Akamatsu and S. Odanaka, MatsushitaElec. Ind., Japan 881

(6) Influence of N20-Oxynitridation on Interface Trap Generation in Surface-Channel

PMOSFETs

T. Matsuoka, S. Taguchi, K. Taniguchi, C. Hamaguchi, S. Kakimoto* and K. Uda*,

Osaka Univ. and Sharp, Japan 884

(7) Stress Effect on the Reliability of pMOS TFTs for 16 Mb SRAM: DC Stress at Room and

Elevated TemperaturesK.S. Son, H.K. Yoon, Y.J. Lee, S. Ahn and D.M. Kim#, Hyundai Elec Ind. and

*Pohang Univ. Sci. & Tech., Korea 887

(8) Development of Sub-Quarter-/im MONOS Type Memory Transistor

T. Bohm, A. Nakamura, H. Aozasa, M. Yamagishi and Y. Komatsu, Sony, Japan 890

Isolation

(1) A High Pressure High Temperature Poly Buffer LOCOS (HP-HTPBL) Isolation Process for

1Gbit Density Non Volatile Memories.

S. Deleonibus, F. Martin, S.S. Kim*, A. Emami*, B. Florin, M. Heitzmann and

C. Leroux, LETI and *GASONICS Intern., U.S.A., France 893

(2) A Novel Planarization of Trench Isolation Using a Polysilicon Layer As a Self-Aligned

Mask

J.-Y. Cheng, T.F. Lei, T.S. Chao and D.L.W. Yen*, Nat'I Chiao Tung Univ. and

*Macronix Intern., Taiwan, China 896

(3) Dry 02 High Pressure Field Oxidation for 0.25 jim Isolation Technology

V.K. Mathews, P.C. Fazan, N. Jeng, S.S. Kim* and A. Emami*, Micron Technol. and

*Gasonics Intern., U.S.A 899

Si Device Process

(1) New Crystallization Process of LPCVD a-Si Films below 530°C Using Metal Adsorption

Method

D.K. Sohn, J.N. Lee and B.T. Ahn, KAIST, Korea 902

(2) Combination of Chemical Mechanical Polishing and Ultrahigh Vacuum Chemical Vapor

Deposition Techniques to Fabricate Polycrystalline Thin Film Transistors

C.-Y. Chang, H.-Y. Lin, J.C. Hwu, J.-Y. Cheng, T.F. Lei, L.-P. Chen* and B.-T. Dai*,

Nat'I Chiao Tung Univ. and *Nat'l Nano Device Lab., Taiwan, China 905

(3) Preamorphization of the Channel Region of MOS Devices for Shallow Counter Doping

M. Miyake, Y. Okazaki and T. Kobayashi, NTT, Japan 908

(4) Diffusion and Segregation of Nitrogen in Polycrystalline Silicon and at the Poly-Si/Si02

Interface

S. Nakayama and T. Sakai, NTT, Japan 911

(5) Impact of a High Concentration Fluorine Layer on Carriers Transport at the Poly-Si/Si

Interface

T.P. Chen, T.F. Lei and C.Y. Chang, Nat'I Chiao Tung Univ., Taiwan, China 914

(6) Cyclotron Resonance Investigation of Multi-Quantum-Well Heterostructures Ge/Gei.xSixV.Y. Aleshkin, N.A. Bekin, I.V. Erofeeva, V.I. Gavrilenko, Z.F. Krasil'nik, O.A.

Kuznetsov, M.D. Moldavskaya, V.V. Nikonorov, L.V. Paramonov and V.M. Tsvetkov,

Russian Academy Sciences, Russia 917

(7) Identification of MOS Gate Dielectric-Breakdown Spot Using High-Selectivity EtchingR. Sugino, T. Nakanishi, K. Takasaki and T. Ito, Fujitsu Labs., Japan 920

C-6: Device Process and Amorphous Devices (13:50-16:50)

50 (1) Sequential Thermal CVD Process Using Fast Thermal Processor(FTP) (Invited)

K. Okumura and Y. Tsunashima, Toshiba, U.S.A 923

20 (2) Al-Selective CVD Induced by Hydrogen Desorption on Si

H. Sakaue, Y. Katsuta, S. Konagata, S. Shingubara and T. Takahagi, Hiroshima Univ.,

Japan 926

xxxviii

14:40 (3) Specialty Gas Interactions with Various Silicon SurfacesY. Shirai, M. Nakamura and T. Ohmi, Tohoku Univ., Japan 929

15:00 (4) Large Diameter Epitaxial Wafers for Future ULSI (Invited)J.H. Matlock, Shin-Etsu Handotai-America, U.S.A 932

15:50 (5) The Control of Sidelobe Intensity with Arrangement of the Chrome Pattern (COSAC) inHalf-Tone Phase-Shifting Mask

S. Kobayashi, N. Oka, K. Watanabe, M. Inoue and K. Sakiyama, Sharp, Japan 93516:10 (6) An Amorphous Avalanche Photo-Diode with a Large Conduction Band Edge Discontinuity

S. Sugawa, H. Kozuka, T. Atoji, H. Tokunaga, H. Shimizu and K. Ohmi, Canon, Japan... 93816:30 (7) Double Graded-Gap a-SiC:H P-I-N Thin-Film LED with Composition-Graded N-Layer and

Carbon-Increasing P-LayerY.-A. Chen, J.-K. Chen, W.-C. Tsay, J.-W. Hong and C.-Y. Chang*, Nat'I CentralUniv. and Nat'I Chiao Tung Univ., Taiwan, China 941

Room D

D-6: III-V FET's & Processing (9:20-11:30)

9:20 (1) InP HEMT:An Emerging Technology for Millimeterwave Applications (Invited)L.D. Nguyen, Hughes Res. Labs., U.S.A 944

9:50 (2) Single Voltage Supply High Efficiency InGaAs Pseudomorphic Double-Hetero HEMTs withPlatinum Buried Gates

T. Tanimoto, I. Ohbu, S. Tanaka, H. Matsumoto, A. Terano and T. Nakamura, Hitachi,Japan 947

10:10 (3) A Buried-Channel WNX/W Self-Aligned GaAs MESFET with High Power-Efficiency andLow Noise-Figure for Single-Chip Front-End MMIC in Personal Handy Phone SystemK. Nishihori, A. Kameyama, Y. Kitaura, Y. Ikeda, M. Nagaoka, Y. Tanabe, M. Mihara,M. Yoshimura, M. Hirose and N. Uchitomi, Toshiba, Japan 950

10:30 (4) Oxidation Using AFM and Subsequent Etching in Water of Inverted-Type 5-Doped HEMTM. Ishii and K. Matsumoto, ETL, Japan 953

10:50 (5) Electrical Properties of Ferroelectric Gate HEMT StructuresS. Ohmi, M. Yoshihara, T. Okamoto, E. Tokumitsu and H. Ishiwara, Tokyo Inst.

Technol., Japan 95611:10 (6) 0.86eV Platinum Schottky Barrier on Indium Phosphide by In-Situ Electrochemical Process

and Its Application to MESFETs

S. Uno, T. Hashizume, S. Kasai, N.-J. Wu and H. Hasegawa, Hokkaido Univ., Japan.. .959

11:50-12:35 Poster Preview

Symposium VI: Fabrication and Characterization of Quantum Nanostructures

(1) Fabrication of Quantum Wire and Minute Buried Heterostructure by In-Situ Etching andSelective MOCVD Growth

M. Ogura, X.L. Wang, H. Matsuhata, T. Tada, A. Hamoudi, S. Ikawa, T. Miyagawaand K. Takeyama, ETL, Japan 962

(2) Experimental Determination of the Conduction Width in Quasi Ballistic WiresY. Ochiai, K. Yamamoto, K. Ishibashi*, J.P. Bird*, Y. Aoyagi*, T. Sugano*,K. Tankei** and Y. Nagaoka***, Chiba Univ., *RIKEN, **Matsusaka Univ. and

***Kyoto Univ., Japan 965

(3) Nanometer-Sized Silicon Crystallites Prepared by Excimer Laser Ablation in Constant

Pressure Inert Gas Ambient

T. Yoshida, Y. Yamada, T. Orii* and S. Takeyama, Matsushita Res. Inst. Tokyo and

*Univ. Tsukuba, Japan 968

(4) Microstructure of Si Surface Epitaxially Grown in SiH4-H2 SystemY. Kunii and M. Nagase, NTT, Japan 971

(5) Enhancement of the Excitonic Effects in Semiconductor Thin Quantum Boxes with LargeLateral Size

H. Gotoh, H. Ando and H. Kanbe, NTT, Japan 974

(6) The Capacitance of Nano-Structures

T. Ohba and K. Natori, Univ. Tsukuba, Japan 977

xxxix

Optical Devices

(1) 380 fs Electrical Pulse Generationfrom 100 nm Insulator-Gap Photoconductive Switches

Fabricated by an Atomic Force Microscope

T. Itatani, K. Segawa, K. Matsumoto, M. Ishii, T. Nakagawa,Y. Sugiyama and K. Ohta,

ETL, Japan980

(2) Resonant-Tunneling Injection Hot Electron Laser: Recipefor Complementary Modulation

Using Dynamic Carrier HeatingV.I. Tolstikhin and M. Willander, Linkoping Univ., Sweden 983

(3) Influence of Bipolar Quantum Transport on GainCharacteristics of Strained-MQW Lasers

H. Tsuchiya, Y. Hayashi and T. Miyoshi, Kobe Univ., Japan 986

(4) A Novel Short Cavity Laser with Deep GratingDBRs

T. Baba, M. Hamasaki, N. Watanabe, A. Matsutani*,T. Mukaihara*, F. Koyama* and

K. Iga*, Yokohama Nat'I Univ. and *Tokyo Inst. Technol., Japan989

(5) Device Physics and Modeling of Multiple QuantumWell Infrared Photodetectors

M. Ershov, C. Hamaguchi* and V. Ryzhii, Univ. Aizu and *Osaka Univ., Japan 992

(6) Superior Detectivity of (111) GaAs/AlGaAs p-Type QWInfrared Photodetector

T. Cho, H. Kim, S. Hong and Y. Kwon, KAIST, Korea 995

(7) High Efficiency Monolithic GaAs/Si Tandem Solar Cell Grown by MetalorganicChemical

Vapor Deposition

T. Soga, M. Yang, T. Jimbo and M. Umeno, Nagoya Inst. Technol., Japan998

(8) Double-Function Light-Emitting-Diode ArrayM. Taninaka, M. Ogihara, T. Shimizu and Y. Nakamura, Oki Elec. Ind., Japan 1001

D-7: Characterization (13:50-15:20)

13:50 (1) Real-Time Optical Diagnostics of Epitaxially Grown Semiconductors (Invited)

D.E. Aspnes, North Carolina State Univ., U.S.A1004

14:20 (2) Photoellipsometry Characterization of In0.46Ga0.s4P/n+-GaAs Heterostructures

T. Saitoh, K. Watanabe, Y.-M. Xiong and F. Hyuga*, Tokyo Univ. Agri.Tech. and

*NTT, Japan1007

14:40 (3) In Situ Distinction of As-Rich Initial Surfaces by MillisecondTime-Resolved Reflectance

Difference

J. Cui, S. Zhang, A. Tanaka* and Y. Aoyagi, Riken and *Bentec, Japan1010

15:00 (4) Scanning Tunneling Microscope Study of (001) InP Surface Prepared by Gas Source

Molecular Beam Epitaxy

B.X. Yang, Y. Ishikawa, T. Ozeki and H. Hasegawa, Hokkaido Univ., Japan1013

D-8: Epitaxial Growth (15:40-17:20)

15:40 (1)

16:00 (2)

16:20 (3)

16:40 (4)

17:00 (5)

A Novel Material of GalnNAs for Long-Wavelength-Range Laser Diodes with Excellent

High-Temperature PerformanceM. Kondow, K. Uomi, A. Niwa, T. Kitatani, S. Watahiki and Y. Yazawa, Hitachi,

Japan. 1016

Simulation and Observation of the Step Bunching Process Grown on GaAs (001) Vicinal

Surface by Metalorganic Vapor Phase EpitaxyJ. Ishizaki, K. Ohkuri and T. Fukui, Hokkaido Univ., Japan 1019

Strain Relaxation Processes in GaAs on Si by Two Groups of Misfit Dislocations

M. Tamura, T. Saitoh and T. Yodo, OTL, Japan 1022

Impurity-Free Disordering of InGaAs/InGaAlAs/InP Quantum Wells by Dielectric Thin

Cap Films and Its In-Plane Spatial Resolution

S. Sudo, H. Onishi, Y. Nakano, Y. Shimogaki, K. Tada, M.J. Mondry* and

L.A. Coldren*, Univ. Tokyo and *Univ. California, U.S.A., Japan 1025

Controlled Disordering of Compressively Strained InGaAsP Multiple Quantum Wells underSiO:P Encapsulant and Application to Laser-Modulator IntegrationA. Hamoudi, E.V.K. Rao, P. Krauz, A. Ramdane, A. Ougazzaden, D. Robein and

H. Thibierge, France Telecom/CNET/PAB, France 1028

Room E

14:00-16:00 Poster Presentation , , , ,, , ,

'

xxxx