soi pixel detectors for clic - indico.cern.ch · thickness (300 500 m) and resistivity (2k; 700;...

SOI technology and detector overview Testbeam 2017 - measurement setup New detector design: CLIPS (CLIc Pixel Soi) Summary

SOI pixel detectors for CLIC

2017 testbeam results summaryand

CLIPS design overview

Szymon Bugiel

University of Science and Technology

August 28, 2018

CLICdp Workshop, 28.08.2018

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1 SOI technology and detector overview

2 Testbeam 2017 - measurement setup

3 New detector design: CLIPS (CLIc Pixel Soi)

4 Summary

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Silicon-On-Insulator Technology

Properties

Allows fabricating monolithic detectors

Insulator layer reduces parasiticcapacitances

Latch-up, SEU effects → significantlylimited

Small sensor capacitance (good SNR)

Double SOI → radiation hardness

Double Silicon-On-Insulator

voltage applied on Mid-Si layer allowsto correct the potential changescaused by positive charges induced byirradiation,

Mid-Si shields electronic fromnegative influence of high voltageneeded for full depletion.

SOI STRUCTURE DOUBLE SOI STRUCTURE

Lapis 200 nm Fully-Depleted Low-Leakage SOI CMOS with four wafer types: FZ(n),CZ(n), FZ(p) and Double SOI(p)

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Detector overview

Detector/chip general overview:

monolithic SOI CMOS technology used forthis detector

two types of matrices:source follower (SF)charge preamplifer (CPA) with twodifferent sensing diode (BPW) sizes

in total 16× 36 pixels per matrix

30µm× 30µm pixel size→ ∼ 0.52 mm2 matrix area,

rolling shutter readout (integration timefor one frame: ∼ 60µs or ∼ 130µs),

different wafer types (FZ(n),CZ(n),Double SOI) with different substratethickness (300 − 500µm) and resistivity(2 kΩ, 700 Ω, 8 kΩ) → FZN and DSOIanalysis are presented

SOURCEFOLLOWER

CHARGEPRE-AMPlarge sensor

8 x 36

8 x 18

CHARGEPRE-AMPsmall sensor

8 x 18

~ 11

4 um

gap

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Measurement and testbeam setup

CERN testbeam - summer 2017

SOI chips designed in Cracow were tested on CLICdp Timepix3 telescope in theSPS-H6 beamline in June and August beam tests using 120 GeV pion beam.Three FZN and three DSOI detectors were tested.

TELESCOPEDUT

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Analysis flow

Standard analysis flow:

Preliminary hit rejection

Pedestal and noise calculation

Clusterization using different methods

Eta correction on SOI hits

Correlation of SOI hits and telescopetracks

Alignment

Efficiency estimation

Spatial resolution calculation

Last updates in the analysis flow:

Clusters that are affected by the resetof the frame are discarded from theanalysis

Row’s time (instead of whole frame)is used in correlation between SOI hitand telescope track

150− 100− 50− 0 50 100 1500

5

10

15

20

25

30

35

0

1

2

3

4

5

6

7

ToA - frameSOI [us]

row

nb

The position in Y for clusters of low energy vs (ToA_track - SOIframe_time)

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Full depletion and Signal to Noise Ratio

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FZ(n) full depletion around70 V

For Double SOI (DSOI)high leakage current didnot allow to reach fulldepletion (maximaldepletion around 130µm)

The pixel noise for SF is around 110 e−

and for CPA 130 e−.

Signal to noise ratio at full depletion isabove 350 for SF and 250 for CPA.

At low back bias voltage SNR for CPA isstill above 100.

CPA smallCPA largeSF


Efficiency

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CPA_small

65707580859095

100

10 20 30 40 50 60 70

effici

ency

back bias voltage [V]

FZN DSOI

65707580859095

100

0 20 40 60 80 100 120 140

effici

ency


SFCPA_small

SF

3.3 3.4 3.5 3.6 3.7 3.8

1.4

1.6

1.8

2

2.2

2.4

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1Efficiency map: FZN1, 130V

X [m

m]

Y [mm]

%Mean efficiency FZN:

eCPAs = 97.98%

eSF = 96.80%

Mean efficiency DSOI:

eCPAs = 97.52%

eSF = 95.82%

EFFICIENCY VS BACK BIAS


Spatial resolution: FZN

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2

2.5

3

3.5

4

4.5

5

0 20 40 60 80 100 120 140

reso

lutio

n Y

[um

]


TSM102 CROS10

2

2.5

3

3.5

4

4.5

5

0 20 40 60 80 100 120 140

reso

lutio

n Y

[um

]


TSM102 CROS10

2

2.5

3

3.5

4

4.5

5

0 20 40 60 80 100 120 140

reso

lutio

n Y

[um

]


TSM102 CROS10

CPA_small CPA_large

SF

Results are shown for two differentclusterization methods (Two-theresholdand Cross (5 pixel) ) after telescoperesolution subtraction

The spatial resolution for CPA with smallsensing diode and SF is for almost all backbias range above 3 µm

SF matrix shows the best performanceachieving less than 2.5 µm above fulldepletion


Spatial resolution: DSOI

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In progress...

In progress...

In progress...3

4

5

6

7

8

10 20 30 40 50 60 70

reso

lutio

n Y

[um

]


TSM102 CROS10

3

4

5

6

7

8

10 20 30 40 50 60 70

reso

lutio

n Y

[um

]


TSM102 CROS10

CPA_large3

4

5

6

7

8

10 20 30 40 50 60 70

reso

lutio

n Y

[um

]


TSM102 CROS10

SF

CPA_small

resolution in Y with Two-Thereshold (red)and Cross (yellow) clusterization for DSOIdetector

Double SOI analysis is in progress(row-time correlation, reset-clustersrejection...)

CPA with small sensing diode shows thebest performance - spatial resolution below5µm


CLIPS (CLIc Pixel Soi): general overview

Goal

CLIPS is designed to fulfil CLIC Vertex requirements

this time we have larger chip area:4.4 × 4.4 mm (previous 2.9 mm)

three matrices with slightly differentpixel and separate readout designed

1 M1 - matrix without n-stops betweenpixels

2 M2 - n-stops included3 M3 - like M2, but feedback

capacitance

each matrix is 64 × 64 pixels

test pixels available

4.4 mm

4.4

mm

64x64M1

64x64M2

64x64M3

test pix

slow cntrl

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CLIPS (CLIc Pixel Soi): pixel overview

monolithic pixel detector

pixel pitch 20 µm × 20 mum

both analogue charge and time information

300 µm wafer but most probably will be thinned up to 100 µm

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CLIPS (CLIc Pixel Soi): current status

New PDD structure

The Japanse KEK center propose a newstructure that is fabricated on single SOI,but fulfils all advantages provided byDSOI. In September the re-design of theCLIPS will be made in Japan. Fabricationdate not known yet.

BPW BNW1

BP6 BNW2

BN5

BN6

p substrate

BOX (SiO2)

silicon (with electronics)

sensi

ng

nod

ese

nsi

ng

nod

e

different dopping layers

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Detectors:

CLIPS was designed in the end of 2017

detectors on FZN wafer are ready

Lapis Co. failed with DSOI wafer...

Readout:

Readout for CLIPS not ready yet (manpower issues...)


Summary

2017 testbeam analysis:

SOI chips were tested on CLICdp Timepix3 telescope in the SPS-H6 beamline inJune and August 2017 beam tests using 120 GeV pion beam.

The analyses of FZN wafers are already finished, giving ∼ 98% efficiency and∼ 2.5 µm of spatial resolution for 30 µm2 pixel size for all matrix types (chargepreams and source-followers).

DSOI is currently being studied, but first results show the same efficiency ∼ 98%and the spatial resolution about ∼ 4.0 µm for the best case (charge preamplifierwith small sensing diode).

CLIPS status:

CLIPS (CLIc Pixel Soi) detector was designed (12.2017) and fabricated (06.2018)by Japanese Lapis SOI Co.

CLIPS is design to fulfil CLIC vertex detector timing and spatial resolutionspecification.

Currently only FZN detectors are ready. Because of problems in DSOI wafer,CLIPS will be re-designed into PDD structure.

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Spatial resolution: example distribution of Y residuum

hYRes_Eta[2]Entries 8037Mean 0.0001127

Std Dev 0.006073 / ndf 2χ 446.2 / 24

Constant 15.9± 933.6 Mean 05− 3.646e±06 − 3.086eSigma 0.000038± 0.003104

0.06− 0.04− 0.02− 0 0.02 0.04 0.06 T_Y - SOI_Y [mm]

0

200

400

600

800

1000 ent

ries

hYRes_EtaEntries 8037Mean 0.0001127

Std Dev 0.006073 / ndf 2χ 446.2 / 24

Constant 15.9± 933.6 Mean 05− 3.646e±06 − 3.086eSigma 0.000038± 0.003104

residuum in Y for FZN, 130V of back bias, SF matrix

clusterization methods: cross-shape cluster (5 pixel) with seed 10

here a Gaussian fit is made for 95.5% of whole statistic

after taking into account telescope resolution (2 µm at DUT point), the SOIdetector resolution is 2.38 µm

in X direction we have a cross-talk issue caused by unsymmetrical layout(resolution is about 1 µm worse than in Y)

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soi pixel detectors for clic - indico.cern.ch · thickness (300 500 m) and resistivity (2k; 700;...

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