software defined silicon
DESCRIPTION
Software Defined Silicon. 晶片功能的軟體化. Presented By. 謝啟東五子五 (1979) MSCS , Vanderbilt (1985) 副總,銳力科技 黃模淼五子五 (1979) MSEE ,交大光電 副總,銳力科技. Agenda. Overview30 min Software Defined Silicon50 min Break 5 min Demo20 min Q & A10 min. Overview. - PowerPoint PPT PresentationTRANSCRIPT
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Software Defined SiliconSoftware Defined Silicon
晶片功能的軟體化
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Presented ByPresented By
謝啟東謝啟東 五子五 五子五 (1979)(1979)MSCSMSCS ,, Vanderbilt (1985)Vanderbilt (1985)副總,銳力科技副總,銳力科技
黃模淼黃模淼 五子五 五子五 (1979)(1979)MSEEMSEE ,交大光電,交大光電副總,銳力科技副總,銳力科技
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OverviewOverview 30 min30 min Software Defined SiliconSoftware Defined Silicon 50 min50 min BreakBreak 5 min 5 min DemoDemo 20 min20 min Q & AQ & A 10 min10 min
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OverviewOverview
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Buy a ProductBuy a Product
CheaperCheaper
Easy to Use (User-Friendly)Easy to Use (User-Friendly)
BestBest
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Product Development Steps
Product Spec / Features
System Spec
Hardware Spec Mechanical Spec Software Spec
Development DevelopmentDevelopment
System Integration
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Product Product Spec / FunctionsSpec / Functions
Time Time CostCostPricePrice
Time to the MarketTime to the Market BOM CostBOM Cost
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積體電路的變革Tube
Transistor
SSI
MSI
LSI
VLSI ASIC
Programmable IC ASSP
Shorter Development Time & Cheaper BOM Shorter Development Time & Cheaper BOM
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Volume MarketVolume Market Niche MarketNiche Market
Product MarketProduct Market
Big VolumeCompetitive & Bloody
Small VolumeLess Competitive
ASICASSP
Standard Solution
Glue LogicProgrammable DevicesNon-Standard Solutions
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To Design a Product ?To Design a Product ?
Glue LogicGlue LogicASIC / ASSPASIC / ASSPProgrammable ICsProgrammable ICsModules Modules Solution Boards…Solution Boards…
By HardwareBy HardwareBy SoftwareBy Software
Time to the Market BOM Cost
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ASIC / ASSPASIC / ASSP FPGA / CPLDFPGA / CPLD
CheaperEasier
Specific
ExpensiveComplicate
Flexible
By HardwareBy Hardware By Software By Software
ExpensiveBetter Performance
CheaperPerformance?
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ASIC / ASSP
Application Specific IC
Designed to Perform the Specific Function Designed to Perform the Specific Function
VGA ChipsVGA Chips Keyboard ControllerKeyboard Controller Mouse ICMouse IC
Wi-Fi ChipsWi-Fi ChipsDVD ChipsDVD Chips 3G Chips3G Chips
Its Specific Function Its Specific Function cannot cannot be Changed or Programmedbe Changed or Programmed
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Programmable ICsProgrammable ICs
PAL / GALPAL / GAL Programmable Array LogicProgrammable Array LogicGate-BasedGate-Based
xROMxROM x Read-Only Memoryx Read-Only MemoryHard-WiredHard-Wired
CPLD CPLD Complex Programmable Logic DeviceComplex Programmable Logic Device
FPGA FPGA Field-Programmable Gate ArrayField-Programmable Gate ArrayFunctional BlockFunctional Block
uCuC Micro-ControllerMicro-ControllerCPU-BasedCPU-Based
Programmed for Functions : FlexibleProgrammed for Functions : Flexible
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Programming a DeviceProgramming a Devicefor a Functionfor a Function
PAL / GALPAL / GAL Boolean Equation by PAL Programmer
ROMROM Programmer
CPLDCPLD JTAG Port (Joint Test Action Group)Proprietary In-Circuit Programmer
FPGA FPGA JTAG Port by Proprietary In-CircuitProgrammer + Proprietary Languages
uCuC Programmer + Languages
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Example : KeyboardExample : Keyboard
What Kind of Keyboard?
Notebook PCKeyboard
Key Pad Few Keys Only
ASIC Keyboard IC
uC + GPIO Glue Logic
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Medical Lab
Auto Feeding System&
Monitoring System
Non-Standard Product
Special Design
uC + Glue Logic
Manufacture
Product’s Testing Tool
Non-Standard Tool
Special design
PC + Glue Logic +IO Controller Cards
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Any SiliconAny Silicon
Which Its Function Can BeWhich Its Function Can Be
Easily and Flexibly Easily and Flexibly
Defined byDefined by
CPU-Based CPU-Based
High-Level Languages High-Level Languages
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Software Defined SiliconSoftware Defined Silicon
Programmed by High-Level LanguageProgrammed by High-Level Language
Flexibly Define a SiliconFlexibly Define a Silicon’’s Functions Function
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SSoftware oftware
DDefined efined
SSiliconilicon
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What’s SDS?What’s SDS?
Processor
Processor
Processor
Program Code
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Why SDS?Why SDS?
Fast tune-cycles and market change“Scale” grows up exponentially
“Loading” & “risk” rises up
The Fact…
Processor…
Powerful
ReliableEconomic
How do you differentiate ?
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What SDS should be?What SDS should be?
Direct & programmable I/O access
Programmable timing control
Independent & wide processing path
Inter-connection channel
Highly responsive processing
Reliable & convenient development tool
Is It Possible ??Is It Possible ??
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Yes, Here is an example…Yes, Here is an example…
400MHz RISC Processor
8 threads per core
64K SRAM8K OTP
Up to 64 I/O pins
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The advanced I/OThe advanced I/OTimed Output
Time-Stamped Input
PredicatedInput
Clocked Port with Data ready
Dedicated serialisationhardware
I/O Ports are tightly coupled to the core
Dedicated instructions for I/O port assignment
Has the concept of timing and may be synchronized to an internal reference clock or an external input clock
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For “Timing”For “Timing”
In each core, Ten 100MHz timer public resource are available for any thread. (10 ns resolution)
“Timer” may link up with any event on I/O port and inter-communication channel.
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Flexible “Processing Path”“Processing Path”
Eight independent threads in one core
Dedicated instruction for thread job assignment
Proprietary compiler to ensure 50 ~ 100 MIPS on each thread
Xlink switch are available for each thread to enable threads be parallel and/or serial chained processing
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Highly Responsive
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Xlink Switch for inter-connectionXlink Switch for inter-connection
Use “chan” to connect two “chanend”
“chanend” threads may be on same core, different core or different chip.
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Accessible both online or on your desktopmachine using downloadable tools
Software design and debug flow is similar to other embedded tool chains – Focus on C/C++
Adds language support to simplify tasksrelating to concurrency and real-time control – XC
Complete set of tools from design capture toadvanced debugging
A lot of design template are available for reference
Design FlowDesign Flow
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Communication
XC looks and feels like C
Support for :
I/O with timing
Event
What’s XCWhat’s XC
Multiple threads and cores
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System job partition
Using threads as building blocks
The new concept for engineersThe new concept for engineers
Thread may be “Software task”, “Timing I/O”, “Data processing”, “State machine”
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Example: Partitioning a UART
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SDS usage Scenarios
Intelligent Bridge
I/O expansion or companion chip
SDS based ASSP
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A workable example -- Real-time Audio Filter with Ethernet AV input
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DemoDemo
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Designing with SDS - 1
Toggle an LED and write a UART transmit function in XC:
Focus on:• ports
• timers
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Designing with SDS – 1 (Cont.)
Step1 : Define BAUD_RATE & BIT_TIME
Step2 : Declare output ports for LED & TxD
Step3 : Use one Timer in main() routine to flash LED& send message to UART Txd port periodically
Step4 : Use another Timer resource on transmit() routine to control bit timing on UART port
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Demo System
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Summary :
SDS is possible indeed.
Using threads as building blocks of system
Pending issue
Is it possible to achieve Gbit/sec?How compiler work ?
Other ?
Competitive ?
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Q & AQ & A
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Thanks YouThanks You