soc test strategies
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SoC Test Strategies. 陳亮宙 R91943049 林學世 R91943073 王偉民 R91943085 92.06.10. Basic Concepts (1/2). __number of detect faults__. ‧Fault Coverage =. number of total faults. ‧Single Stuck-at Fault. - PowerPoint PPT PresentationTRANSCRIPT
SoC Test Strategies陳亮宙 R91943049
林學世 R91943073
王偉民 R91943085
92.06.10
Basic Concepts (1/2)
‧Fault Coverage =
‧Single Stuck-at Fault
‧Test Pattern
‧Automatic Test Pattern Generation (ATPG)
__number of detect faults__number of total faults
One signal line in Boolean network of elementary gates is fixed to logic 0 or 1, independent of logic values on other signal lines
Input Boolean values for specific faults
Generate test patterns for a netlist based on a given fault model
Basic Concepts (2/2)
‧ScanStitch memory elements into shift registers.
Cost of Manufacture & Testing
SoC Test Challenges
‧Fault coverage not enough
‧Delay and bridging defects more dominant
‧Single stuck-at fault model not enough
‧Hidden cores not easily accessible
Digital Logic BIST and Circuit Under Test
Pattern Generator
‧ROM
‧Algorithm
‧Exhaustive or Pseudo Exhaustive
‧Pseudo Random-Linear Feedback Shift Register (LFSR)
Random Pattern Generator
Response Analyzer
Example of Response Analyzer
Disadvantage of LFSR
‧Aliasing
‧Expensive
‧Fault coverage not enough
‧high density
‧a lot of I/O pins
‧regular
Why MBIST
Memory BIST
Different Designs
‧black box ‧pass through
‧bypass-only
‧bypass ‧scan wrapper
‧universal test interface (UTI)
Compare
MBIST Automation Tool
Analog and Mixed-Signal Test
‧Reconfiguration
‧Insert test point
‧Insert DAC or ADC
IEEE 1500
Test Access Mechanism (TAM)
Distributed type
Muxed type
Daisy Chain
SoC Test Schedule
Conclusions
‧Testing important for SoC
‧BIST is necessary
Reference
‧ 張永嘉 ,“SoC Test Strategies”,2002
‧ 張永嘉 ,“Digital Logic BIST”,2002
‧ 張永嘉 ,“Design Automation of Memory BIST”,2002
‧M.L. Bushnell and V.D. Agrawal,“Essentials of electronic testing,” Kluwer Academic Publishers, 2000.
‧Koranne, S. ; Iyengar, V., “On the Use of k-tuples for SoC Test Schedule Representation”. Proc. IEEE Intl. Test Conf. (ITC), pp. 539 –548 , 2002.