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    SJSU EE223 by Koorosh Aflatooni 1

    Single Transistor and MultipleTransistor Amplifiers

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    SJSU EE223 by Koorosh Aflatooni 2

    Overview Introduction

    Modeling

    Single Transistor amplifiers

    Common emitter/source

    Common base/gate

    Common collector/drain

    Common emitter/source with degeneration

    Multiple transistor amplifiers

    Common collector-common emitter

    Common collector-common collector

    Cascode

    Simple cascode

    Active cascode

    Differential pairs

    DC transfer of common emitter/source pairs

    DC transfer of common emitter/source pairs with degeneration

    Small signal characteristics

    Device mismatch

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    SJSU EE223 by Koorosh Aflatooni 3

    Modeling

    Two port

    network

    i1

    v1

    i2

    v2 Two port modeling

    Express the relation

    between input and output

    Superposition of the each

    source contribution2221212

    2121111

    vyvyi

    vyvyi

    +=

    +=

    y11

    y12v2

    y21v1

    y22

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    Modeling (cont.)

    Feedback

    Bilateral

    Unilateral => y12=0 Other terms

    Short-circuit transonductance => Gm=y21 Input impedance => Zi=1/y11

    Output impedance => Zo=1/y22 Knowing any two parameters leads to

    the third parameter

    The key is to understand the effect ofloading on performance

    Zi Gmv1

    Zo

    i1

    v1

    i2

    v2

    +

    _Zi avv1

    Zo

    i1

    v1

    i2

    v2omiv ZGvva == =0

    1

    2

    2

    Norton

    to

    Thevenin

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    Common Emitter Large signal

    Collector current is relatedto base current

    Output voltage is defined byconsidering load line

    Small Signal

    Input resistance

    Transconductance

    Output resistance

    Open circuit voltage gain

    ==

    T

    i

    F

    S

    B

    CB

    V

    VI

    I

    II exp

    =

    T

    iSCCCo

    VVIRVV exp

    m

    oi

    grR

    ==

    mm gG =

    oCo rRR ||=

    ( )Comv Rrga ||=

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    Common Source Large signal

    Output voltage related toinput

    Transition from cutoff =>active => triode

    Small signal

    Input resistance

    Transconductance

    Output resistance

    Open circuit voltage gain

    The maximum voltage gainfor CS is proportional to1/ID, in contrast to BJT thatis independent of current

    ( )22

    tiDox

    DDo VVRL

    WCVV =

    iR

    mm gG =

    oDo rRR ||=

    ( )Domv Rrga ||=

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    Common Base Small signal

    Modifying -model to T model todecouple the dependent currentsource between input-output ports

    Input resistance

    Transconductance

    Output resistance

    Open circuit voltage gain

    Compare to common emitter, the inputresistance is reduced by (1+b) as wellthe the current gain

    ei rR =

    r

    r

    gG

    b

    mm

    +=

    1

    Co RR =

    Cmv Rga =

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    Common Gate Large signal

    Not much interesting

    Small signal Input resistance

    Transconductance

    Output resistance

    Open circuit voltage gain

    mbm

    igg

    R+

    =1

    mbmm ggG +=

    Do RR =

    ( )Dmbmv

    Rgga +=

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    Common Gate (cont.)

    Considering a case with ro =>

    bilateral because of feedbackprovided by output => inputresistance depends on outputload

    Small signal Input resistance

    Transconductance Ro has no effect since this is

    measured with output shorted

    Output resistance

    ombm

    LDoi

    rgg

    RRrR

    )(1

    ||

    +++

    =

    ( )( )Sombmo RrggRR += ||

    mbmm ggG +=

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    Common Collector

    Emitter follower

    Ideally base-emitter voltage remains

    constant, independent of collector voltage In reality it is not quite constant

    It is not unilateral

    Small signal ( model)

    Input resistance

    Voltage gain

    Output resistance

    ( )( )oLoi rRrR ||1++=

    o

    o

    So rRrR ||

    1++=

    ( )( )oLoS

    v

    rR

    rRa

    ||11

    1

    ++

    +=

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    SJSU EE223 by Koorosh Aflatooni 11

    Example

    Calculate the input resistance, output resistance,

    and voltage gain of the emitter follower. AssumeRS=RL=1k, =100, rb=0, ro =>, Io=100A.

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    Common Drain

    Source follower

    Ideally, source follows gatevoltage

    In reality, it deviates due tobody effect and channelmodulation effect

    Small signal

    Input resistance

    Voltage gain

    Depends on body effect

    Output resistance

    =iR

    ( )L

    oombm

    omv

    R

    rrgg

    rga

    +++=

    1

    Lo

    mbm

    o

    Rrgg

    R11

    1

    +++

    =

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    Common Emitter with Emitter

    Degeneration Adding the resistance to

    emitter: Reduces the

    transconductance, andincreases output/inputresistances

    Small signal

    Input resistance

    Transconductance

    Output resistance

    ( )

    +++

    +++=

    ECo

    o

    Co

    EoiRRr

    Rr

    RrR1

    1

    +++

    =

    omo

    Em

    oo

    E

    mm

    rgRg

    rR

    gG11

    11

    1

    ( ) ( )[ ]EmoEo RrgrRrR ||1|| ++=

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    Common Source with Source

    Degeneration

    Small signal

    Input resistance

    Transconductance

    Output resistance

    =iR

    ( ) Smbmm

    mRgg

    gG

    ++=

    1

    ( )[ ]SmbmoSo RggrRR +++= 1

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    Single Transistor Summary

    Moderate to

    high

    LowAi ~ 1Av > 1Common-Base

    LowHighAi > 1Av > 1Emitter-Follower

    Moderate to

    high

    ModerateAi > 1Av > 1Common-Emitter

    Moderate to

    high

    LowAi ~ 1Av > 1Common-Gate

    Low-Av ~ 1Source-Follower

    Moderate to

    high

    -Av > 1Common Source

    Output

    resistance

    Input

    resistance

    Current gainVoltage gainConfiguration

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    Multiple Transistor Amplifiers In many applications performance of a single stage amplifier is not

    sufficient to meet various requirements

    Need to combine multiple transistors to achieve voltage, current,input/output impedance adjustments

    In general, the overall voltage/current gain is not simply the product ofall the stages, but it is a function of loading (input/output resistance) ofeach stage => need specific analysis

    Some popular combinations Common collector- common emitter & Common collector- common

    collector

    Cascode

    Super source follower

    Differential pair

    Stage 1Av1

    Stage 2Av2

    Stage nAvn

    Ri1Ro1 RinRi2

    RonRo2

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    Common Collector- Common

    Emitter Goal:

    To achieve higher input resistance and gain

    Operation principle: Ibias provides the DC biasing

    Q2 appears as load on emitter of Q1 => inputresistance increases; also gives two stages ofcurrent gain

    Consider a combined transistor Small circuit analysis

    Input resistance

    Transconductance

    Current gain

    Output resistance

    ( )( )ooi rrrR ||1 21 ++=

    ++

    =

    2

    1

    2

    )1(1

    1

    r

    rgG

    o

    mm

    ( )1+= ooc

    2oo rR =

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    Darlington Configuration

    Similar to:

    cc-cc: as discussed cc-ce: but in Darlington

    collector of Q1 givesfeedback path=>

    reduction of outputresistance & increase ofinput capacitance

    BiCMOS version finds

    many applications High input resistance

    Large transconductance

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    Cascode Configuration

    Bipolar version

    Common emitter- common base

    Small circuit analysis Input resistance

    Transconductance

    Voltage gain

    Output resistance

    1rRi =

    1mm gG =

    ovA =

    +

    +=

    o

    om

    omoo rg

    rgrR

    12

    122

    1

    1

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    Cascode Configuration (cont.)

    MOSFET version:

    Common source- common gate

    Output resistance can be tuned

    => limited by power supply

    voltage and signal swing

    Small circuit analysis Input resistance

    Transconductance

    Output resistance

    iR

    1mm gG

    ( ) 2122 oombmo rrggR +=

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    Cascode Configuration (cont.)

    Active cascode

    Using an amplifier to toprovide negative feedback and

    increases the output

    resistance

    Only works at frequencies

    amplifier has gain

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    Super Source Follower

    Goal:

    Reduce output resistance ofsource follower => useful if you

    need to drive a resistive load

    Small signal Output resistance

    ( ) 1211

    11

    ommbm

    orggg

    R+

    =

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    SJSU EE223 by Koorosh Aflatooni 23

    Differential Pair

    Goal: to eliminate the common sources (e.g.,

    noise sources) and amplify differential inputsignal

    Analysis

    Large signalBipolar: Linear region 26mV around zero

    MOSFET:

    Small signal

    ff

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    BJT Differential Pair

    Large Signal Analysis Assuming

    Rtrail very large and ro can be ignored

    Steps:

    Write KCL for input signals to emitter of transistors

    Relate Ic1 and Ic2 to Itrail

    Relate output voltages to input voltages Highlights

    Useful range ~ Linear range ~

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    MOSFET Differential Pair

    Large Signal Analysis Assuming

    Rtrail very large and ro can be ignored

    Steps: Write KCL for input signals to emitter of

    transistors

    Relate Id1 and Id2 to Itrail

    Relate output voltages to input voltages Highlights

    Useful range ~ Linear range

    Voltage gain

    How to increase the useful range? W/L

    Over-drive

    1

    2

    L

    Wk

    ITrail

    '

    2

    DTrailRIk'

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    Example

    Compare the forward transconductance of a

    MOSFET differential gain against a bipolardifferential gain? (assume ITrail=500A andk=100A/V2, W/L=1,F=1)

    21

    )/('4

    4'

    2id

    Trailid

    Traild V

    LWkIV

    LWkII +=

    L

    WIk

    V

    Ig TrailV

    id

    dm id 4

    '|(max)

    0

    1 =

    ==

    +

    =

    T

    i

    TrailF

    c

    V

    v

    I

    I1

    1

    exp1

    T

    TrailFV

    i

    cm

    V

    I

    V

    Ig

    i 2|(max)

    01

    1

    1 =

    ==

    VAgm /35(max) = VAgm/9766(max) =

    MOSFETBJT

    Diff ti l P i

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    Differential Pair

    Small Signal Analysis

    Vid/2

    -Vid/2

    -Vic

    Breaking analysis to:

    Differential mode

    Common mode

    Ideally we like Adm-cm=0

    and Acm-dm=0, in realitythey are not

    Common mode rejection

    ratios (CMRR)

    Other important ratios

    iccmidcmdmoc

    icdmcmiddmod

    vAvAv

    vAvAv

    +=+=

    cm

    dm

    A

    ACMRR =

    dmcm

    dm

    A

    A

    cmdm

    dm

    A

    A

    Diff ti l P i

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    SJSU EE223 by Koorosh Aflatooni 28

    Differential Pair

    Small Signal Analysis (cont.)21

    In a balanced differential

    pair, increase if current inpath 1, means current inpath 2 decreases by sameamount

    Voltage across Rtrail stay

    constantDropping Rtrail makes no

    difference

    Voltage gain

    The gmb has no effect sincesource to ground stays at aconstant potential

    ( )omdm rRgA =

    Diff ti l P i

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    Differential Pair

    Small Signal Analysis (cont.) Due to symmetry, we could

    assume no current flowsbetween two sections Breaking the circuit into two

    sections

    Each of these sections present

    a degenerate source followerconfiguration

    Common mode gain

    In case ro>0

    Note: increase of Rtrail leads to

    increase of CMRR

    1 2

    ( )Smbm

    mm

    Rgg

    gG

    ++=

    1

    Degenerate Source

    follower

    ( ) TrailmbmDm

    DmcmRgg

    RgRGA

    21 ++

    ==

    ( )( )[ ]{ }TrailmbmoTrailD

    Trailmbm

    mDmcm RggrRR

    Rgg

    gRGA 212

    21+++

    ++

    ==

    ( ) Trailmbm RggCMRR ++ 21

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    SJSU EE223 by Koorosh Aflatooni 30

    Example

    Find the differential-mode gain, common-mode gain,

    and differential-mode input resistance for a bipolar

    differential pair? (assume ITrail=20A, RTrail=10M,RC=100k, VEE=VCC=5V, =150, and neglect rb, ro,and r.

    7810020

    =

    == K

    V

    ARgA

    T

    Cmdm

    005.01

    11

    =

    ++

    = C

    o

    Trailm

    mcm R

    Rg

    gA

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    SJSU EE223 by Koorosh Aflatooni 31

    Summary

    Review of various single and two state

    amplifiers, including differential pairs

    End of chapter problems: 3-2, 3-4, 3-7, 3-9,3-14, 3-16, 3-24