simulations with the boost topology … 1 of 24 simulations with the boost topology ee562: power...

24
Page 1 of 24 SIMULATIONS WITH THE BOOST TOPOLOGY EE562: POWER ELECTRONICS I COLORADO STATE UNIVERSITY Modified February 2006

Upload: phamnhan

Post on 12-Mar-2018

229 views

Category:

Documents


1 download

TRANSCRIPT

Page 1 of 24

SIMULATIONS WITH THE BOOST TOPOLOGY

EE562: POWER ELECTRONICS I

COLORADO STATE UNIVERSITY

Modified February 2006

Page 2 of 24

PURPOSE: The purpose of this lab is to simulate the Boost converter using ORCAD

to better familiarize the student with some of its operating characteristics. This lab will

explore some of the following aspects of the boost converter:

Discontinuous Conduction Mode

Inductor sizing

Differential voltage across the inductor

Time it takes for the converter to reach steady state

Output Ripple voltage and selection of the capacitor.

Ripple current through the capacitor

Equivalent Series Resistance (ESR) of the output capacitor.

Effects of changing and removing load resistance

Effects of the ON resistance of the switch

Efficiency

Effects of changing frequency

NOTE: The simulations that follow are intended to be completed with ORCAD Capture

CIS. It is assumed that the student has a fundamental understanding of the operation of

ORCAD. ORCAD provides tutorials for users that are not experienced with its

functions.

PROCEDURE: Build the schematic shown in Figure 1.

V1 is a DC voltage source (VDC) from the source library. It needs to be set for 24 volts.

L1 is an ideal inductor from the Analog Library.

Set for 10µH.

R1 is an ideal resistor from the Analog Library.

Set for 1kΩ.

D1 is an ideal diode (Dbreak) and can be found in the Breakout library.

C1 is an ideal capacitor from the Analog library.

Change the value to 100µ F.

Page 3 of 24

S2 is a voltage controlled switch and can be found in the Analog library.

Change RON from 1Ω to 1mΩ.

V2 is a pulsed voltage source and is intended to act as the output of a pulse width

modulator. V2 needs the following parameters set:

DC=0, AC = 10, V1=0, V2= 10, TR=10ns, TF=10ns, PW = 20µ, PER = 40µ.

This results in a switching frequency of 25 kHz.

R2 Set to 1000 kΩ. The purpose of R1 is to prevent any floating nodes.

Two voltage markers need to be placed as shown in the schematic of figure 1.

Figure 1

Boost schematic ORCAD.

Once the above schematic is built simulations can be ran. First, the type of simulation

will need to be specified. Most of these simulations are Transient simulations. The

Transient simulation can be set by selecting PSpice on the menu then New Simulation

Profile. The Run Time will need to be set to 1000µsec.

Page 4 of 24

Figure 2

Transient Analysis setup. Running the simulation will result in the following output.

Figure 3

Page 5 of 24

Remove the voltage markers, and use a current marker to measure the inductor L1

current. Place the marker in series next to L1.

Figure 4

QUESTION 1: What is the peak operating current, and what is the operating mode of

the converter? Verify mathematically the mode and the peak current.

Hint:RTs

L2K = , 2)D1(DKcrit −= ,

DTs

Ipk

L

Vin =

Figure 5

Page 6 of 24

QUESTION 2: What is the output voltage of the converter at steady state? Verify your

results mathematically.

Hint: 2

K

1D411

Vin

Vout

2⋅++=

Figure 6

Page 7 of 24

Now change L1 from 10µH to 1mH and rerun the simulation. Remember you can vary

the “Final Time” in “Transient Analysis”. Keep the “Print Step” at 0. (Hint: Start this

analysis with a “Final Time” = 1msec)

QUESTION 3: What is the peak operating current now? What is the operating mode of

the converter (remember that you can observe this by zooming in)? Also, verify the

mode mathematically.

Figure 7

Page 8 of 24

QUESTION 4: How long does it take for the converter to reach steady state? What is

the peak inductor current during steady state? Verify peak current result mathematically.

Hint: DTs

Ipk

L

Vin =

Figure 8

QUESTION 5: Calculate the size of the inductor required to put this converter in CCM.

Hint: 2

)D1(DTsRL

2−⋅⋅≥

Page 9 of 24

Remove the current marker and add a differential voltage marker across L1. Change

the Run to time to 1800u and Start saving data after 1500u.

Figure 9

QUESTION 6: What can be said about the differential voltage measurement across L1?

Figure 10

Page 10 of 24

Now change the “Final Time” to 2500µ and remove any “No Print Delay” from the

Transient Analysis setup. Remove the differential voltage markers across L1 and add a

voltage marker to the top of C1. From this simulation we can see the output voltage stair

step up to its final value.

Figure 11

QUESTION 7: How long does it take for the output voltage to reach its peak?

Figure 12

Page 11 of 24

QUESTION 8: How long does it take for the output voltage to reach its final value?

What is the output voltage? Prove your simulation results mathematically (Vout).

Hint: 2

K

1D411

Vin

Vout

2⋅++=

Figure 13

Now run the simulation for 100 µsec at a time greater than 2000 µsec.

QUESTION 9: What is the peak-to-peak ripple voltage?

Figure 14

Page 12 of 24

QUESTION 10: With everything else left as is, what is the minimum output capacitance

be to limit the output voltage ripple to 2 volts peak to peak?

Figure 15

Now, place a current marker on one of the pins of the capacitor. Run the simulation for

200 µsec at a time greater than 10 msec.

QUESTION 11: What can be said about the current through the capacitor?

Figure 16

Page 13 of 24

QUESTION 12: If the ESR of the capacitor is modeled by a 10Ω resistor in series with

the capacitor. What happens to the output voltage ripple and the capacitor current?

Figure 17

Figure 18

Page 14 of 24

Figure 19

Page 15 of 24

Change the load resistance from 1kΩ to 100Ω with C=1µFand L=1mH.

QUESTION 13: What happens to the inductor ripple current, capacitor ripple voltage,

and capacitor current with respect to the original values?

Figure 20

Figure 21

Page 16 of 24

QUESTIONS 14: What operating mode is the converter in now?

QUESTION 15: What happens if the load resistance is removed?

Figure 22

Figure 23

Replace the load resistance.

QUESTION 16: What observations can be made from increasing the on resistance of the

switch?

Page 17 of 24

Figure 24

Figure 25

*Remember that your on resistance value of the switch will provide you a complete

different output value from your classmates.

QUESTION 17: What can be said about the efficiency of the converter?

(Comment on the different configurations of the circuit used throughout this lab.)

PinPout ÷=η

)1(*)( DVgVo −÷=η

Page 18 of 24

QUESTION 18: What can be observed by increasing the switching frequency to

100KHz?

Hints: With everything else left as it is, change your “PW” and “PER” on PULSED

voltage to 5u and 10u. Also change your “Run to time” in the simulation profile to

finaltime 251

Switchfrequency⋅:=

.

Figure 26

Page 19 of 24

Vg 24:= V L 10 106−⋅:= H C 100 10

6−⋅:= F R 1 103⋅:= Ω

Duty cycle

Switchfrequency 25 103⋅:= Hz

T1

Switchfrequency:=

T 4 105−×=

PW 20 106−⋅:=

PWD

f

Duty cycle

D SwitchfrequencyPW⋅:= D 0.5=

The output voltage

Vo

Vg

1

1 D−

1−1− D+

Vg⋅

Vo1−

1− D+Vg⋅:=

Vo 48=

Inductor current

Vin

L

∆iL

D T⋅

∆iL1

LVg⋅ D⋅ T⋅:= ∆iL 48=

IoVo

R:=

Io 0.048=

Page 20 of 24

ILIo

1 D−:=

IL 0.096=

ILmin IL∆iL

2−:= ILmin 23.904−=

ILmax IL∆iL

2+:=

ILmax 24.096=

t1

0

D T⋅

D T⋅

T

:= IL1

ILmin

ILmax

ILmax

ILmin

:=

VL

Vg

Vg

Vg

Vg Vo−

Vg Vo−

Vg Vo−

Vg Vo−

Vg

:= t

0

D T⋅

D T⋅

1 D−( ) T⋅

1 D−( ) T⋅

1 D−( ) T⋅

T

T

:=

0 2.105

4 .105

40

20

0

20

40Inductor voltage

duty cycle

indu

ctor

Vol

tage

V

VL

t

0 2.105

4 .105

40

20

0

20

40inductor current

duty cycle

indu

ctor

cur

rent

A

IL1

t1

is

ILmin

ILmax

0

0

:= iD

0

0

ILmax

ILmin

:= ic

Io−

Io−

ILmax Io−

ILmax Io−

:=

Page 21 of 24

0 2.105

4 .105

10

0

10

20

30Capacitor current

duty cycle

capa

cito

r cu

rren

t (A

)

ic

t1

Icmax ILmax Io−:= Icmax 24.048=

0 2.105

4 .105

40

20

0

20

40switch current

duty cycle

curr

ent A

is

t1

0 2.105

4 .105

40

20

0

20

40diode current Vs. duty cycle

duty cycle

diod

e cu

rren

t (A

)

iD

t1

Is D IL⋅:= Is 0.048=

ID 1 D−( ) IL⋅:= ID 0.048=

K2 L⋅R T⋅

:= K 5 104−×=

Kcrit D 1 D−( )2⋅:=

Kcrit 0.125=

D1 0.1 0.2, 1..:=

DC gain for K>Kcrit

V

Vg

1

1 D−( )

M D1( )1

1 D1−( ):=

M1 t( )

1 14 t

2⋅K

++

2:=

Page 22 of 24

0.1 11

10DC gain

Duty cycle

V/V

g M D1( )

D1

∆Vo1

CIo⋅ D⋅ T⋅:=

∆Vo 9.6 103−×=

0 0.5 10

20

40

60DC gain vs. duty cycle

duty cycle

DC

gai

nM1 D1( )

D1

for K<Kcrit

Page 23 of 24

Input and output Power

Po Io Vo⋅:= Po 2.304= W

Ig IL:=

Pg Ig Vg⋅:= Pg 2.304= W

Efficiency

ηPout

pin

ηVo

Vg1 D−( )⋅:=

η 1=

DCM/CCM boundary

Case 1: When inductor, switching frequency and other circuit parameters are constant, but R is varied

iLmin 0:= iLmax ∆iL:=

iL1∆iL

2:=

iL1 24= IL1

iLmin

iLmax

iLmax

iLmin

:=

Io1 1 D−( ) iL1⋅:= Io1 12=

RVo

Io1:= R 4=

Case 2: when R , switching frequency and other circuit parameters are constant, but L is varied

iLmin 0:= iLmax 2 IL⋅:= iLmax 0.192=

∆iL iLmax:=

0 2.105

4 .105

0

20

40

60inductor current Vs. duty cycle

duty cycle

indu

ctor

cur

rent

IL1

t1

Page 24 of 24

Lmin

1

∆iLVg⋅ D⋅ T⋅:=

Lmin 2.5 103−×=

iL2

iLmin

iLmax

iLmax

iLmin

:=

0 2.105

4 .105

0

0.1

0.2

iL2

t1

L1R T⋅ D⋅ 1 D−( )

2⋅2

:= L1 1 10

5−×=