sep 1992 design techniques for electrostatic …cds.linear.com/docs/en/lt-journal/ltm9210.pdfdesign...

OCTOBER 1992 VOLUME II NUMBER 3

Design Techniques forElectrostatic DischargeProtection by Sean Gold

continued on page 8

1. Inductively, when a surfacebecomes polarized due to nearbyelectric fields

2. Capacitively, when the capaci-tance of a body at fixed potentialincreases

3. Triboelectrically, when two materi-als exchange charge as result offriction and are separated.1

The third generation mechanism,triboelectricity, is usually the mosttroublesome because the human bodycan acquire a substantial charge, upto 35kV in some cases, dependingupon the relative humidity and electri-cal properties of the materials involved.Walking across a wool carpet withleather shoes on a dry winter day maygenerate a charge of 10kV to 15kV,whereas the same action on a humidday in the summer may produce lessthan 2kV.

Charge TransferFor charge to affect circuitry, it must

be transferred from the generator. Elec-trostatic charge may be transferredbetween bodies at different potentialsdirectly, via physical contact, or in-ductively, via an electrostatic field.

IN THIS ISSUE . . .

COVER ARTICLEDesign Techniques forElectrostatic DischargeProtection....................... 1Sean Gold

Editor's Page .................. 2Richard Markell

DESIGN FEATURESLT1190 FamilyUltra-High-SpeedOp Amps Eclipse Prior Art....................................... 3John Wright and Mitchell Lee

LTC1196/1198 SAR ADCsBeat Half-Flashes and Runon 3 or 5V Supplies ........ 6William Rempfer and Marco Pan

DESIGN INFORMATIONLT1112/LT1114 Dual/QuadPrecision Op Amps haveUniversal Appeal ............ 11George Erdi

The LTC1157 Dual 3.3VMicropower MOSFET Driver....................................... 13Tim Skovmand

World’s Lowest-Noise Op AmpNow Available in SO & Unity-Gain Stable Versions ...... 14George Erdi and Alexander Strong

DESIGN IDEASA Temperature-Compensated,Voltage-Controlled-GainAmplifier Using the LT1228....................................... 15Frank Cox

Flash-Memory VPP Generator....................................... 17Sean Gold

LCD Bias Supply............. 17Steve Pietkiewicz

New Device Cameos ........ 18

Since their infancy, integrated-circuit manufacturers have beenconcerned about circuit damagecaused by electrostatic discharge(ESD). Assembly and packaging pro-cedures often proved fatal to earlystone-knife and bearskin ICs. Designand processing techniques improved,but device geometries shrank, per-petuating ESD problems. Today, in-terest in ESD protection goes beyondhandling and assembly considerations.

Portable computers and instrumen-tation are often subjected to severeelectrical stresses, imposing stringentdemands on exposed circuitry. Digital-communication interfaces and inputamplifiers must tolerate repetitive ESDpulses because cable connections fre-quently come in contact with humansand other charged bodies. In addition,products to be sold in European mar-kets must conform to standards setforth by the European Committee forElectrotechnical Standardization(CENELEC). The standard for ESD,IEC-801-2, is now under review andwill become mandatory in 1996.

UNDERSTANDING ESDEven though the most modern ICs

have some form of ESD protection, abasic understanding of electrostaticdischarge, its causes and its remedies,is helpful when designing circuits forelectrically harsh environments.

Charge GenerationBoth conductors and insulators can

support charge, which can build up inthree ways:

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DESIGN FEATURES

2 Linear Technology Magazine • October 1992

ESD Protection, High-Speed andPrecision Op Amps, and Fast SerialADCs Highlight this Issue by Richard Markell

This issue, the last of the year,spotlights many different topics. ESD(electrostatic discharge) is a criticalissue for most RS232 designs. Ourlead article presents a careful study ofthe causes, cures, and prevention ofelectrostatic-discharge damage inRS232 circuitry. The article presents amethod to virtually assure that yourRS232 design is the best it can be.

LTC has expended time and re-sources on an intensive program toensure that our RS232 devices are asESD resistant as we can make them.Laboratory testing has proven thatour RS232 devices can withstand mul-tiple 10kV strikes. Line drivers andline receivers must be more resistantto ESD than other types of devicessince their inputs and outputsconnect directly to the outside world.Other devices are hidden inside

instrumentation boxes, on PC boards,or otherwise shielded from the rigorsexperienced by the DB25 (RS232) con-nector. Making LTC’s RS232 partsmore rugged to the tune of 10kV isanother engineering triumph from thedesigners at LTC.

This issue includes two articles onour high-speed operational amplifi-ers. The first is a collection of circuitsdesigned around the low cost LT1190video amplifier. The second shows tem-perature compensation of the LT1228electronic gain control amplifier. Bothof these components and a whole listof other video amplifiers are productsfrom LTC’s 600MHz complementarybipolar process. This proprietary pro-cess allows IC designers to combineprecision DC specifications with highspeed, resulting in some of the bestvideo amplifiers in the industry. Watch

for more video amplifiers and otherhigh-speed products from LTC.

Precision operational amplifiers arealso well represented in this issue witharticles on the new LT1112/1114 dualand quad surface-mountable op amps.Also new in the world of op amps is asurface-mount version of the industry’slowest noise op amp, the LT1028. Inaddition, the new LT1128 is a unity-gain-stable version of the LT1028,which is also available in SO pack-ages. The LT1028 and the LT1128 arefeatured in a short article herein. Lastto be described here, but certainly notleast in performance, are two new A/Dconverters. These converters, theLT1196/1198, challenge half-flashconverters in speed, cost, power con-sumption, size, and ease of use.

Issue HighlightsSean Gold leads off this issue with

his article on techniques for staving offthe horrors of ESD. Sean has been atLTC for four years, during which timehe designed the LT1134, LT1137,LT1237, LT1330, LT1026 and theLT1116. He is an avid cyclist, urbanadventurer, and alpine skier, and regu-larly attends the Foothill Collegeelectronics flea market. Sean’s collec-tion of mid-60’s oscilloscopes andinstrumentation has made himextremely popular with the ladies.

Mitchell Lee and John Wright de-scribe a number of applications forLTC’s LT1190 high-speed op amp.Mitchell Lee has been at LTC for twoyears as an Applications Engineer. Hehas worked in the semiconductor ap-plications arena (and it certainly is anarena) for more than 12 years total.Mitchell’s hobbies include fourth-sea-

son mountaineering and music. Un-like John, Mitchell doesn’t fish HatCreek.

Frank Cox is the newest memberof our Applications Group. Frankdescribes the LT1228 100MHz cur-rent-feedback amplifier with DC gaincontrol. He has been involved in RFand video systems for the past eightyears. Frank has been at LTC for onlyfour months but is already developingmany video and RF circuits using LTC’shigh-speed operational amplifiers.Frank’s outside interests include fish-ing and audio systems.

Alexander Strong and George Erdidescribe some new LTC offerings in opamps, the LT1128 and the LT1028 inSO packaging. Alex has been at LTCfor more than two years. He has workedin the semiconductor industry for morethan 12 years, primarily designing op

amps and D/A converters. Alex is aVermont native whose interests in-clude camping, hiking, and racing hisdiesel Mercedes at Laguna Seca. Alexis another loyal patron of the Foothillflea market.

Marco Pan is the designer and co-author of the article on the LTC1196/1198 serial 8-bit A/D converters thatconvert at speeds up to 1.3MHz. Marcohas been at LTC for five years and hasbeen in the industry a total of eightyears. He designed the LTC690 seriesof microprocessor supervisory circuits,LTC1096, LTC1098, LTC1196 and theLTC1198. Marco’s outside interestsinclude his family, gardening, andhome improvement.

Short biographies of John Wright,Willie Rempfer, and George Erdi ap-peared in previous issues.

EDITOR'S PAGE

Linear Technology Magazine • October 1992 3

DESIGN FEATURES

1190_3.A eps

–

+VIN

RS 51Ω LT1190

3

2

7

6

4

+5V

–5V

1N5712

RO 20Ω

VO DC

CL 10nF

TIME (s)

100k

2dB/

DIV

100M

1190_2. eps

0

1M 10M

LT1190

LM118

AV = –1 RL = RFB = 1k

LT1191

–2

–4

–6

–8

8

6

4

2

–10

–12

TIME (s)

100k

2dB/

DIV

100M

1190_1. eps

0

1M 10M

LT1191

LT1190

LM118

AV = +1 RL = 1k

–2

–4

–6

–8

8

6

4

2

10

–10

IntroductionThe LT1190 series op amps

combine bandwidth, slew rate, andoutput-drive capability to satisfy thedemands of many high-speed appli-cations. This family offers up to350MHz gain-bandwidth product,slew rates of 450V/µs, and yet drives a150Ω (75Ω, double-terminated) load.In 50Ω systems, the LT1190 familycan deliver +13.5dBm to a double-terminated load. These parts are basedon the familiar, easy-to-use, voltage-mode feedback topology.

Characteristics of the three mem-bers of the LT1190 series are shown inTable 1.

LT1190 Family Ultra-High-Speed OpAmps Eclipse Prior Art by John Wright and

Mitchell Lee

All of the LT1190 series devicesoperate on single 5 to 15V supplies, orsplit supplies of up to ±8V. Outputcurrent capability is ±50mA.

Careful chip design has made theLT1190 family quite tolerant of supply-rail bypassing. In many applications, asimple 100nF disc ceramic capacitorfrom each supply pin to ground is allthat is needed. Where settling time isan issue, a 4.7µF tantalum capacitorshould be added on each supply pin.Such a cavalier attitude toward supplybypassing is a radical departure fromthe industry norm.

Another unusual feature commonto the LT1190 family is shutdown.This allows the user to multiplex out-puts, gate signals, or conserve powerwhen an op amp is idle.

Table 1. Characteristics of the LT1190 family

SettlingGBWP SR Time

Part (MHz) (V/µs) Min Gain (0.1%, ns)

LT1190 50 450 +1 140LT1191 90 450 +1 110LT1192 350 450 +5 90

Figure 1. Small-signal response AV = +1.130MHz peaking due to socket andbypass components

Figure 2. Small-signal response AV = –1

Figure 3. Closed-loop peak detector

Small-Signal PerformanceFigures 1 and 2 show the small-

signal performance of the LT1190 andLT1191 when configured for gains of+1 and –1. The non-inverting plotsshow peaking at 130MHz, which ischaracteristic of the socketed test fix-ture and supply bypass components.A tight PC-board layout would reducethe LT1190 peaking to 2dB. The small-signal performance of an LM118 isshown for comparison.

ApplicationsFast peak detectors place unusual

demands on amplifiers. The outputstage must have a high slew rate inorder to keep up with the intermediatestages of the amplifier. This conditioncauses either a long overload or DC-accuracy errors. To maintain a highslew rate at the output, the amplifier

must deliver large currents into thecapacitive load of the detector. Otherproblems include amplifier instabilitywith large capacitive loads and pres-ervation of output-voltage accuracy.

Detecting Sine WavesThe LT1190 is the ideal candidate

for this application, with a 450V/µsslew rate, 50mA output current, and70° phase margin. The closed-looppeak detector circuit of Figure 3 uses aSchottky diode inside the feedbackloop to obtain good accuracy. A 20Ωresistor (RO) isolates the 10nF load andprevents oscillation.

DC error with a sine-wave input isplotted in Figure 4 for various inputamplitudes. The DC value is read witha DVM. At low frequencies, the error issmall and is dominated by the decay ofthe detector capacitor between cycles.

DESIGN FEATURES


Figure 5. Open-loop, high-speed peak detector

–

+

VINRS 51Ω

LT1190

3

2

7

6

4

+5V

–5V

D2 1N5712

D1 1N5712

–5V

CFB 10nF

CL 1nF

RL 51k

1190_5. eps

–5V

RB 51k

Figure 7. Fast pulse detector

As frequency rises, the error increasesbecause capacitor charging time de-creases. During this time the overdrivebecomes a very small portion of a sinewave cycle. Finally, at approximately4MHz, the error rises rapidly owing tothe slew-rate limitation of the op amp.For comparison purposes, the error ofan LM118 is also plotted for VIN = 2VP-P.

A Schottky-diode peak detector canbe built with a 1nF capacitor and a10kΩ pulldown. Although this simplecircuit is very fast, it has limited use-fulness owing to the error of the diodethreshold and its low input imped-ance. The accuracy of this simpledetector can be improved with theLT1190 circuit of Figure 5.

In this open-loop design, D1 is thedetector diode and D2 is a level-shifting or compensating diode. A loadresistor, RL, is connected to –5V, andan identical bias resistor, RB, is usedto bias the compensating diode. Equal-

value resistors ensure that the diodedrops are equal. Low values of RLand RB (1kΩ to 10kΩ) provide fastresponse, but at the expense of poorlow-frequency accuracy. High valuesof RL and RB provide good low-frequency accuracy but cause theamplifier to slew-rate limit, resultingin poor high-frequency accuracy. Agood compromise can be made byadding a feedback capacitor, CFB,which enhances the negative slew rateon the (–) input.

The DC error with a sine-wave in-put, as read with a DVM, is plotted inFigure 6. For comparison purposes theLM118 error is plotted, as well as theerror of the simple Schottky detector.

Pulse DetectorA fast pulse detector can be made

with the circuit of Figure 7. A very fastinput pulse will exceed the amplifier’sslew rate and cause a long overloadrecovery time. Some amount of dV/dtlimiting on the input can help thisoverload condition; however, it willdelay the response.

Figure 8 shows the detector errorversus pulse width. Figure 9 is theresponse to a 4VP–P input pulse that is Figure 8. Detector error vs. pulse width

80ns wide. The maximum output slewrate in the photo is 70V/µs. This rate isset by the 70mA current limit driving1nF. As a performance benchmark,the LM118 takes 1.2µs to peak detectand settle, given the same amplitudeinput. This slower response is due, inpart, to the much lower slew rate andlower phase margin of the LM118.

Instrumentation AmplifierRejects High Voltage

Instrumentation amplifiers are nor-mally used to process slowly varyingoutputs from transducers, rather than

PULSE WIDTH (ns)

00

DC D

ETEC

TOR

ERRO

R (%

)

10

30

40

60

80

90

100

1190_8. eps

70

50

20

20 40 60 80

VIN = 4VP-P dV/dt LIMITING = 1kΩ, 20pF

FREQUENCY (Hz)

1M0

DC D

ETEC

TOR

ERRO

R (%

)

10

20

30

40

50

10M 100M

1190_6. eps

SCHOTTKY VIN = 2VP-P

SCHOTTKY VIN = 4VP-P

SCHOTTKY VIN = 6VP-P VIN = 6VP-P

VIN = 2VP-P

VIN = 4VP-P

LT1190

LM118 VIN = 2VP-P

Figure 6. Open-loop peak-detector errorvs. frequency

–

+

VINLT1190

3

2

7

6

4

+5V

–5V

D2 1N5712

RB 10k

D1 1N5712

–5V

CL 1nF

RL 10k

RS 51Ω

CI 20pF

1190_7. eps

–5V

RI 1k

FREQUENCY (Hz)

10k0

DC D

ETEC

TOR

ERRO

R (%

)

10

40

50

100k 1M 10M

1190_4. eps

20

30

LT1190 VIN = 6VP-P

LT1190 VIN = 4VP-P

LT1190 VIN = 2VP-P

SLEW RATE LIMIT

LM118 VIN = 2VP-P

Figure 4. Closed-loop peak-detector errorvs frequency


DESIGN FEATURES

20ns/DIV

B (1V/DIV)

1190_9. eps

A (1V/DIV)

Crystal OscillatorOp amps have found wide use in

low-frequency (≤100kHz) crystal os-cillator circuits, but just haven’t hadthe bandwidth to operate successfullyat higher frequencies. The LT1190and LT1191 make excellent gain stagesfor high-frequency Colpitts oscillators.A practical implementation is shownin Figure 12.

Gain limiting is provided by twoSchottky diodes, which maintain theoutput at approximately +11dBm—sufficient to directly drive +7 or +10dBmdiode-ring mixers. Output-stage clip-ping is not recommended as a means ofgain limiting, as this increases distor-tion and allows internal nodes to beoverdriven. The recovery time wouldadd excessive phase shift in the oscilla-tor loop, degrading frequency stability.

Distortion performance is good, con-sidering that the oscillator consists ofone stage and can deliver useful out-put power. Figure 13 shows a spectral

Figure 9. Open-loop peak detector responseTrace A: output (1 Volt/division)Trace B: input (1 Volt/division)

–

+VIN LT1192

2

3

7

6

4

+5V

–5V

1190_10. eps

10k

100Ω

99ΩVCM 120VP-P

10k

10k

Figure 10. 3.5MHz instrumentation amplifier rejects 120VP–P

plot of the oscillator’s output. The sec-ond harmonic is approximately 37dBdown, limited primarily by the clippingaction of the Schottky diodes. Power-supply rejection is excellent, showing afrequency sensitivity of approximately0.1ppm/V. The LT1190 gives accept-able performance to 10MHz, while theLT1191 extends the circuit’s operatingrange to 20MHz.

fast signals. However, it is possible tomake an instrumentation amplifierthat responds very quickly, with goodcommon mode rejection. For the cir-cuit of Figure 10, an LT1192 is used toobtain 50dB of CMRR from a 120VP–Psignal. In this application, the CMRRis limited by the matching of the resis-tors, which should match to betterthan 0.01%.

An LT1192 is used in this applica-tion because the circuit has a noisegain of 100, and because the highergain bandwidth of the LT1192 allows a–3dB bandwidth of 3.5MHz. Note alsothat the 100:1 attenuation of thecommon-mode signal presents a com-mon-mode voltage to the amplifier ofonly 1.2VP–P. Figure 11 shows the am-plifier output for a 1MHz square waveriding on a 120VP–P, 60Hz signal. Thecircuit exhibits 50dB rejection of thecommon-mode signal.

200ns/DIV

2V/DIV

1190_11. eps

1190_12. eps

–

+

–5V

51Ω

1kΩ

+5V

1N57111N5711330pF

75pF75pF

3.579545MHz

LT1190TO NETWORK ANALYZER (ZIN = 50Ω)100kΩ

Figure 12. High-frequency Colpitts oscillator

Figure 11. Output of instrumentation amplifier with a1MHz square wave riding on 120VP–P at the input

FREQUENCY (MHz)

3–80

OUTP

UT P

OWER

(dBm

)

–70

–50

–30

–10

0

20

13

1190_13. eps

–60

–40

–20

10

4 5 6 7 9 10 11 128

Figure 13. Oscillator output spectrum

DESIGN FEATURES


INTRODUCTIONThe LTC1196/1198 are 600ns,

1.2MHz sampling 8-bit A/D convert-ers packaged in tiny 8-pin SO pack-ages and operating on 3V to 6Vsupplies. The on-chip sample-and-holds have full-accuracy input band-widths of 1MHz. The ADCs draw only10mW from a 3V supply or 50mWfrom a 5V supply and the LTC1198powers down to leakage current be-tween conversions.

The LTC1196 has differential in-puts and offers the highest samplerate (1.2MHz). The LTC1198 convertstwo input channels, single ended ordifferentially. These converters pro-vide system designers with previouslyimpossible levels of performance in anextremely small space. This article willdiscuss the ADCs’ advantages, designtechniques, 3V and 5V performance,and application considerations.

SIZE, SPEED, COST,AND POWER ADVANTAGES

The new LTC1196/1198 offersmaller size, better speed, lower cost,and much lower power dissipationthan half-flash converters.

SizeThe LTC1196/1198 can provide con-

siderable space savings over half-flashADCs for three reasons: First, the tinySO-8 package and minimum numberof external components makes theADCs’ configuration small comparedto those of the 20-pin alternatives.Second, the low power dissipation andhigh-impedance inputs cut the spacerequirements in the power supply andsignal-conditioning circuitry. Third, theserial interface to a processor, digitalASIC, or logic system requires onlythree wires and only three pins on thereceiving system. This saves board

LTC1196/1198 SO-8 Packaged SARADCs Beat Half-Flashes in Any Arenaand Run on 3 or 5V Supplies by William Rempfer

and Marco Pan

Figure 2. ICC vs. sample rate for LTC1196 andLTC1198 operating on 5V and 2.7V supplies

Figure 1. The LTC1196/1198 (right) canprovide considerable space savings overhalf-flash ADCs (left)

SAMPLE RATE (Hz)

0.01

SUPP

LY C

URRE

NT, I

CC (m

A)

0.1

1

10

100 10k 100k 1M

1196_2. eps

0.0011k

LTC1196 VCC = 5V

LTC1196 VCC = 2.7V

LTC1198 VCC = 5V

LTC1198 VCC = 2.7V

space and allows the ADC to be locatedclose to the signal source, making thephysical configuration more flexibleand smaller than the 11-wire-I/O half-flash alternatives. With the LTC1196/1198, an extremely small configura-tion can be implemented, as shown inFigure 1. The system is 3V poweredand is 100% surface mountable.

SpeedThe LTC1196 and LTC1198 beat

half-flash ADCs on speed. They offerequivalent sample rates and three

times wider input-sampling band-widths than well known half-flashproducts such as the AD7821,ADC08061, or ML2261. With 600nsconversion times, 1.2MHz samplingrates, and 1MHz full-accuracy inputbandwidths, the LTC1196/1198 aremore than a match for half-flash ADCs.

CostThe LTC1196/1198 reduce system

cost relative to half-flash ADCs ina number of ways. First, they offertremendous price/performance advan-tages when their sticker prices arecompared to those of half-flash con-verters in this speed range. Second,the savings in board space can trans-late into a cheaper system or a systemthat wasn’t even possible with oldertechnology. Third, 3V operation caneliminate the cost of a regulatedsupply in 3V battery systems or thecost of generating a separate 5V supplyin 3V systems. Fourth, reduced-spanoperation can reduce the cost of signal-conditioning circuitry. Finally, the re-duced power consumption and powershutdown can reduce the cost of thesystem power supply or batteries.

PowerThe power savings of the new ADCs,

and especially of the LTC1198, can bevery large. Their power consumptionwhen operating on a 5V rail is equal tothat of a half-flash converter. Powerconsumption can be reduced two ways.Using a 3V supply lowers the powerconsumption on both devices by afactor of five, to 10mW. The LTC1198can reduce power even more because itshuts down whenever it is not convert-ing. Figure 2 shows the supply currentversus sample rate for the LTC1196and the LTC1198 on 3V and 5V.


DESIGN FEATURES

INTERNAL DESIGN:GETTING HALF-FLASH SPEEDSWITH AN SAR CONVERTER

The LTC1196/1198 design uses thesuccessive-approximation techniqueto achieve remarkable speed from alow-cost n-well CMOS process. Toachieve its 600ns conversion time and1.2MHz sample rate, bit tests are per-formed every 70ns. To digitize 1MHzinput signals to full accuracy, thesample-and-hold has a 3dB band-width of 10MHz and acquires andsettles in less than 100ns.

The partitioning of the 70ns bit-testtime is shown in Figure 3. One cycleconsists of the DAC switching andsettling, the comparator making a de-cision, and the SAR latching the bitvalue and updating the DAC.

The capacitive DAC design settlesto 0.02% in 30ns. The design andlayout of the DAC is critical to achiev-ing this speed. The settling time con-stant must be less than 3.5ns.

The comparator is an ultra-fast,auto-zeroed, sampled-data compara-tor. It is a redesign of the comparatorused in the LTC1272 12-bit, 3µs sam-pling ADC. Its design includes cas-caded stages of low gain and has anextremely wide (200MHz) small-signalbandwidth. It is designed to minimizedisturbance to the power supply lines

APPLICATIONCONSIDERATIONS

Analog ConsiderationsThe LTC1196/1198 are remarkably

easy to use. They will yield excellentperformance if some simple rules arefollowed for board layout, bypassing,and driving the reference and analoginputs. (For a more detailed discus-sion see Linear Technology Volume I,Number 2, pp. 9–10 and the LTC1196/1198 data sheet.)

Board layout should include an ana-log ground plane to which all analogcircuitry is referenced. Low-inductanceground and supply lines are recom-mended. Also, the input signal shouldbe routed away from digital circuitry.

If the power supply is clean, by-passing the ADC requires only a 0.1µFcapacitor, because the power-supplytransients produced within the chiphave been minimized. A surface-mountchip cap. or a ceramic cap. with shortleads will give very good results.

Figure 4. LTC1196 conversion timing

and responds to a 0.5mV overdrivein 20ns.

Figure 4 shows the conversiontiming for the LTC1196. The con-version takes 8.5 clock cycles andthe total cycle time is 12 clockcycles. These correspond to a con-

version time of 600ns and a samplerate of 1.2MHz at the maximum14.3MHz clock frequency. The sample-and-hold acquires the analog inputfrom the end of a conversion to thestart of the next. At that time it goesinto hold mode and the conversionstarts.

3V VERSUS 5VPERFORMANCE COMPARISON

The performance comparison inTable 1 shows that using a 3V supplygives great savings in power with onlymodest reductions in speed. The powerdissipation drops by a factor of fivewhen the supply is reduced to 3V. Theconverter slows down somewhat butstill gives excellent performance on a3V rail. It converts in 1.6µs, samplesat 450kHz, and provides a 500kHzlinear-input bandwidth, making it thefastest 3V ADC on the market. Gettingrid of 80% of the power loss makes 3Voperation very attractive.

Dynamic accuracy is excellent onboth 5V and 3V. The ADCs typicallyprovide 49.3dB or 7.9ENOBs (Effec-tive Number Of Bits) of dynamic accu-racy at both 3 and 5V. The noise floor isextremely low, corresponding to a tran-sition noise of less than 0.1LSB. DCaccuracy includes ±0.5LSB total un-adjusted error at 5V. At 3V, linearityerror is ±0.5LSB while total unad-justed error increases to ±1LSB.

continued on page 12

Table 1. 5V/3V performance comparison

LTC1196/1198 5V 3V

PDISS 50mW 10mWMax fSAMPLE 1.2MHz 450kHzMin tCONV 600ns 1.6µsINL (Max) 0.5LSB 0.5LSBTypical ENOBs 7.9 @ 300kHz 7.9 @ 100kHzLinear Input 1MHz 500kHzBandwidth(ENOBs >7)

1196_3. eps

20ns

DAC SETTLESCOMPARATOR

LATCHES BIT VALUE

SAR UPDATES

DAC

20ns30ns

70ns

Figure 3. Bit-test timing sequence

1196_4. eps

tCONV (8.5 CLKs)

DOUT

CLK

CS

B0B2

tCYC (12 CLKs)

B6NULL BITB0 B7 B5 B3 B1Hi-ZHi-Z

NULL BIT

tSMPL (3.5 CLKs)tSMPL

B4

DESIGN FEATURES


0

esd_1.eps

1kV/

DIV

5ms/DIV

Figure 4. Human-body model circuit for ESD pulses

ESD, continued from page 1The human body can store 20 to 30millijoules of energy, but, because ofthe body’s relatively high source im-pedance, not all of that energy can betransferred during a discharge.

ESD pulses exhibit a slowly decay-ing exponential response, but the risetime can be extremely fast. (Figure 1)ESD often contains frequency compo-nents well into the GHz range. At suchfrequencies, nearby cables and cir-cuit-board traces look like receivingantennas that can pick up ESD noise.

ESD DamageEarly ICs were especially suscep-

tible to ESD-induced oxide damage atlow voltages. Discharges of less than500V, which were commonly gener-ated during assembly and handling,were sufficient to cause damage. Dam-age often occurred where the oxide’sdielectric strength was weakest. Thetrouble spots were usually in regionswhere metal from a pad passed over

thin oxide—often an n+ diffusion. Rec-ognition of this problem and improvedprocessing techniques have eliminatedthis type of damage.

Damage from ESD is fundamentallythe result of a transfer of energy. Heatcan destroy junctions and metalliza-tion when excessive energy dissipateswithin the chip. Intense electrostaticfields can also break down junctions orthin oxide preceding a destructive en-ergy transfer. Figures 2 and 3 showsome typical examples of ESD damage.

ESD noise can also drive circuitryinto invalid or locked-up states thatare not necessarily destructive. Bydefinition, such “soft errors” are cor-rected by cycling the power supply orby forcing the circuit back into a validoperating state. If a soft error inducesa high-current condition, prolongedheating may destroy an unprotecteddevice. Systems can be made resilientto soft errors using digital controlto detect invalid states and reset thecircuit.

Circuit Models for ESDThe need to generate ESD pulses for

test purposes prompted the develop-

ment of a circuit model based on thecharge storage characteristics of thehuman body. The switching circuitshown in Figure 4 consists of a 100pFhigh-voltage capacitor dischargedthrough a 1.5kΩ resistor. The energydelivered to the load in each pulse isE = (1/2)CV 2

× (RL/RS + RL). Testequipment based on this circuit modelwas used to determine the ESD toler-ances quoted here.

ESD PROTECTIONTECHNIQUES

Any action that eliminates the chargegenerator, circumvents charge trans-fer, or enhances the circuit’s ability toabsorb energy will increase a circuit’stolerance of ESD. Eliminating the ubiq-uitous charge generators or disruptingcharge transfer are difficult tasks be-cause they demand strict control of thecircuit’s operating environment. A morepractical approach is to limit ESD en-try points by shielding the circuit’senclosure and covering the exposedconnectors when they are not in use.

Another practical remedy is to in-crease a circuit’s ability to absorbenergy by clamping the exposed pins

esd_4.eps

DISCHARGE SWITCH

RS 1.5kΩ

CS 100pF

RC 50MΩ TO 100MΩ

HIGH-VOLTAGE DC SUPPLY

RL

DISCHARGE TIP

DISCHARGE RETURN

CONNECTION

Figure 1. 3.5kV ESD pulse. (Photo taken with alow-capacitance voltage divider and a Tek typeP6103 high-voltage probe)

Figure 3. Removing metallization revealsjunction damage between the emitter andthe collector of a lateral PNP transistor

Figure 2. ESD damage results in a resistiveshort from a bond pad to a thin oxide n+ regionon an unprotected bipolar IC


DESIGN FEATURES

esd_7.eps

DIGITAL CIRCUITS

EQUIVALENT DECOUPLING NETWORK

VCC BUS

RG = 1Ω

ESD CLAMP

RS 1.5kΩ

CS

PREFERRED RETURN PATH

VX

HIGH-VOLTAGE DC SUPPLY

Figure 7. Circuit model for ESD current flow

turned off or powered down. When thetransceiver is on and significant ESDdischarge occurs, the resulting cur-rent may de-bias internal circuitryand cause nondestructive soft errors.Observations have shown these errorsto be highly dependent upon the logi-cal state of the transceiver.

FiltersWhen extremely high levels of ESD

protection are required, an externalLC filter can be used for additionalprotection. The circuit in Figure 6 hasa 10MHz cutoff frequency with 40dB/decade rolloff, which is sufficient todrop ESD energy into a range thatcan be safely dissipated within thetransceiver.

PC Board LayoutEnergy shunted through an ESD

clamp can still cause problems if theground path’s return inductance islarge enough to create a sizable voltagedrop. Such voltage drops may damageunprotected components that sharethe common ground line. Consider thecircuit model shown in Figure 7. Sup-pose the return path to groundpresents a 1Ω impedance at ESD fre-quencies. The voltage VX at the localground is approximately VX = VP (RG/RG+RS) = VP/1500. If there is poorcommon-mode coupling to VCC, thedigital ICs sharing the common groundwill be damaged when VX exceedsVCC+0.7V. This condition occurs whenthe peak ESD voltage is greater than8.55kV. Using a low-inductanceground plane, or, preferably, isolatingthe return path to low impedanceground, is therefore essential for goodESD protection.

esd_5.eps

RS232 RECEIVER

RS232 TRANSMITTER

ESD CLAMP

ESD CLAMP

AC COUPLING CAPACITORS

Figure 5. Older interface designs usedexternal ESD clamps

esd_6.eps

RS232 LINE

50pF

5µHRS232 RECEIVER

LOGIC OUTPUT

50pF

5µHRS232 DRIVER

FERRITE BEADS

RS232 LINE

LOGIC INPUT

to ground with fast-acting avalanchediodes or dedicated transient suppres-sors (Figure 5). Discrete suppressorsare widely available and are extremelyeffective. Designers are often reluctantto use discrete suppressors becausethey are expensive—at up to $0.40/pin they can sometimes exceed thecost of the IC. Transient suppressorsalso introduce stray capacitance, whichmay prohibit their use in high-speedcircuits.

Designers are often reluctantto use discrete suppressors

because they are expensive...they can sometimes exceed

the cost of the IC.

The LT1237 RS232 transceiver in-corporates the clamps for divertingESD energy on chip. These active struc-tures quickly respond to positive ornegative signals at threshold voltageshigher than RS232 signals but belowdestructive levels for the device. Thepath of high current flow is throughlarge pn junctions, which increase thedevice’s capacity to absorb energy.The LT1237’s ESD structures can ab-sorb human-body-model dischargesof >10kV. The resulting current flow isinsignificant when the transceiver is

Figure 6. External LC filters provideprotection from very high levels of ESD,yet cost less than discrete suppressors

Sometimes the high current path isnot directly to ground. In the examplewith the LT1237, ESD currents flowthrough the device’s substrate, whichis connected to the negative chargepump output, V–. V– is AC coupled toground through a 0.1µF storage ca-pacitor, which must have low effectiveseries resistance (ESR) to prevent dam-aging voltage drops. Adding a fewhundred picofarads of low ESR ca-pacitance in parallel with the primarystorage capacitor effectively reducesESR at ESD frequencies.

When using discrete transient sup-pressors or filters, place componentsas close as possible to the connectorwith short paths to the return plane.Increasing the distance, or the seriesresistance, between the entry pointand the sensitive device diminishesthe ESD energy transferred.

ESD pulses can easily arc from onetrace to another when the spacing be-tween traces is narrow. Increasing thespacing between the circuit board tracesor surrounding signal lines with a sepa-rate return plane is helpful in prevent-ing ESD energy from arcing betweenpins. Arcing occurs slowly comparedwith ESD rise time, so air spark gaps


0

esd_8.eps

1kV/

DIV

0.5ms/DIV

DESIGN FEATURES

Anatomy of theLT1237 RS232 Port

The LT1237 is a complete RS232port, designed specifically for bat-tery-powered computers and instru-mentation. The device contains threedrivers, five receivers, and a regu-lated charge pump to reduce sup-ply current. Supply current istypically 6mA, but the device can beshut down with two separate logiccontrols. The driver-disable pinshuts off the charge pump and thedrivers, leaving all receivers active,ISUPPLY = 4mA. The ON/OFF pinshuts down all circuitry except forone micropower receiver, ISUPPLY =60µA. The active receiver is usefulfor detecting start-up signals. TheLT1237 operates up to 120kbaud,and is fully compliant with all RS232specifications and fault conditions.The flow-through pinout and theLT1237’s ability to use small sur-face-mount capacitors helps reducethe interface’s overall footprint. Con-nections to the RS232 cable areprotected with internal ESD struc-tures that can withstand repetitive±10kV human-body-model ESDpulses.

1Triboelectric charging should not be confused withthe primal creatures who worship the Tektronix547 oscilloscope, and are often referred to as a“tribe-o-electricals.”

References:1. Linear Technology 1990 Databook, pp.15–23 to

15–34.2. Clarke, O. and Neill, D., “Electrical-Transient

Immunity: A Growing Imperative For SystemDesign,” Electronic Design, Jan 23, 1992,pp. 83–98.

3. Boxleitner, W., “How to defeat electrostatic dis-charge,” IEEE Spectrum, August 1989, pp. 36–40.

4. Matisoff, B., Handbook of Electrostatic DischargeControls, Van Nostrand Reinhold, 1986.

Do not do this! Instead, ACcouple the grounds so they areshorted at ESD frequencies.

DC IsolationESD transients should not

be confused with DC and low-frequency ground faults thatoccur when circuits with largedifferences in ground potential are connected together.The amount of energy trans-ferred during a ground faultcan be vastly greater than theenergy of an ESD pulse. To

guard against ground faults requiresa circuit with true DC isolation. A fullyisolated RS232 transceiver design isdescribed in Linear Technology'sDesign Note 27.

CONCLUSIONThe techniques described here can-

not entirely eliminate ESD problems,but understanding ESD’s nature andusing careful circuit design will helpprotect against its intrusion.

alone will not protect circuitry fromESD. Spark gaps are, in fact, usefulfor limiting the ESD energy. Figure 8shows a 300µs delay between theinitial ESD rise and the activation of a10 mil spark gap.

The connections to the cable shieldaffect noise and ESD performance.Designers may feel inclined to floatthe cable shield with respect to localground to avoid circulating currentsdue to differences in ground potential.

Figure 10. A typical application circuit for the LT1237 under digital control

RX 5 OUT (LOW-Q)

esd_box.eps

28

27

26

25

24

23

22

218

7

6

5

4

3

2

1

20

19

18

1712

11

10

9

16

1514

13

+

TO LINE

TO LOGIC

2 x 0.1µF0.1µF1.0µF

V+

2 x 0.1µF

LT1237

0.1µF

5V VCC

RX 2 IN

DRIVER 2 OUT

RX 1 IN

DRIVER 1 OUT

RX 5 IN (LOW-Q)

DRIVER 3 OUT

RX 4 IN

RX 3 IN

ON/OFF

RX 3 OUT

RX 2 OUT

DRIVER 2 IN

RX 1 OUT

GND

DRIVER 3 IN

RX 4 OUT

DRIVER 1 IN

DRIVER DISABLE

RING DETECT IN

RECEIVE ONLY MODE

SHUTDOWN CONTROL OUT

µ CONTROLLER

V–

Figure 8. 10-mil spark gap limits ESD duration


The LT1112 and LT1114 are dualand quad universal precision op amps.The universal description is justifiedby the fact that all important precisionspecifications have been optimized:

1. Microvolt offset voltage: the lowcost grades (including the small-outline, 8-pin surface-mount pack-age) are guaranteed to 75µV

2. Drift guaranteed to 0.5µV/°C(0.75µV/°C low cost grades)

3. Bias and offset currents are in thepicoampere range, even at 125°C

4. Low noise: 0.32µV peak-to-peak,0.1Hz to 10Hz

5. Supply current is 400µA max.per amplifier

6. Voltage gain is in excess of onemillion

Therefore, there are very few preci-sion op-amp applications, where theLT1112/LT1114 will not be the dualor quad op amp of choice. They can bestocked as the universal dual or quadand used without time-consumingerror-budget calculations. Table 1 liststhe guaranteed specifications.

LT1112/LT1114 Dual/Quad Precision OpAmps have Universal Appeal by George Erdi

Figure 1. Standard S8 pin configuration and LTC proprietary S8 pin configuration

Table 1. LT1112 dual, LT1114 quad low-cost grades, guaranteed specifications VS = ±15V, TA = 25°C

Parameter Typical Min/Max UnitsOffset Voltage 25 75 µVDrift with Temperature

Plastic/CERDIP 0.2 0.75 µV/°CSO-8 0.4 1.3 µV/°C

Offset Current 60 230 pABias Current 80 280 pANoise 0.1 to 10Hz 0.32 — µVP–P

At 1kHz 13 20 nV/√HzSupply Current/Amp 350 450 µAGain 5000 800 V/mVCMRR 136 115 dB

Table 3. Specifications for low-cost grades with ±1.0V supplies, TA = 25°C

Parameter Typical Min/Max Units

Offset Voltage 45 130 µVDrift with Temperature

Plastic/CERDIP 0.25 — µV/°CSO-8 0.45 — µV/°C

Supply Current/Amp 320 420 µACommon-ModeRange +250, –320 — mVSwing (Light Load) ±270 — mV

DESIGN INFORMATION

Standard SO8Dual-Pin Configuration

The LT1112 is the first dual opamp offered by Linear Technologywith the standard SO8 pin configu-ration (Figure 1), i.e., the pin loca-tions are identical to the plastic orCERDIP packages. Note that the in-dustry-standard package is calledthe SO8 package. To order this pack-age type, add S8 to the LTC partnumber, as illustrated in Figure 1.

Matching SpecificationsIn addition to the outstanding specs

of Table 1, the LT1112 and LT1114also provide a full set of matchingspecifications, facilitating their use insuch matching-dependent applica-tions as two and three op amp instru-mentation amplifiers (Table 2). Theperformance of these instrumenta-tion amplifiers will be limited by thematching parameters only—notby the specifications of the individualamplifiers (Figure 2).

Guaranteed Specsfor ±1.0V Supplies

Another set of specifications isfurnished for ±1V supplies. This, com-bined with the low 320µA supplycurrent per amplifier, allows the

Table 2. Guaranteed matching specifications of low-cost grades, VS = ±15V, TA = 25°C

Parameter Typical Min/Max UnitsOffset Voltage Match 40 130 µVDrift with Temperature

Plastic/CERDIP 0.3 1.0 µV/°CSO-8 0.5 1.9 µV/°C

Non-InvertingBias Current Match 100 500 pACommon-ModeRejection Match 136 113 dBPower-SupplyRejection Match 130 112 dB

8

7

6

54

3

2

1OUT A

–IN A

+IN A

V– +IN B

–IN B

OUT B

V+

TOP VIEW

S8 PACKAGE 8-LEAD PLASTIC SOIC

B

8

7

6

54

3

2

1+IN A

V–

+IN B

–IN B OUT B

V+

OUT A

–IN A

TOP VIEW

S8 PACKAGE 8-LEAD PLASTIC SOIC

B

A

1112_1.eps

A

LT1112S8 LT1013DS8 LT1057S8 LT1078S8 LT1124CS8 LT1126CS8


Digital ConsiderationsThe LTC1196/1198 will interface

via three or four wires to ASICs, PLDs,microprocessors, DSPs, and shift reg-isters. To run at its fastest conversionrate (600ns) it must be clocked at14.3MHz. HC logic families and anyhigh speed ASIC or PLD will easilyinterface to the ADC at that speed.

Connection to a microprocessor orDSP serial port is very easy. It requiresno additional hardware, but the speedwill be limited by the clock rate of themicroprocessor or DSP. The TMS320family’s 7MHz serial-port clock rate isthe fastest available at the presenttime. This limits the conversion time ofthe LTC1196/1198 to about 1µs. Full-speed operation can still be achievedwith 3V ASICs, PLDs or HC logic cir-cuits. Check the clock frequency andtiming specifications of your particularASIC or PLD.

The reference input can be drivenwith standard voltage references. By-passing the reference with at least0.1µF is recommended to keep thehigh-frequency impedance low. Somereferences require a small resistor inseries with the bypass cap for fre-quency stability. See the individualreference data sheets for details.

To achieve the full sampling rate,the analog input should be driven witha low-impedance source (<100Ω) or ahigh-speed op amp (e.g., the LT1223,LT1191, or LT1226). Higher-imped-ance sources or slower op amps caneasily be accommodated by allowingmore time between conversions for theanalog input to settle.

CONCLUSIONThe new LTC1196 and LTC1198

must be considered as an alternative tohalf-flash ADCs in high-speed dataacquisition systems because of theirhigh conversion speeds, small size, lowcost, low power consumption, and theirability to operate on both 3V and 5Vpower supplies.

DESIGN INFORMATION

–

+

1112_2.eps

–

+

–

+

R4 100Ω 0.5%

OUTPUT

R7 9.88k 0.5%

R9 200Ω

R5 100Ω 0.5%

R1 10k 1%

R3 2.1k 1%

R8 200Ω

R2 10k 1%

INPUT+

1/2 LT1112 OR

1/4 LT1114 A

LT1097 OR 1/4 LT1114 B OR C

GAIN = 1000

R6 10k 0.5%

R10 1M

C1 33pF

1/2 LT1112 OR

1/4 LT1114 D

INPUT–

TRIM R8 FOR GAIN TRIM R9 FOR DC COMMON MODE REJECTION TRIM R10 FOR AC COMMON MODE REJECTION

TYPICAL PERFORMANCE OF THE INSTRUMENTATION AMPLIFIER: INPUT OFFSET VOLTAGE = 40µV OFFSET VOLTAGE DRIFT = 0.3µV/°C INPUT BIAS CURRENT = 80pA INPUT OFFSET CURRENT = 100pA INPUT RESISTANCE = 800GΩ INPUT NOISE = 0.5µVP-P

Figure 2. Three op amp instrumentation amp with gain = 100

–

+

1112_4.eps

–

+

TOTAL SUPPLY CURRENT = 700µA. WORKS WITH BATTERIES DISCHARGED TO ±1.3V. AT ±1.5V: MAXIMUM LOAD CURRENT = 800µA; CAN BE INCREASED WITH OPTIONAL RX, RY; AT RX = RY = 750Ω LOAD CURRENT = 2mA. TEMPERATURE COEFFICIENT LIMITED BY REFERENCE = 20ppm/°C.

15k

1/2 LT1112

1/2 LT1112

LT1004-1.2 20k 0.1%

+0.617V

+1.5V

20k 0.1%

– 0.617V

100pF

RY (OPTIONAL)

–1.5V

RX (OPTIONAL)

Figure 3. Dual-output referenceoperates on two AA cells

LT1112/LT1114 to be powered by twonearly discharged AA cells (Table 3).

A dual-output, buffered referenceapplication is shown in Figure 3.

Figure 3 works on two AA batteries,which can be discharged to ±1.3V. Withtwo equal 20k resistors, two equal butopposite-sign reference voltages are

available. Changing the ratio of the two0.1% resistors allows for other values:one positive and one negative.

LTC1196/1198, continued from page 7

INPUT FREQUENCY, fIN (Hz)

EFFE

CTIV

E NU

MBE

R OF

BIT

S, E

NOBs

5

7

8

1k 100k 1M

1196_5. eps

010k

6

4

2

3

1

VCC = 3V fSAMPLE = 450kHz

VCC = 5V fSAMPLE = 1.2MHz

Figure 5. LTC1196/1198 ENOBsvs. input frequency


A 3.3V-powered MOSFET driver isnow available. The LTC1157 dual mi-cropower MOSFET driver makes it pos-sible to switch either supply- orground-referenced loads through a lowRDS(ON), N-channel switch. N-channelswitches are required at 3.3V becauseP-channel MOSFETs do not have guar-anteed RDS(ON) with VGS = 3.3V. TheLTC1157's internal charge pumpboosts the gate-drive voltage 5.4Vabove the positive rail (8.7V aboveground), fully enhancing a logic-level,N-channel MOSFET for 3.3V high-side switching applications.

The LTC1157 Dual 3.3VMicropower MOSFET Driver by Tim Skovmand

voltage to drive a logic-level, high-sideN-channel switch into full enhance-ment. This combination of a low RDS(ON)MOSFET switch and micropower gatedrive produces the maximum switchefficiency in 3.3V and 5V high-sideswitch applications.

Typical ApplicationsFigure 3 illustrates how two sur-

face-mount MOSFETs and theLTC1157 (also available in 8-pin SOpackaging) can be used to switch two3.3V loads. The gate rise and fall timesare typically in the tens of microsec-onds, but can be slowed by adding tworesistors and a capacitor, as shown onthe second channel. Slower rise andfall times are sometimes required toreduce the start-up current demandsof large supply capacitors, which mightotherwise glitch the main supply.

DESIGN INFORMATION

GATE-TO-SOURCE VOLTAGE (V)

DRAI

N-TO

-SOU

RCE

RESI

STAN

CE (Ω

)0.1

10

100

2.0 4.0 6.0 7.0

1157_2.eps

0.013.0 5.02.5 4.5 6.53.5 5.5

1

LTC1157 SUPPLY VOLTAGE 3.0V, 3.3V, 3.6V

Figure 2. RDS(ON) vs VGS for typicallogic level, N-channel MOSFET switch

Figure 1. Gate voltage above supplyvs. supply voltage

Figure 3. LTC1157 used to switch two 3.3V loadsSUPPLY VOLTAGE (V)

V GAT

E –

V S (V

)

2

8

12

2.0 4.0 6.0

1157_1.eps

03.0 5.02.5 4.53.5 5.5

6

10

4

1157_3.eps

IN1

IN2

G1

G2

VS

LTC1157

GND

µP OR CONTROL

LOGIC

3.3V LOAD

LARGE SUPPLY CAPACITOR

IRLR024

IRLR024

10µF

3.3V

3.3V LOAD

1k100k

0.1µF

+

+

Logic Level MOSFET SwitchesFigure 2 is a graph of RDS(ON) versus

VGS for a typical logic-level, N-channelMOSFET switch. The RDS(ON) dropsdramatically as the gate voltage istaken above the threshold voltage(1–2V) and begins to flatten off atabout 3.5V. Further gate drive doesnot significantly reduce the RDS(ON),because the MOSFET channel is al-ready fully enhanced. By mapping theLTC1157 supply voltage onto Figure2, it can be seen that the on-chipcharge pump produces ample gate

On-Chip Charge PumpThe charge pump is completely on-

chip and therefore requires no externalcomponents to generate the higher gatevoltage. Figure 1 is a graph of gatevoltage above supply versus supplyvoltage. The charge pump has beendesigned to be very efficient, requiringonly 3 microamps in the standby modeand 80 microamps while delivering 8.7Vto the power MOSFET gate. This makesthe LTC1157 particularly well suitedfor battery-powered applications, whichbenefit from micropower operation.


The LT1028 was introduced in 1986.With its 0.85nV/√Hz noise (less thanthat of a 50Ω resistor) it became thelowest voltage-noise op amp, wrestingthe title from the LT1007, which fea-tures noise of 2.5nV/√Hz. The LT1028combined minuscule noise withexcellent precision and high-speedspecifications (Table 1).

Six years later, the LT1028 is stillthe reigning low-noise champion. Inaddition, the LT1028 is now availablein the 8-pin small-outline surface-mount package—designated as theLT1028CS8. For many op amps, as-sembly shifts in the surface-mountpackages necessitate a loosening ofspecifications compared to other pack-ages. For the LT1028CS8, spec

relaxation is not necessary. The“C” designation indicates that theLT1028CS8’s specifications are iden-tical to the LT1028CH, LT1028CJ8,and LT1028CN8.

The LT1028 is stable in closed-loopgains of +2 or –1, not as a voltagefollower. At first glance, this shouldnever be a problem, since proper use ofthe LT1028 always involves amplifica-tion of microvolt-level signals to takeadvantage of its low noise. However, tooptimize noise, the bandwidth of theamplifier should be limited to the band-width of the signal being processed. Inmany applications, the only conve-nient means of limiting bandwidth isto connect a capacitor (CF) in parallelwith the feedback resistor. At highfrequencies this capacitor becomes ashort, requiring a unity-gain-stableamplifier.

Enter the LT1128The LT1028 is stable for many com-

binations of RS, RF, and CF. The LT1128,however, is unconditionally stable forall values of RS, RF, and CF.

Another example which requiresunity-gain stability is shown in

The World’s Lowest-Noise Op Amp isNow Available in 8-pin SO and in aUnity-Gain Stable Version by George Erdi

and Alexander StrongFigure 1. Here, a heavy capacitive load,CL, is isolated from the op amp’s outputby resistor R1. The extra phase shiftcaused by the R1, CL pole is eliminatedfrom consideration by the presence ofC1, which shorts the op amp’s outputto its input at high frequencies.

Op amp instrumentation amplifiersusually have op amps with a fixed gaingreater than one at the input stage(Figure 2). At low frequencies, decom-pensated op amps work well, but athigh frequencies and with one inputgrounded, the virtual ground begins tolose its integrity. As the frequency ofthe input signal increases, the ampli-tude at the virtual ground increases,making the virtual ground lookinductive, eventually requiring a unity-gain-stable amplifier. The LT1028 canbe made stable under these conditionswith bypass capacitors and a littleexperimenting, but the LT1128 is un-conditionally stable.

The LT1028/LT1128 team offers theuser excellent AC performance, un-conditional DC stability, and the low-est noise available in an op amp. All ofthese features are now available in theSO8 surface mount package.

Table 1. LT1028/LT1128 Comparison

LT1028A/ LT1028C/1128A 1128C Units

VOS 40 80 µV MaxTCVOS 0.8 1.0 µV/°C MaxIB ±90 ±180 nA Maxen 10kHz 1.0 1.0 nV/√Hz Typ

1kHz 0.85 0.9 nV/√Hz Typ1kHz (100% tested) 1.1 1.2 nV/√Hz Max

AVOL RL = 1k 5.0 5.0 V/µV MinSR 1028 11.0 11.0 V/µs Min

1128 5.0 4.5 V/µs MinGBW 1028 fo = 20kHz 50 50 MHz Min

1128 fo = 200kHz 13 11 MHz MinFigure 2. Three op amp, ultra-low noise instrumentation amplifier

1028_2.eps

–

+

RF

C1RS

LT1128R1

CL

1028_3.eps

–

+

–

+

–

+

10k300Ω

300Ω

820

56Ω

820

10k

LT1128

LT1128

LT1037AC SIGNAL INCREASES WITH

FREQUENCY AT THIS NODEGAIN = 1000

INPUT REFERRED NOISE = 1.5nV/√Hz at 1kHzWIDE BAND NOISE = 1.4µVRMS

IF BAND LIMITED TO DC TO 100kHz = 0.6µVRMSGAIN BANDWIDTH PRODUCT = 400MHz

AC VIN

Figure 1. Driving a heavy capacitive load

DESIGN INFORMATION


It is often convenient to control thegain of a video or intermediate fre-quency (IF) circuit with a voltage. TheLT1228, along with a suitable voltage-to-current converter circuit, forms aversatile gain-control building blockideal for many of these applications.In addition to gain control over videobandwidths, this circuit can add adifferential input and has sufficientoutput drive for 50Ω systems.

The transconductance of theLT1228 is inversely proportional toabsolute temperature at a rate of –0.33%/°C. For circuits using closed-loop gain control (i.e., IF or videoautomatic gain control) this tempera-ture coefficient does not present aproblem. However, open-loop gain-con-trol circuits that require accurate gainsmay require some compensation. Thecircuit described here uses a simplethermistor network in the voltage-to-current converter to achieve this com-pensation. Table 1 summarizes thecircuit’s performance.

A Temperature-Compensated,Voltage-Controlled-GainAmplifier Using the LT1228 by Frank Cox

Input Signal Range 0.5V – 3.0V pkDesired Output Voltage 1.0V pkFrequency Range 0Hz – 5MHzOperating Temperature Range 0°C – 50°CSupply Voltages ±15VOutput Load 150Ω (75Ω + 75Ω)Control Voltage vsGain Relationship 0V to 5V Min to Max GainGain VariationOver Temperature ±3% from Gain at 25°C

Table 1. Characteristics of example

Figure 1 shows the complete sche-matic of the gain-control amplifier.Please note that these componentchoices are not the only ones that willwork nor are they necessarily the best.This circuit is intended to demonstrateone approach out of many for this veryversatile part and, as always, thedesigner’s engineering judgment must

be fully engaged. Selection of thevalues for the input attenuator,gain-set resistor, and current-feedback-amplifier resistors is relatively straight-forward, although some iteration isusually necessary. For the best band-width, remember to keep the gain-setresistor, R1, as small as possible, andthe set current as large as possible

Figure 1. Differential-input, variable-gain amplifier

(with due regard for gain compression).The voltage-controlled current source(ISET) is detailed in the boxed section.

Several of these circuits have beenbuilt and tested using various gainoptions and different thermistor val-ues. Test results for one of thesecircuits are shown in Figure 2. Thegain error versus temperature for thiscircuit is well within the limit of ±3%.Compensation over a much wider rangeof temperatures or to tighter tolerancesis possible, but would generally re-quire more sophisticated methods,such as multiple thermistor networks.

The VCCS is a standard circuit withthe exception of the current-set resis-tor R5, which is made to have atemperature coefficient of –0.33%/°C.R6 sets the overall gain and is madeadjustable to trim out the initial toler-ance in the LT1228 gain characteristic.A resistor (RP) in parallel with the ther-mistor will tend, over a relatively smallrange, to linearize the change inresistance of the combination with tem-perature. RS trims the temperaturecoefficient of the network to the desiredvalue.

DESIGN IDEAS

Figure 2. Gain error for circuit in Figure 1plus temperature compensation circuit shownin Figure 3 (normalized to gain at 25°C)

1228_1. eps

VCON

–

++

–

+

–

ISET

R4 2k

–15V

RG 82.5

RF 750

R2 274

R3 274

R3A 10.7k

R2A 10.7k

3

2

7

54

gm

+

+15V

4.7µF

1

8

6

ROUT 75

RLOAD 75

CFA

+

R1 806

4.7µF

TEMPERATURE (°C)

–25–3

ERRO

R (%

)

–2

–1

1

2

4

5

–12.5 12.5 50 75

1228_5. eps

0 37.5 62.5

0

3

25

GAIN = 6dB

GAIN = 3dB

GAIN = –6dB


VCCS Design Steps1. Measure or obtain from the data

sheet the thermistor resistance atthree equally spaced temperatures(in this case 0°C, 25°C, and 50°C).Find RP from:

(R0 × R25 + R25 × R50 - 2 × R0 × R50)(R0 + R50 - 2 × R25)

where R0 = thermistor resistance at 0°CR25 = thermistor resistance at 25°CR50 = thermistor resistance at 50°C

2. Resistor RP is placed in parallelwith the thermistor. This networkhas a temperature dependencethat is approximately linear overthe range given (0°C–50°C).

3. The parallel combination of thethermistor and RP (RP||RT) has atemperature coefficient of resis-tance (temp. co.) given by:

4. The desired temp. co. to compen-sate the LT1228 gain tempera-ture dependence is –0.33%/°C.A series resistance (RS) is added tothe parallel network to trim itstemp. co. to the proper value. RS isgiven by:

where THIGH = the high temperatureTLOW = the low temperatureRT = the thermistor

5. R6 contributes to the resultanttemp and so is made large withrespect to R5.

6. The other resistors are calculatedto give the desired range of ISET.

This procedure was performed us-ing a variety of thermistors (onepossible source is BetaTHERM corpo-ration—phone 508-842-0516). Figure5 shows typical results reported aserrors normalized to a resistance witha –0.33%/°C temperature coefficient.As a practical matter, the thermistorneed only have about a 10% tolerancefor this gain accuracy. The sensitivityof the gain accuracy to the thermistortolerance is decreased by the linear-ization network, in the same ratio asis the temperature coefficient; Theroom temperature gain may betrimmed with R6. Of course, particu-lar applications require analysis ofaging stability, interchangeability,package style, cost, and the contribu-tions of the tolerances of the othercomponents in the circuit.

(temp. co. RP||RT)(0.33) × (RP||R25)-(RP||R25)

Voltage-Controlled Current Source (VCCS)with a Compensating Temperature Coefficient

RP =

temp. co. RP||RT = )((

DESIGN IDEAS

Figure 3. Voltage-controlled current source (VCCS) with acompensating temperature coefficient

VCON (V)

0

ISET (MIN)

5

1228_4. eps

I SET

ISET (MAX)

TEMPERATURE (°C)

–100

RESI

STAN

CE (Ω

)2k

4k

6k

8k

12k

14k

1228_3a. eps

0 10 20 30 40 50 60

10k

70

COMPENSATED NETWORK

THERMISTOR

Figure 6. Thermistor-network resistancenormalized to a resistor with exact–0.33%/°C temp. co.

TEMPERATURE (°C)

–60–12

ERRO

R (%

)

–10

–8

–4

–2

2

4

–40 0 40 80

1228_3b. eps

–20 20 60

–6

0

)

1228_2. eps

–

+LT1006

50pF

R6 266k

R7 2.26M

VCON

R5

RS 4320

RP 1780

RTVR

R8 150k 2N3906

ISET

ISET =R6 VC VRR5 R8 R7

+

2.2k3A1

VR = REF VoHoge

Figure 5. Thermistor and thermistornetwork resistance vs. temperature

Figure 4. Voltage control of ISET withtemperature compensation

R0||RP - R50||RP 100R25||RP THIGH - TLOW


0

SHUTDOWN 5V/DIV

0

VPP 5V/DIV

Nonvolatile “flash” memories requirea well-controlled 12V bias (VPP) forprogramming. The tolerance on VPP is±5% for 12V memories. Excursions inVPP above 14V or below –0.3V aredestructive. VPP is often generated witha boost regulator whose output followsthe input supply when shut down. It issometimes desirable to force VPP to 0Vwhen the memory is not in use or inread-only mode.

The circuit in Figure 1 generates asmoothly rising 12V, 60mA supply thatdrops to 0V under logic control. Shortlyafter driving the SHUTDOWN pin high,

Even with the additional losses in-troduced by Q1, efficiency is 83% witha 60mA load. Line and load regulationare both less than 1%. Output ripple isabout 100mV under light loads. Qui-escent current drops to 400µA whenshut down. All components shown inFigure 1 are available in surface mountpackages, making the circuit well suitedfor flash memory cards and other ap-plications where minimizing pc-boardspace is critical.

Flash-Memory VPP GeneratorShuts Down with 0V Output by Sean Gold

DESIGN IDEAS

the LT1109-12 switching regulatordrives L1, producing high-voltagepulses at the device’s switch pin (Fig-ure 2). The 1N5818 Schottky dioderectifies these pulses and charges areservoir capacitor C2. Q1 functionsas a low-on-resistance pass element.The 1N4148 diode clamps Q1 for re-verse voltage protection. The circuitdoes not overshoot or display unrulydynamics, because the regulator getsits DC feedback directly from the out-put at Q1’s collector. Minor slew aber-rations are due to Q1’s switchingcharacteristics.

1109a_1.eps

GND

VINSW

LT1109A-12

VPP 12V AT 60mA

1N5818

4.5 < VIN < 5.5

SHUTDOWN PROGRAM

SHUTDOWN

33µH

C3 1µF

C1 22µF

1N4148

SENSE

C2 22µF

Q1 2N4403

5kΩ

Figure 1. Boost-mode switching regulator with low R-on pass transistorfor flash-memory programming

LCD Bias Supply by Steve Pietkiewicz

regulation is less than 0.2% from 3.3Vto 2V inputs. Although load regulationsuffers somewhat becausethe –24V output is not directlyregulated, it measures 2% forloads from 1mA to 7mA. Thecircuit will deliver 7mA from a2V input at 75% efficiency.

An LCD requires a bias supply forcontrast control. The supply’s variablenegative output permits adjustment ofdisplay contrast. Relatively little poweris involved, easing RF radiation andefficiency requirements. An LCD biasgenerator is shown in Figure 1. In thiscircuit, U1 is an LT1173 micropowerDC-to-DC converter. The 3V input isconverted to +24V by U1’s switch, L2,D1, and C1. The switch pin (SW1) alsodrives a charge pump composed of C2,C3, D2, and D3 to generate –24V. Line

+

3V 2 AA CELL

R1 100

OPERATE SHUTDOWN

* TOKO 262LYF-0092K

D4 1N4148 C3

22µF

R2 120k

R4 2.21M

C1 0.1µF

C2 4.7µF

D3 1N5818

D2 1N5818

OUTPUT –12V TO –24V

L1* 100µH

1173_1.eps

U1 LT1173

ILIM VIN

SW1

FBSW2GND

×

D1 1N5818

R3 100k

+

OUTPUT +12V TO +24V

Figure 2. Input and output waveforms for theflash-memory programming circuit

Figure 1. DC to DC Converter Generates LCD Bias


New Device CameosLT1201/LT1202: High-Speed,Low-Power, Dual and QuadOperational Amplifiers

The LT1201 is a dual version of theLT1200 high-speed, low-power opera-tional amplifier; the LT1202 is a quadversion. Each unity-gain-stable am-plifier has an 11MHz gain bandwidth,50V/µs slew rate, and 430ns settlingtime to 0.1% (10V step), and drawsonly 1mA of quiescent supply current.The LT1201/1202 are ideal choicesfor applications where power consump-tion and board space must be mini-mized. With 1mV maximum offsetvoltage, 100nA maximum offset cur-rent, and 8V/mV open-loop gain com-bined with fast settling, the LT1201/1202 are excellent choices for fastdata-acquisition systems.

Each amplifier can drive a 2kΩ loadto ±12V from a ±15V supply and candrive 500Ω to ±3V on ±5V supplies.The amplifiers are stable with all ca-pacitive loads, which makes them use-ful as buffers or for driving A-to-Dconverters. Wideband active filters areanother excellent application, espe-cially where power consumption iscritical due to battery operation.

The LT1201 comes in the industry-standard pinout in 8-lead plasticmini-DIP or 8-lead, small-outline sur-face-mount package. The LT1202comes in 14-lead plastic DIP.

LT1208/LT1209: 50MHz,400V/µs Dual and QuadOperational Amplifiers

The LT1208 is a dual version of theLT1224 high-speed operational am-plifier; the LT1209 is a quad version.Each amplifier is unity-gain stablewith 50MHz gain bandwidth, 400V/µsslew rate, 90ns settling time to 0.1%(10V step), and 7mA of supply current.The LT1208 and LT1209 are idealchoices for applications where highspeed is essential and board spacemust be minimized.

The LT1208/1209 DC specificationsinclude 2mV maximum offset voltage,400nA maximum offset current, and

The LTC1154 High-Side,Microprocessor-Compatible,Micropower MOSFET Driver

The LTC1154 single micropower gatedriver is designed to drive a standardN-channel power MOSFET in a high-side switch configuration. The LTC1154contains an on-chip charge pump sothat less expensive, lower RDS(ON) N-channel MOSFETs can be used in placeof P-channel switches. The charge pumprequires no external components andhas been designed to be very efficient,requiring only microamps to operate.

All of the circuitry to drive, control,and protect the power MOSFET andload, and to interface to a host micro-processor, are provided by theLTC1154. The input is compatible withboth TTL and CMOS logic families andthe standby current with the inputswitched off is only 8 microamps froma 5V supply. The quiescent currentrises to 85 microamps when the switchis turned on and the charge pump isproducing 12V from a 5V supply. Anactive-low enable input is provided tocontrol multiple LTC1154 switches inbanks. An open-drain status output isprovided to advise the microprocessorwhen a fault condition exists at theoutput of the switch. If an over-currentcondition is detected at the drain end ofthe power MOSFET, the output islatched off and the status pin is pulledlow. A built-in 10-microsecond delayensures that the LTC1154 protectioncircuitry is not false triggered by tran-sient load or power-supply conditions.A longer RC delay can be added exter-nally to accommodate loads with largetransient start-up current require-ments, such as lamps or DC motors.

The versatile microprocessor inter-face, coupled with the comprehensiveprotection features and micropoweroperation, make the LTC1154 the idealchoice for applications that requiremaximum efficiency and protection ona lean power budget. And the 8-leadSO packaging makes it the ideal choicefor applications with a lean board-space budget.

7V/mV open-loop gain. The outputscan drive a 500Ω load to ±12V with a±15V supply and can drive 150Ω to±3V on a ±5V supply.

The amplifiers are stable with allcapacitive loads, which makes themuseful as buffers or in cable-drivingapplications. The excellent settling timelends itself to data-acquisition appli-cations, such as DAC current-to-volt-age converters and A-to-D inputbuffers. Other applications includewide-band active filters, RF amplifica-tion, and video amplifiers.

The LT1208 comes in the industry-standard pinout in an 8-lead plasticmini-DIP or 8-lead small-outline sur-face-mount package. The LT1209comes in 14-lead plastic DIP.

The LTC1250 Very-Low-NoiseBridge Op Amp

The LTC1250 is a zero-drift op ampoptimized for use with bridge trans-ducers. It features typical 0.1Hz–10Hznoise of 0.65µVP–P and 0.1Hz–1Hznoise of 0.2µVP–P, making it ideal foruse with low noise, low frequency sig-nals. The LTC1250’s 10µV maximumoffset, 50nV/°C maximum drift, and±150pA maximum bias currents keepDC errors negligible. The zero-driftloop samples the input at 5kHz, allow-ing signals up to 2.5kHz to be ampli-fied with no aliasing. All of the zero-driftcircuitry is integrated on-chip, allow-ing the LTC1250 to plug into standardop-amp sockets with no additionalexternal components.

The LTC1250 has an enhancedCMOS output stage capable of swing-ing ±4V into 1kΩ with ±5V supplies; itwill swing to within millivolts of the railinto lighter loads. 10V/µs slew rateand 1.5MHz gain bandwidth allow theLTC1250 to track input transients.The inputs recover from overload in1.5ms, many times faster than stan-dard zero-drift op amps with externalcapacitors. The LTC1250 is ideallysuited for electronic scales, pressuretransducers, and low-frequency digi-tizing applications.

NEW DEVICE CAMEOS


LT1269: 4A, 100kHz, High-Efficiency Switching Regulator

A new integrated switchingregulator IC, the LT1269, allows high-efficiency converters to be constructedusing smaller inductors than were re-quired with previous devices.

Similar to the LT1271 and othermembers of LTC’s 5-pin integratedswitching-regulator family, the LT1269contains a 100kHz current-mode PWMcontrol section, a fully integrated 4Ahigh-efficiency switch, and fault pro-tection on a single chip. It can beoperated in all standard switching con-figurations, including buck (step-down), boost (step-up), flyback,inverting, and others.

Used with a companion control chip,the LT1432, the LT1269 can be used tomake a very-high-efficiency 5V step-down regulator for use with the typicalNiCad and Nickel-Hydride batterypacks used in portable computers. Inaddition to providing high efficiency(≈ 90%) at load currents of 1A andbeyond, the device, when used with theLT1432, accomplishes the difficult taskof maintaining high efficiency underlow power-demand conditions. Suchconditions are encountered in portablecomputers when power-managementschemes such as “suspend-mode” areemployed.

A 3.3V version of the LT1432 thatallows the LT1269 to be used to gener-ate 3.3V logic supplies with highefficiency is now available (see below).The LT1269 comes in a 5-lead TO-220and a 5-lead DD surface-mount pack-age is planned for future release.

LT1432: 3.3 High-Efficiency,Step-Down Switching-Regulator Controller

The LT1432-3.3 is an 8-pin controlchip designed to work in conjunc-tion with LTC’s family of 5-pinintegrated switching regulators tomake very-high-efficiency 3.3Vswitching regulators with advancedpower-management capability.

High efficiency at nominal outputcurrents from 0.1A to over 3A isachieved by employing one of LTC’sLT1070 family of low-loss switching

regulators in buck mode, while usingthe LT1432-3.3 for feedback signalconditioning. Portable, battery-poweredsystems achieve significant power sav-ings for increased battery life by usingan idle or “suspend” mode when thesystem is not actively in use. Notebookcomputers typically employ such apower-saving scheme. In the suspendmode, when output load demand islight, the LT1432-3.3 can place themain regulator into a “burst” mode tomaintain high efficiency at low loadcurrents (0 to 50mA). A logic-compat-ible shutdown pin is included that,when taken high, shuts the entire regu-lator down.

The LT1432-3.3 is offered in an8-lead SOIC package and an 8-pinmini-DIP.

LT1129: 700mA Low-Iq,Low-Dropout Regulator

The LT1129 is a low-dropout regu-lator with ultra-low quiescent currentand shutdown current. The device cansupply over 700mA of output currentwith a dropout voltage of 0.4V at maxi-mum output. The low 50µA quiescentcurrent in operating mode and 30µA inshutdown mode is perfect for batterypowered operation. This quiescent cur-rent does not rise in the dropout regionas it does with other low-dropout PNPregulators.

Other features of the LT1129 in-clude the ability to operate withsmall output capacitors. Stability isguaranteed with only 3.3µF of outputcapacitance, whereas other low-drop-out regulators require as much as100µF. The input of the LT1129 may beconnected to ground, or reverse inputvoltages may be applied without cur-rent flow from the output to the input.This makes LT1129 ideal for back-uppower applications where the output isheld high while the input is at ground.

The device is available in 5-lead TO-220 and surface mount DD packages.

New PublicationsAN49: Illumination Circuitry for

Liquid Crystal Displays (Tripping theLight Fantastic...) Liquid crystal dis-plays have become almost universal in

NEW DEVICE CAMEOS

For further information onthe above or any other devicesmentioned in this issue of LinearTechnology, use the reader servicecard or call the LTC literature-service number: (800) 637-5545.Ask for the pertinent data sheetsand application notes.

Information furnished by Linear Technology Cor-poration is believed to be accurate and reliable.However, no responsibility is assumed for its use.Linear Technology makes no representation thatthe circuits described herein will not infringe onexisting patent rights.

portable instruments and computers.In dimly lit environments some form ofbacklighting is required to make theLCD panel readable. The preferred lightsource is a cold-cathode fluorescentlamp, otherwise known as a “CCFL.”

CCFLs are relatively efficient lightsources, but they require special powersupplies to develop high starting andrunning voltages (up to 1kV). AN49explains the nature of the CCFL as aload, and tells how to design a suitablepower supply.

The circuits described in AN49 pre-serve the overall efficiency of the CCFLto extend battery life in portable sys-tems and eliminate “hot spots” insidethe product.

AN51: Power Conditioning forNotebook and Palmtop Systems Note-book and palmtop systems need amultiplicity of regulated voltages de-veloped from a single battery. Smallsize, light weight, and high efficiencyare mandatory for competitive solu-tions in this area. Small increases inefficiency extend battery life, makingthe final product much more usablewith no increase in weight. Addition-ally, high efficiency minimizes the heatsinks needed on the power-regulatingcomponents, further reducing systemweight and size.

AN51 presents a collection of twentycircuits that represent state-of-the-artsolutions to power-supply problems inportable computing products. Thesecircuits were designed for high effi-ciency and small size, and cover everyrequirement from battery charging toLCD-bias generation.


LINEAR TECHNOLOGY CORPORATION1630 McCarthy BoulevardMilpitas, CA 95035-7487

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© 1992 Linear Technology Corporation/ Printed in U.S.A./20K

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DESIGN TOOLSApplications on DiskNOISE DISKThis IBM-PC (or compatible) progam allows the user tocalculate circuit noise using LTC op amps, determine thebest LTC op amp for a low noise application, display thenoise data for LTC op amps, calculate resistor noise, andcalculate noise using specs for any op amp.Available at no charge.

SPICE MACROMODEL DISKThis IBM-PC (or compatible) high density diskette containsthe library of LTC op amp SPICE macromodels. Themodels can be used with any version of SPICE for generalanalog circuit simulations. The diskette also contains work-ing circuit examples using the models, and a demonstrationcopy of PSPICETM by MicroSim.Available at no charge.

Technical Books1990 Linear Databook — This 1,440 page collectionof data sheets covers op amps, voltage regulators,references, comparators, filters, PWMs, data conversionand interface products (bipolar and CMOS), in both com-mercial and military grades. The catalog features well over300 devices.$10.00

1992 Linear Databook Supplement — This 1248 pagesupplement to the 1990 Linear Databook is a collection ofall products introduced since then. The catalog contains fulldata sheets for over 140 devices. The 1992 Linear DatabookSupplement is a companion to the 1990 Linear Databook,which should not be discarded.$10.00

Linear Applications Handbook — 928 pages full ofapplication ideas covered in depth by 40 Application Notesand 33 Design Notes. This catalog covers a broad range of“real world” linear circuitry. In addition to detailed, systems-oriented circuits, this handbook contains broad tutorialcontent together with liberal use of schematics and scopephotography. A special feature in this edition includes a 22-page section on SPICE macromodels.$20.00

Monolithic Filter Handbook — This 232 page book comeswith a disk which runs on PCs. Together, the book and diskassist in the selection, design and implementation of theright switched capacitor filter circuit. The disk containsstandard filter responses as well as a custom mode. Thehandbook contains over 20 data sheets, Design Notes andApplication Notes.$40.00

SwitcherCAD Handbook — This 144 page manual, in-cluding disk, guides the user through SwitcherCAD – apowerful PC software tool which aids in the design andoptimization of switching regulators. The program can cutdays off the design cycle by selecting topologies, calculat-ing operating points and specifying component values andmanufacturer's part numbers.$20.00

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