sch_v13
DESCRIPTION
Un programa con sistema operativo distintoTRANSCRIPT
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FOR U212,21,23,25,33,44,54,56,63 PINS
(U2 pin8) (U2 pin34)(U2 pin4)
FOR U2 26 PIN
(U2 pin40)
PL-2501 DEMO BOARD 1.3
PL2501 64-PIN LQFP
B
1 2Thursday, June 19, 2003
Title
Size Document Number Rev
Date: Sheet of
VBUS_ADN_ADP_A
DP_B
VBUS_BDN_B
VBUS_B USBVCC_BUSBVCC_AVBUS_A
XSCO_A
XSCO_A
USBVCC_B
XSCI_A
XSCI_B
XSCI_BXSCO_B
XSCO_B
XSCI_A
USBVCC_A P1_0
P1_1
RREF_BDN_BDP_B
R
P
U
_
B
D
M
R
S
_
B
D
P
R
S
_
B
RREF_ADN_ADP_A
P
3
_
5
D
P
R
S
_
A
D
M
R
S
_
A
R
P
U
_
A
P
3
_
1
P
3
_
4
P
3
_
0
USB_VIN
V
C
C
3
.
3
V
V
C
C
3
.
3
V
V
C
C
3
.
3
V
VCC2.5V
VCC2.5V
VCC3.3V
VCC3.3VVCC2.5V
VCC2.5V
VCC3.3V
V
C
C
3
.
3
V
V
C
C
3
.
3
V
V
C
C
3
.
3
V
VCC3.3V VCC3.3V
USB_VIN
VCC2.5V VCC2.5VVCC2.5V VCC2.5V
VCC2.5V
VCC2.5V
USB_VINVCC3.3V
U2
PL2501_64 LQFP
123456789
10111213141516
1
7
1
8
1
9
2
0
2
1
2
2
2
3
2
4
2
5
2
6
2
7
2
8
2
9
3
0
3
1
3
2
33343536373839404142434445464748
4
9
5
0
5
1
5
2
5
3
5
4
5
5
5
6
5
7
5
8
5
9
6
0
6
1
6
2
6
3
6
4
P1_0USBVCC_AP1_1VCCKGNDKNCNCVCCKGNDKXSCI_BXSCO_BAVCC1_BAGND1_BRREF_BDN_BDP_B
A
G
N
D
2
_
B
R
P
U
_
B
D
M
R
S
_
B
D
P
R
S
_
B
A
V
C
C
2
_
B
A
G
N
D
3
_
B
A
V
C
C
3
_
B
R
E
G
_
G
N
D
R
E
G
_
V
I
R
E
G
_
V
O
G
N
D
K
N
C
N
C
N
C
N
C
N
C
VCCVCCK
USBVCC_BRESETJ
GNDKTEST
EX_CLKVCCKGNDK
XSCI_AXSCO_A
AVCC1_AAGND1_A
RREF_ADN_ADP_A
N
C
A
G
N
D
2
_
A
R
P
U
_
A
D
M
R
S
_
A
D
P
R
S
_
A
A
V
C
C
2
_
A
A
G
N
D
3
_
A
A
V
C
C
3
_
A
N
C
N
C
P
3
_
5
G
N
D
K
P
3
_
4
P
3
_
1
V
C
C
P
3
_
0
C10
68PF/0603
R1
100/0603
C3
10pF/0603
Y112 MHz/DIP
C190.1U/0603
C200.1U/0603
C210.1U/0603
C220.1U/0603
C230.1U/0603
C240.1U/0603
C9
0.01U/0603
C250.1U/0603
C260.1U/0603
C6
10UF/10V/0805
C270.1U/0603
JP2
USB TYPE A
12345
C11
0.01U/0603
C1
10pF/0603
C12
68PF/0603
C5
0.1U/0603
R2
100/0603
C2
10pF/0603U1UTC UR133A-3.3V-C
3
1
2OUT
G
N
D
IN
DS1
RB501V-40/0805
JP1
USB TYPE A
12345
C13
0.01U/0603
C1810UF/10V/0805
DS2
RB501V-40/0805
C8
10pF/0603
C16
68PF/0603
C7
0.1U/0603
R4
100K/0603
C15
0.01U/0603
Y212 MHz/DIP
C14
68PF/0603
R3
100K/0603
C410UF/10V/0805
C17
0.1U/0603
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
(SDA)
(SCL)
LED_TRAN
YELLOW
LED_CNNT GREEN
RED
POWER
P1_1 P1_0
Note : 1. B version chip support select mode setting by hardware or EEPROM .2. EEPROM settings overrides hardware select mode.3. The chip's default setting is PL-2501 mode.
NetworkDataTransfer Put R14Put R10
Put R10 Put R15
B Version
C Version
R16,R1915K12.1K
For B, C Version Chip
PL-2501 DEMO BOARD 1.3
PL-2501 64-PIN LQFP
B
2 2Thursday, June 19, 2003
Title
Size Document Number Rev
Date: Sheet of
P1_1
P1_0
DN_B
DP_B
DN_A
DPRS_A
DMRS_A DMRS_B
DPRS_BDP_A
RREF_A
RREF_B
RPU_BRPU_A
P3_5
P3_4
P3_0
P3_1VCC3.3V
VCC3.3V VCC3.3V
VCC3.3V
VCC3.3V
VCC3.3V
USB_VIN
R19
12.1K/0603
R7
4.7K/0603
R21
39/0603
R6
4.7K/0603
R17
39/0603
U3
2402/SO8
1
2
3
4
8
7
6
5
A0
A1
A2
GND
VCC
NC
SCL
SDA
R13
1.5K/0603
R5
180/0603
R14
4.7K/0603
R20
39/0603
D1
LED/DIP
D3
LED/DIP
R8
180/0603
C28
0.1u/0603
D2
LED/DIP
R9
300/0603
R12
1.5K/0603R11
( 4.7K/0603 )
R15
( 4.7K/0603 )
R16
12.1K/0603
R10
4.7K/0603
R18
39/0603