saturation ct because of dc offset

7/28/2019 saturation CT because of DC offset

1/20

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Example 1:

A 1200/5, C400 CT with excitation curves shown on above figure, is connected to a

2.0 burden. Based on the accuracy classification, what is the maximum symmetrical

fault current that may be applied to this CT without exceeding a 10% ratio error?

Answer:

Based on the criteria that the CT can deliver 20 times rated secondary current

without exceeding a 10% ratio error, the maximum fault current will be 24000A.

However, with a 2.0 burden, this will result in a voltage below the knee point of the CT

and, as a practical matter, it will be within 10% accuracy at higher currents. This can onlybe accurately determined from excitation or ratio correction curves and not from the

accuracy classification. For example, a CT with characteristics shown in above figure

will produce between 180-240A without exceeding the 10% ratio error, depending on the

power factor of the 2.0 burden.


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Example 2:

A 1200/5, C400 CT is connected on the 1000/5 tap. What is the maximum secondary

burden that can be used and still maintain rated accuracy at 20 times rated symmetrical

secondary current?

Answer:

Since the secondary voltage capability is directly proportional to the connected tap, the

CT will support a voltage of 1000/1200400V or 333V. Twenty times the rated

secondary current is 100A. Therefore, the maximum burden is 333V/100A or 3.33

Example 3:

Assume that secondary burden in a relay circuit is 5. The relay setting is 2A and the CT

ratio is 300/5. Using above figure, calculate the primary current required to operate the

relay?

Answer:

VB=5 times 2A=10V

The secondary exciting current from above figure is approximately 0.04A.

)( STP INI

)( SE IIN

= 300/5(0.04+2) A=122A

Example 4:

A relay is expected to operate for a 7000A primary current. The CT ratio is 600/5.

Secondary burden is 3.5 . What is the error for the CT shown in above figure?

Answer:

The total secondary fault current is (7000/600)5=58A. Assume that exciting current is

negligible.


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3

)( SBSS RRIV

= 58(3.5+0.31)

= 221V

The exciting current will not be negligible, however, and the calculation will not be

iterated.

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4/20

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5/20

5

CT saturation and DC- offset current

Role of DC off-set current

Typically fault current consists a symmetrical ac component and a dc offset current. To

understand this concept, consider a transmission line unloaded exited by an equivalent voltage

source. The fault strikes at time0tt . This can be simulated by closing the switch at 1tt

LjR

or

Z models the line impedance. The fault current in the line is given by

0)( ti 00 tt

0

0||

)sin()(

tt

m eIZ

tVti 0tt

Where is the time constant of the line =L/R. The faul t current has two components in

it. The first component models the steady state sinusoidal ac response while the second current

is the dc offset current due to the presence of inductive component in the circuit. Recall that

current in an inductance can not change instantaneously. As t, the instantaneous dc

current, a consequence of maintaining initial condition )()( 00 titi , decays exponentially to

zero and the current reaches the ac steady state values. While the dc offset current, would in


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6

theory persist till infinity, its trace in the actual wave form would not be seen beyond a certain

time constants. Table-I illustrates the values of t

e

up to 10 time constants.

Time t = 0 t = t = 2 t = 4 t = 6 t = 8 t = 10

t

e

1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants.

The value ofI0 can be worked out by setting the current at ott to zero.

This implies that

)sin( 00 tZ

VI m

Thus

)( 0

)sin()sin()(

tt

mm etZ

Vt

Z

Vti

fig.2

Clearly, the peak value of dc offset current depends upon

Time at which fault strikesPhase angle of ac voltage


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7

Z & of transmission line

Figure 2 shows the waveforms of

a)

symmetrical ac componentb) dc offset currentc) total current for various values of , &

0t

It can be seen that severity of dc offset component in fault current is maximum when

a)

b)2

0

t

For example, if angle of transmission line is 800, then with = 80

0&

50220

t

=200

1sec = 5msec, the severity of dc offset current would equal

Z

VI m0 , which is also the

peak value of symmetrical ac component of the current. This leads us to an important

conclusion. Viz. peak value

1) dc offset current can be as high as the symmetrical ac peak2) The dc offset current can be positive or negative (see fig2)3) Dc offset current may be totally absent

eg. If , 00 t

4) While, in above analysis, we have considered a single phase current, a 3 fault on a 3transmission line would always induce dc offset current in atleast 2 phases.

In the remaining lecture, we analyze the effect of dc offset current on CT performance.

DC- offset current and CT saturation


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8

We now plan to show that CT can saturate on dc offset current. Also, we plan to show

that the resulting distortions in the CT secondary current can be un-acceptably high. While

doing this analysis, we will neglect ac symmetrical component. In other words, we rest our

belief in superposition theorem atleast qualitatively and will finally evaluate effect using it

Notice that the current that we are dealing with is non-linear, a rigorous application of super

position theorem is simply out of question.

First consider an ideal CT excited by the dc offset current source. An ideal CT will faithfully

replicates primary current waveform on the secondary side. Hence, the secondary current

would be given by

t

eN

Iti

02 )(

and the voltage developed across CT secondary would be given by

t

eN

RItv

02 )( where1

2

N

NN

Typical voltage waveform is shown in fig. (5)


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9

For simplicity, let us assume that the initial flux in the transformer core at t=0 is

zero 0)0( ; Then we can compute the flux in the transformer core by using faradays law

dtdNV 22 ---------(2)

t

dtvt0

2)0()(

t

eN

RI1

2

0

)1(2

0

t

eN

LI

)1()0()(2

0

t

eN

LIt

)1(2

0

t

eN

LI

------- (3)

as a consequence of dc offset current,

Thus, flux in the core increases exponentially to a peak value of

2

0max

N

LIcd as t

Z

V

N

L m Z

Vm maxcd


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10

Note that unlike ac voltage induced flux, which is sinusoidal, this flux is unidirectional. The ac

voltage induced flux has zero average value. However, dc offset induced does not have this

nice feature. The total flux in ideal CT core is a summation of ac flux and dc flux.

The ac flux in the CT core can be obtained by substituting operatordt

dby j . Hence

phasor relationship between phase2

V & ac is given by

2

2

Nj

V

If 2( ) sin( )mv t V t , then

)2

sin(2

t

N

Vmac

The peak value of ac flux is given by

2

max

N

Vmac

However max02IRVm

Hence2

max

02max

N

IRac

and peak value of the total flux is given by

2

max

0

2

maxmax

N

LI

N

Vmdcac

In practice, if this flux exceeds the knee-point flux in the core (see fig.), then the CT core

will saturate.


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11

As a consequence of CT core saturation, the secondary current would not faithfully replicate

the primary current. Infact, in practice it is observed that CT secondary current is clipped. The

clipping ofCT current leads to blinding of the relay which cannot function further. Hence,

CT saturation in presence of dc offset current is a serious problem which relay designers have

to face. Note that dc flux accumulates gradually. (Depends upon the transmission line time

constant ( ). It is apparent that saturation should not occur immediately after the inception of

the fault. Thus, if the relay is fast enough in decision making, it is likely that a relaying

decision would be undertaken before the CT fully saturates. This is another important reason

for increasing the speed of relaying system. For bus-fault protection, where the dc saturation

due to dc offset current can be a significant contributing factor, quarter cycle operations *****

specifically are imposed. Similarly, a distance relay is expected to operate within -1 cycle

time.

CT oversizing factors

Typically, an efficient design of transformer would correspond to choosing the core

cross section such that acm should be near the knee point of B-H curve. One obvious way of

avoiding the CT saturation on dc flux is to oversize the core so that for flux )(maxmax

dcac , the

corresponding B is below the knee-point. Hence, the factor max

maxmax)(

ac

dcac

is called core-

oversizing factor.


12/20

12

Core-oversizing factor =max

max

1

ac

dc

20

21

NRI

NLIo

R

L1

R

X 1

Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line X/R 10.

This would imply that transformer core should be oversized by a factor of 11. For a 400KV

line, typical value of X/R 20. This would imply an oversizing required of about 21 times the

usual design. Clearly this high amount of oversizing is not practical. Thus, the important

conclusion is that, protection engineers have to live with the saturation problem.

Cautions in CT selection:

While choosing a CT for a particular application, it is necessary to observe following

precautions.

1. The CT rating and continuous load current should match. For example, if max loadcurrent is 90A, a 100:5 Ct may be acceptable but 50:5 is not acceptable.

2. The maximum fault current should be less than 20 times the CT rated current. forexample 100:5 CT can be used, so long as burden on the CT & maximum primary fault

current is below 2000A.

3. The voltage rating of CT should be compatible. For example, 100:5 C100 would givelinear response, upto 20 times rated current provided CT burden is kept

below(100/20*5=1 ). With 2 burden, this CT can be used only if maximum current

is limited to 1000A.

4. Parallel of CTs e.g. in differential protection, or with SLG fault can create significanterrors in CT performance. One should in general ascertain that magnetizing current is

kept much below the pick up value.

Following example, illustrates this point

Exercise problems:


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13

If the current ratio is adequate for a protection, but CT burden is high; then the

performance of CT may deteriorate due to large magnetizing current and/or saturation problem.

The CT performance can be improved by connecting the CTs in series.

1) Show the dotted terminals for correct secondary series connection2) What is the VA of CT in fig (a) & (b) respectively?1) Electromechanical relays tend to saturate at high currents. This reduces the relay burden

on CT, and so that the CT performance at moderately high currents may be considered

better than at relays rated burden at 5A.

2) Use of instantaneous over current relays has the potential to overcome this problem ofsaturation of CTs

3) Differential protection can operate on external faults due to the un equal saturation ofCTs

Lecture-6

Examples

6. If a 300:5 class C CT is connected to a meter with resistance 1IR andsecondary current in the CT is 4.5A find out the primary current voltage

developed across the meter and % rate error. Lead wire resistance

02.0LR secondary resistance SR of a 300/5 CT 15.0

Diagram

1IR , 02.0LR 15.0SR AIS 5.4

Total secondary resistance SLIT RRRR

17.1 Secondary voltage TS RI

17.15.4

V265.5

From Fig 5.7,


14/20

14

Exciting current IE for 5.265V

= 0.03A

Turns ratio N = 300/5 = 60

)( ESp IINI

= 60(4.5 + 0.03)

= 271.8AVoltage across meter IS RI

14.5 = 4.5V

Ratio error 1005.4

03.0100

S

E

I

I

= 0.67%

bR


15/20

15

Lecture8

Examples

1. Design a CCVT for a 132kV transmission line using the following data.Resistive Burden VA150)3(

Hzf 3 , phase angle error= 40 minConsider 4 choices of V2 as 33kV, 11kV, 6.6kV and 3.3kV

Diagram 1 Diagram 2Transmission line voltage V = 132kV. Suppose V2 (P_N) be the voltage to be

produced by the capacitive potential divider with capacitance values C1 and C2and L the value of tuning inductor. The standardized VT secondary voltage is 110

volts (L-L).

Here specification for phase angle error is 40 minutes variation in frequency

can be upto Hzf 3 . Phase angle error for change in by in the above

equation circuit, is given by

)1

( 2CL

At tuning frequencyLC

12

Substituting 2 1LC

Phase angle error )( LL

L2

% phase angle error bRa

L2

2 --- (1)

Using this equation the value L for different values of V2 is found out.

1) Let V2 be 33kV (L - N)2

2

'

3150

b

V

R

52' 108.217bb RaR

322 f

rad01164.060180

40min40

From eqn (1)

322

108.21701164.0

2

5'

bRL

H2.6722

FFL

CC

39

2211051.11051.1

1

2) )(112 NLkVV 3 2

' 43 (11 10 ) 242 10150

bR


16/20

16

' 40.01164 242 10

2 2 2 3

bRL

H2.747

2.747)4/3(

112221

L

CC

F21036.1

3) kVV 6.62 3 2

' 3 (6.6 10 )

150bR

41012.87 ' 4

0.01164 87.12 10

2 2 2 3

bRL

,269H

FCC 221 1077.3

4) kVV 3.32 3 2

' 3 (3.3 10 )

150b

R

41078.21 ' 40.01164 21.78 10

2 2 2 3

bR

L

H25.67

1 2 0.151C C F

The values of L, 21 CC for different values of V2 are tabulated below.

V2 L 21 CC 33kV 6722.2H 0.00151 F

11kV 747.2H 0.0136 F

6.6kV 269H 0.0377 F

3.3kV 67.25H 0.151 F

From the above table it is clear that smaller the value of V2, the smaller is thevalue of L and higher the value of C1 and C2 for tuning condition. If we select too low

value of V2 and L then capacitance values will be beyond available limits, and if we

select higher value of V2 and L, then CCVT and inductor will become bulky. So a

compromise is necessary and let us select V2 = 6.6kVFor V2 = 6.6kV

L = 269H

FCC 0377.021

Now,1

21

2 C

CC

V

V


17/20

17

1

6

3

3 100377.0

106.63

10132

C

3

63

110132

10106.630377.0

F

C

F0033.0 FC 0344.02

In this design, we explained the basic concept for CCVT design and we assumed

the transformer to be ideal. But in actual design practice the value of magnetizing

impedance of transformer, resistance of reactor etc have to be taken into account,

as ratio error and phase angle error will also get affected by these values.

2. DiagramThe equivalent circuit of a CCVT is shown in fig 8.3. The values of C1 and C2 are

0.0018 F and 0.018 F respectively. Tuning inductor has an inductance of

497H and resistance of 4620 .Xm of the 6.6kV VT is 1M , core loss = 20 watts per phase, VA burden =150VA per phase. Value of Cm for compensating the current drawn by m is equal

to F910183.3 .(a)Verify the appropriateness of choice of L and Cm.Ans: If FC 0018.01 and FC 0186.02 then the value L of tuning inductor is

given by

)(

1

21

2 CCL

where 2 f and f = tuning frequency

2 6

1

(2 50) (0.0018 0.0186) 10L

= 496.7H which is equal to the given value of L. Now 61 10mX

1m

m

XC

6

1 1

(2 50) 1 10m

m

CX

93.183 10 F The value is also same as the selected value of Cm Hence the selection of both L

and Cm is appropriate.

(b)Find out the nominal value of V/V2Ans: 1 2

2 1

0.0018 0.0186

0.0018

C CV

V C

= 11.33

V = 11.33 x 6.6132

3kV


18/20

18

(c) If the frequency drops from 50Hz to 47Hz, what would be the values of ratioerror and phase angle error?

Ans: Core loss = 20w

2

2 20m

VW

R

2 2

2 (6600)

20 20m

VR

62.18 10 VA burden = 150VA (resistive)

2

2 150b

V

R

2 2

2 (6600)150 150

bVR

52.904 10 The equivalent circuit can be represented as shown below.

Diagram 8.12610mX at f = 50Hz

62 10mf L 610

3183.12 50

mL H

The frequency of interest is 47Hz. Hence values of Xm and other impedance can

be calculated at 47Hz. The above circuit can be simplified asDiagram 8.13

Where1 1 1

m

m m b

jj C

Z R X R

9

6 5

1 12 47 3.183 10

2.18 10 2 47 3183.1 2.904 10

jj

6 6 6 60.459 10 1.064 10 0.94 10 3.44 10j j 6 6(3.902 0.124) 10 3.904 10 1.82j

6

1

3.904 10 1.82

Z

256147.5 1.82

256018.32 8135.15j

thth

VI

jR j L Z

C


19/20

19

6

6600 0

4620 2 47 497 256018.32 8135.152 47 0.0204 10

jj j

6600 0

4620 146768.9 165994 256018.32 8135.15j j j

6600 0

260638.32 11089.84j

6600 0

260874.14 2.44A

T thV I Z

6600 0256147.5 1.82

260874.14 2.44

6480.42 4.26

Hence % ratio error(6600 6480.42)

1006600

=1.81%

Phase angle error = 4.26

2 6.6V kV

rM

2 2

0t t2

2

10

eq

d i R dii

dt L dt LC

12 50nw

LC 2 n

RIw

L

22

22 0n n

d iw w i

dt 1

Lec8

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n

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L

22

22 0n n

d ii

dt n 1

t

e

0 0sin( )

| |

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line

VI t

Z


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20

saturation ct because of dc offset

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