sandia national labs sar atr hour for the slaac fall ‘99 retreat intro/module performance goals:...
TRANSCRIPT
Sandia National LabsSAR ATR Hour
for the SLAAC Fall ‘99 Retreat
Intro/Module Performance Goals: Brian BrayFOA: Scott HemmertSLD: Steve CragoCDI: Mike WirthlinWrap-up (Good/Bad/Future): Brian Bray
Sandia National Labs
Current Challenge Problem Modules• FOA (Focus of Attention)
– adaptive rank order quantization and multi-level morphology– quad uP:~2 Mpixels/sec ACS goal: ~10 Mpixels/sec*
• SLD (Second Level Detection)– for in-the-clear scenarios– adaptive attenuation estimation with binary template matching– quad uP: ~16000 templates/sec ACS goal: ~80000 templates/sec
• CDI (Contamination Distribution Indexer)– for camouflage, concealment and deception (CC&D) scenarios– epsilon-contaminated mixtures model (~10X more compute intensive than
SLD)– initial ACS goal is just the 2X not the 1X templates (90% of compute)– quad uP: ~1600 templates/sec Inital ACS goal: ~16000 templates/sec
End ACS goal: (2X and 1X templates at ~80000 templates/sec)
microprocessor = PowerPC 750 @ 400Mhz*Mpixel in downsampled space
Sandia National Labs
The Good
• ACS CDI Performance
• JHDL
• BYU students and faculty
• Virtex parts– on-chip memory
– large amounts of logic
Sandia National Labs
The Bad
• We are behind
• Need an embedded Virtex based ACS board
• ACS parts with large penalty for large precision and FP operations
• What is the third generation ACS part?
Sandia National Labs
The Future (As I See It)
• Bigger second generation ACS parts and better tools will come– third generation will not be here in near term
• what will it be??? – Virtex-like with RISC core, I$, D$ and DRAM interface?– Will it be an improvement to compute tasks or just system on a chip applications
• PCI accelerator cards with multiprocessor workstation based groundstations– will reduce the need for embedded VME hardware
– Annapolis Microsystems PCI• WildSTAR is a significant improvement over WildForce
– SLAAC PCI?• When compared to the WildSTAR, what design features can a SLAAC PCI Virtex board
provide to overcome not being COTS and available now?
• Daughtercards for embedded VME multicomputers– CSPI, Mercury
• many Mercury only shops for embedded VME multicomputers
Sandia National Labs
Mercury Compatible ACS Node
Race SeriesPowerPCCN ASIC
SDRAM
PowerPC L2$
Race SeriesPowerPCCN ASIC
SDRAM
PowerPC L2$
Race SeriesPowerPCCN ASIC
SDRAM
Virtex SRAM
Virtex Virtex
SRAMS
RA
M
SR
AM
SR
AM
SR
AM
CLK Gen
Boot EEPROM
64
64
6464 6464
Mercury’s PPC Daughtercard ACS DaughtercardCan SLAAC get accessto these chips andenough info to write SW drivers?
Can this bus be runat a lower clock ratethan 83.3Mhz?
How do others goabout designingMercury compatibledaughtercards?