rosconjp2018@ 1 ros2/dds fpga publish/subscribe€¦ · international workshop on fpgas for...
TRANSCRIPT
PEAR LAB Utsunomiya Univ.
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PEAR LAB Utsunomiya Univ.
ARM ��FPGA�Zynq(Xilinx) or FPGA-SoC(Intel)
•ROS2 on Zybo•Xilinx Zynq�����
•FPGA acceleration of ROS2 Security•Communication by hardwired UDP/IP (DDS, ROS2)
•Wire-speed data encryption
•Combined with image processing/DNN
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PEAR LAB Utsunomiya Univ.
ROS2 on Zybo
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PEAR LAB Utsunomiya Univ.
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9/9 ��� �����FPGA3.+<,<204&��(���)
ROS'��%9+69:(/78;=1)����)FPGA&!"#CPU'��)��FPT2018 DESIGN COMPETITION& #+
�TurtleBot3������
Zynq (FPGA+ARM(ROS2))
mBot $����
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PEAR LAB Utsunomiya Univ.
Programmable SoC �����ROS� FPGA�������(ROSCon2017@Vancouver���)
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Resolution�1920�1080Zedboard (Zynq-7020)ARM(PS): Cortex-A9 666MHzFPGA(PL): 100MHz
Problem: TCP/IP�� ���������
0 0.5 1 1.5 2 2.5 3 3.5
FPGA+ARM
SW only(ARM)
time(s)
Speed UP 1.7x
Kazushi Yamashina, Takeshi Ohkawa, Kanemitsu Ootsu and Takashi Yokota : “Proposal of ROS-compliant FPGA Component for Low- Power Robotic Systems - case study on image processing application -”, Proceedings of 2nd International Workshop on FPGAs for Software Programmers, FSP2015, pp. 62-67, 2015.
Application ROS node
input output
Publisher Subscriber SubscriberPublisherPS(ARM)
PL(FPGA)
ROS-Compliant FPGA Component(SoC)
interfacefor FPGA
interfacefor FPGA
Speed UP 26x
PEAR LAB Utsunomiya Univ.
Why ROS2? Brian Gerkey says:
•Teams of multiple robots•Small embedded platforms•Real-time systems•Non-ideal networks•Production environments•Prescribed patterns for building and structuring systems
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https://design.ros2.org/articles/why_ros2.html
From:XMLRPC+TCPROS
To:DDS (Data Distribution Service)
TCP/IP
UDP/IP
PEAR LAB Utsunomiya Univ.
ROS2/DDS ��������
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����������Wireshark�
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PEAR LAB Utsunomiya Univ.
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•FPGA�ROS(ROS2)������•ROS2/DDS����� �����•@TakeshiOhkawa��
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