revision - 01 intel confidential page 1 intel hpc update norfolk, va april 2008

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Revision - 01 Intel Confidential Page 1 Intel HPC Update Norfolk, VA April 2008

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Page 1: Revision - 01 Intel Confidential Page 1 Intel HPC Update Norfolk, VA April 2008

Revision - 01

Intel Confidential Page 1

Intel HPC Update

Norfolk, VAApril 2008

Page 2: Revision - 01 Intel Confidential Page 1 Intel HPC Update Norfolk, VA April 2008

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Intel Confidential

Intel in High Performance Computing

A long term commitment to HPC

Large scaleclusters in

Dupont, WAfor test &

optimization

TeraflopsResearch

Chip

Leading performance,

performance/watt

Platform buildingblocks

Dedicated,renowned expertise

Broad SW tools

portfolio

IntelConnects

Cables

DefinedHPC

applicationplatform

Page 3: Revision - 01 Intel Confidential Page 1 Intel HPC Update Norfolk, VA April 2008

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Intel Confidential

Weather Life Science FSI Energy CADDCC

How Dual Socket Measures Up Today?

Performance leadership with the Intel® Xeon® processor 5400 Series and the 5400 chipset

Performance tests and ratings are measured using specific computer systems and/or components and reflect the approximate performance of Intel products as measured by those tests. Any difference in system hardware or software design or configuration may affect actual performance. Buyers should consult other sources of information to evaluate the performance of systems or components they are considering purchasing. For more information on performance tests and on the performance of Intel products, visit Intel Performance Benchmark Limitations

Configuration detail can be found in the backup

0.0

0.5

1.0

1.5

2.0

2.5

3.0

Barcelona1.9 GHz

Clovertown3.0 / BF1333

Harpertown3.0 / SB1600

Page 4: Revision - 01 Intel Confidential Page 1 Intel HPC Update Norfolk, VA April 2008

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Intel Confidential

PCI PCI ExpressExpress

**Gen 1, 2Gen 1, 2

I/OI/OHubHub

ICHICH

DMIDMI

Nehalem Nehalem

PCIPCIExpress*Express*Gen 1, 2Gen 1, 2

Future System ArchitectureNehalem Based

New Microarchitecture changes key to HPC•-Integrated Intel® QuickPath Memory Controller for lower memory bandwidth latency-Intel® QuickPath Interconnect providing up to 25.6 GB/s of bandwidth per port•- Direct CPU-IO link for improved IO bandwidth over previous generation

IntelIntel®® QuickPath Interconnect QuickPath Interconnect

Nehalem Nehalem

Nehalem Nehalem

I/O I/O

HubHub

I/O I/O

HubHub

PCIPCIExpress*Express*Gen 1, 2Gen 1, 2

Source: Intel. All future products, computer systems, dates, and figures specified are preliminary based on current expectations, and are subject to change without notice.

Page 5: Revision - 01 Intel Confidential Page 1 Intel HPC Update Norfolk, VA April 2008

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Intel Confidential

November 2007 Top500 Entries by Processor Brand

Intel AMD Power PA-RISC Cray Alpha SPARC NEC

2007 % of Total Processors Shipped

Intel AMD Power Other

Intel Leading the Way in HPCdelivering more results in less time than ever before

• Intel supports >70% of

the Worlds fastest

supercomputers

• In 2007, Intel supplied

approximately 4 out of

every 5 processors

– Widely deployed across

all businesses

Source: Nov ’07 Top500.orgSource: Nov ’07 Top500.org

Source: Q4’07 IDC QviewSource: Q4’07 IDC Qview

Page 6: Revision - 01 Intel Confidential Page 1 Intel HPC Update Norfolk, VA April 2008

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Intel Confidential

Two Architectural ApproachesThro

ug

hp

ut

Perf

orm

ance

Pro

gra

mm

abili

ty

DX7 DX9 FutureDX10

CPU• Evolving toward throughput computing• Motivated by energy-efficient performance

GPU• Evolving toward general-purpose computing• Motivated by higher quality graphics and

GP-GPU usages

Arrays of Throughput

Cores

SMT Small Number of Traditional

Cores

FixFunctionFix

Function

GeneralPurposeGeneralPurpose

LimitedProgrammabilityLimited

Programmability

Multi-ThreadingMulti-

Threading

ManyCoreManyCore

Multi-CoreMulti-Core

TimeTime

Page 7: Revision - 01 Intel Confidential Page 1 Intel HPC Update Norfolk, VA April 2008

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Intel Confidential

Multi-threaded Cores

All Large Core

Goal: Energy Efficient Petascale with Multi-threaded CoresGoal: Energy Efficient Petascale with Multi-threaded Cores

Mixed Largeand

Small Core

All Small Core

Note: the above pictures don’t represent any current or future Intel Note: the above pictures don’t represent any current or future Intel productsproducts

Page 8: Revision - 01 Intel Confidential Page 1 Intel HPC Update Norfolk, VA April 2008

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Intel Confidential

Teraflops Research Chip 100 Million Transistors ● 80 Tiles ● 275mm2

First tera-scale programmable silicon:– Teraflops performance

– Tile design approach

– On-die mesh network

– Novel clocking

– Power-aware capability

– Supports 3D-memory

Not designed for IA or product

Page 9: Revision - 01 Intel Confidential Page 1 Intel HPC Update Norfolk, VA April 2008

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Intel Confidential

Research Data Summary

Frequency Voltage Power Bisection Bandwidth

Performance

3.16 GHz 0.95 V 62W 1.62 Terabits/s

1.01 Teraflops

5.1 GHz 1.2 V 175W 2.61 Terabits/s

1.63 Teraflops

5.7 GHz 1.35 V 265W 2.92 Terabits/s

1.81 Teraflops

1.01 Teraflops1.01 Teraflops62 Watts62 Watts

Page 10: Revision - 01 Intel Confidential Page 1 Intel HPC Update Norfolk, VA April 2008

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Intel Confidential

In Closing ..

•Intel Commitment to HPC

•Cross-Org, Company-wide HPC team

•Delivering HPC platforms

•Momentum seen in adoption of Intel solutions

•Future directions explored – depth and breadth; for Petascale and Volume

Commitment – Momentum – Future Commitment – Momentum – Future

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Intel Confidential