resistors & capacitors layouts

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Resistors & Capacitors Preethesh

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Overview of drawing Resistor and Capacitor Layout in CMOS technology

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Page 1: Resistors & Capacitors Layouts

Resistors & Capacitors

Preethesh

Page 2: Resistors & Capacitors Layouts

ResistorsDummy resistor should be added in order to minimize the faster etching in large areas

Contact resistance must be taken into account for small resistance values

In order to minimize the noise, the resistor can be designed with a guard ring inside a well to reduce the coupling to the substrate

Matching between resistors requires that the resistors are designed in the layout :

with the same orientation distributed in a interdigitized or common centroid style

Page 3: Resistors & Capacitors Layouts
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Resistor type Sheet resistance (/sq)

Polysilicon 100

n+ Diffusion 50

p+ Diffusion 100

n-Well 1000

Page 7: Resistors & Capacitors Layouts

Capacitors

A capacitor is made with two conductive layers (electrodes) insulated

by means of a dielectric layer.

Electrodes used : Metal, Polysilicon, Diffusion

Insulator : Silicon Dioxide, Polysilicon oxide, CVD oxide

Page 8: Resistors & Capacitors Layouts

Different kinds of capacitors are available in CMOS technology:

poly 1 to poly 2 (dielectric is thin silicon dioxide or other, e.g. thin sandwich of silicon dioxide, silicon nitride, silicon dioxide)

poly to implanted region (high-dose implantation under poly; dielectric is thin silicon dioxide);

poly to metal 1 (dielectric is intermediated CVD oxide); metal 1 to diffused active area (dielectric is intermediated

CVD oxide); metal 1 to metal 2 (dielectric is the intermetal insulator).

Page 9: Resistors & Capacitors Layouts

To achieve good matching : Use of unity capacitors connected in parallel Use W = L fairly large

Page 10: Resistors & Capacitors Layouts

MIM Cap

Metal-insulator-metal (MIM) structure situated in the oxide layers.

The insulator is a very thin layer (~25 nm), resulting in high density and relatively low back-plate parasitics.

Page 11: Resistors & Capacitors Layouts

MOM(Metal-Oxide-Metal ) Cap

Use lateral flux (~Lmin) and multiple metal layers to realize high capacitance values

• Matching limited by layer thickness variations

Page 12: Resistors & Capacitors Layouts

MOM capacitor, also known as VPP (vertical parallel plate) NVCAP (natural vertical capacitor) lateral flux capacitor comb capacitors interdigitated finger capacitor –

One of the most widely used, due to its good characteristics

Page 13: Resistors & Capacitors Layouts

Capacitor Types

Capacitor type Capacitance per unit area ( aF/m2)

MOM 150

MOS gate (biased) 5000

MIM (thin oxide option) 1000

Poly-poly 1000

Page 14: Resistors & Capacitors Layouts

Thank You ...