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Hindawi Publishing CorporationISRN ElectronicsVolume 2013, Article ID 390160, 8 pageshttp://dx.doi.org/10.1155/2013/390160

Research ArticleVoltage Mode Astable Multivibrator Using Single CDBA

Rajeshwari Pandey,1 Neeta Pandey,1 Sajal K. Paul,2

Kashish Anand,1 and Kranti Ghosh Gautam1

1 Department of Electronics and Communication Engineering, Delhi Technological University, Bawana Road,Delhi 110042, India

2Department of Electronics Engineering, Indian School of Mines, Dhanbad, Jharkhand 826004, India

Correspondence should be addressed to Neeta Pandey; [email protected]

Received 21 January 2013; Accepted 14 February 2013

Academic Editors: H. A. Alzaher and H.-C. Chien

Copyright © 2013 Rajeshwari Pandey et al. This is an open access article distributed under the Creative Commons AttributionLicense, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properlycited.

This paper aims at presenting three voltagemode square wave generator circuits using single current differencing buffered amplifier(CDBA), a recently proposed mixed mode building block. The first proposed circuit produces a variable frequency output havingfixed duty cycle, whereas the rest of the circuits have variable duty cycle. One of the circuits uses passive element adjustment tocontrol the duty cycle, whereas electronic control is used in the other circuit. The workability of the proposed circuits is confirmedthrough SPICE simulations and experimental work.

1. Introduction

It is well known that inherent wide bandwidth which isvirtually independent of closed loop gain, greater linearityand large dynamic range [1] are the key performance featuresof current mode technique.The CDBA is one such active ele-ment which exploits these advantages. In addition, it is freefrom parasitic capacitances [2] and, hence, is appropriate forhigh frequency operation. It provides further flexibility tothe designers, enabling a variety of circuit designs, as it canoperate in both current and voltage modes [3].

The square wave generator finds extensive applicationsin communication systems, control systems, instrumenta-tion, and signal processing. The literature review revealsthat several triangular/square wave generators using variousanalog building blocks have already been presented [4–11].All these designs use a current source to alternately chargeand discharge a capacitor followed by a Schmitt trigger togenerate triangular/square wave. Conventional voltage-modesquare wave generators [4] employ an op-amp working inthe nonlinear region to produce a square wave signal. Thesevoltage-mode generators, however, have a limitation on their

maximum frequency due to lower slew rate and constantgain-bandwidth product of the op-amps.

Triangular/squarewave generators presented in [5–11] usecurrent mode building-blocks-based circuits. The study ofthese circuits reveals that

(i) references [5, 6, 10] employ more than one active ele-ment;

(ii) references [6–10] use four or more passive elements;

(iii) references [6–11] lack electronic controllability of dutycycle of output.

The aim of this paper is to present three square wave gen-erator circuits using single CDBA and three to five passiveelements. In Section 2, the function of a CDBA is introducedfollowed by the description of proposed circuits with ana-lytical formulation for the frequency of oscillation. Section 3explores the effect of nonidealities of CDBA on the proposedcircuits. PSPICE simulation results and experimental resultsare presented in Section 4 which are in confirmation with thetheoretical propositions. Section 5 concludes the paper.

2 ISRN Electronics

𝑧

𝑤

𝐼𝑤𝑉𝑤𝑉𝑝

𝑉𝑛

𝐼𝑝

𝐼𝑛

𝑝

𝑛𝐼𝑧

𝑉𝑧

Figure 1: Block diagrammatic representation of CDBA.

𝐶 𝑅𝐹

𝑉𝑜

𝑝

𝑛

𝑤

𝑧

𝑅𝐿

Figure 2: Astable multivibrator with fixed 50% duty cycle.

2. Circuit Descriptions

The circuit symbol of CDBA is shown in Figure 1. The portcharacteristics are given as follows

[[[[

𝐼𝑧

𝑉𝑤

𝑉𝑝

𝑉𝑛

]]]]= [[[[

0 0 1 −11 0 0 00 0 0 00 0 0 0

]]]]

[[[[

𝑉𝑧

𝐼𝑤

𝐼𝑝

𝐼𝑛

]]]]. (1)

2.1. Circuit I. The circuit for the astable multivibrator isshown in Figure 2. It uses a single CDBA block, two resistorsand a capacitor. The resistor 𝑅

𝐹and capacitor 𝐶 form a

positive feedback loop. The load resistance 𝑅𝐿connected to

the 𝑧 terminal is large enough to drive the device output 𝑉0

into one of the two saturation levels𝑉+sat or𝑉−sat.This results incharging of the capacitor present in the feedback loop. Whenthe voltage across the capacitor reaches a value at which thecurrent through𝑅

𝐿is not large enough tomaintain the output

voltage at 𝑉+sat the output switches to 𝑉−sat and the capacitorstarts charging in the opposite direction as shown in Figure 3.

Routine analysis suggests that the output will switchbetween its maximum (𝑉+sat) andminimum (𝑉−sat) value when

𝑇off𝑇on

𝑉+sat

𝑉−sat

𝑉TH

𝑉TL

𝑉𝑜(𝑡)

𝑉𝑐(𝑡)

𝑡

Figure 3: Output of the astable multivibrator of Figure 2.

the capacitor voltage reaches the following two thresholdvoltages:

𝑉TL =(𝑅𝐿− 𝑅𝐹)

𝑅𝐿

𝑉−sat, (2)

𝑉TH =(𝑅𝐿− 𝑅𝐹)

𝑅𝐿

𝑉+sat. (3)

The time required to charge (𝑇on) the capacitor from a valueof 𝑉TL to 𝑉TH is given by

𝑇on = 𝑅𝐹𝐶 ln [2𝑅𝐿

𝑅𝐹

− 1] . (4)

Similarly, time taken for discharging (𝑇off ) from 𝑉TH to 𝑉TLis

𝑇off = 𝑅𝐹𝐶 ln [2𝑅𝐿

𝑅𝐹

− 1] . (5)

From (4) and (5), it is clear that 𝑅𝐿> 𝑅𝐹.

Thus, the output of the multivibrator is a symmetricsquare wave having amplitudes of𝑉+sat and𝑉−sat, at a frequency(𝑓𝑜) given by

𝑓𝑜= 1𝑇on + 𝑇off

= 12𝑅𝐹𝐶 ln [2𝑅

𝐿/𝑅𝐹− 1] . (6)

Though the circuit is simple and output frequency can becontrolled through passive components, however, the on andoff duty cycles of the output are fixed at 50%.

2.2. Circuit II. The circuit of Figure 2 can be modified forvariable duty cycle output by replacing the resistor 𝑅

𝐹with

two diodes and two resistors and is depicted in Figure 4. It is

ISRN Electronics 3

𝐶

𝑝

𝑛

𝑤

𝑧

𝑅𝐿

𝑅1

𝑅2

𝐷1

𝐷2𝑉𝑜

Figure 4: Astable multivibrator having resistor-controlled dutycycle.

based on the scheme discussed in [11] and has been adaptedfor implementation with CDBA.

Neglecting the drop across the diodes, the parameters𝑉TH, 𝑉TL, 𝑇on and 𝑇off may be obtained as

𝑉TL =(𝑅𝐿− 𝑅1)

𝑅𝐿

𝑉−sat, (7)

𝑉TH =(𝑅𝐿− 𝑅2)

𝑅𝐿

𝑉+sat, (8)

𝑇on = 𝑅2𝐶 ln(2𝑅𝐿− 𝑅1

𝑅2

) , (9)

𝑇off = 𝑅1𝐶 ln(2𝑅𝐿− 𝑅2

𝑅1

) . (10)

From (9) and (10), the frequency (𝑓𝑜) ofmodified squarewave

generator can be written as

𝑓𝑜= 1𝑅2𝐶 ln [(2𝑅

𝐿−𝑅1) /𝑅2]+𝑅1𝐶 ln [(2𝑅

𝐿−𝑅2) /𝑅1] ,

where 𝑅𝐿> 𝑅1, 𝑅2.(11)

It can be seen clearly that 𝑇on and 𝑇off can be controlled bychanging 𝑅

2and 𝑅

1.

2.3. Circuit III. The circuit shown in Figure 5 is anotherastable multivibrator. In this circuit, the duty cycle can beelectronically controlled by the application of an external DCsource 𝑉dc.

Routine analysis for this circuit gives the 𝑉TH and 𝑉TL as

𝑉TH = 𝑉+sat ( 1 −𝑅𝐹

𝑅𝐿

) + 𝑉dc𝑅𝐹

𝑅𝑆

, (12)

𝑉TL = 𝑉−sat (1 −𝑅𝐹

𝑅𝐿

) + 𝑉dc𝑅𝐹

𝑅𝑆

. (13)

𝐶 𝑅𝐹

𝑉𝑜𝑝

𝑛

𝑤

𝑧

𝑅𝐿

𝑉dc 𝑅𝑆

− +

Figure 5: Astable multivibrator having electronically controlledduty cycle.

𝑝

𝐼𝑝

𝑛𝐼𝑛

AD844

AD844

1

2

−

−

+

+

𝑤

𝑤1

𝑧

𝑤2

𝐼𝑧

𝐼𝑧1

𝐼𝑥2

𝑧1𝑥1

𝑥2

𝑦1

𝑧2

𝑦2

𝐼𝑧2

Figure 6: CDBA constructed with AD844.

These values of 𝑉TH and 𝑉TL result in 𝑇on and 𝑇off as follows:

𝑇on = 𝑅𝐶 ln[2𝑅𝐿/𝑅𝐹− 1] − 𝑅

𝐿𝑉dc/𝑉+sat𝑅𝑆

[1 − 𝑉dc𝑅𝐿/𝑉+sat𝑅𝑆],

𝑇off = 𝑅𝐶 ln[2𝑅𝐿/𝑅𝐹− 1] − 𝑉dc𝑅𝐿/𝑉−sat𝑅𝑆

[1 − 𝑉dc𝑅𝐿/𝑉−sat𝑅𝑆].

(14)

These results show that the on andoffduty cycles of the outputcan be controlled with the help of externally applied voltage𝑉dc.

3. Realizing a CDBA and Nonideality Analysis

In the analysis so far, ideal characteristics of the CDBA wereconsidered. However, in this section, the effect of the para-meters of a practical model of the CDBA is investigated. Forthe proposed circuits, the CDBA was realized using currentfeedback operational amplifier (CFOA) ICAD844 as shownin Figure 6 [12].The equivalent circuit of Figure 6, which usespractical model of AD844 [13], is shown in Figure 7. Herein,theCFOAs have been replacedwith current conveyors havingfinite input resistances (𝑅

𝑥) and finite resistance at its 𝑧

terminal (𝑅𝑧). Ideally, the input resistance at the 𝑥 terminal is

zero and is infinite at the 𝑧 terminal. For the AD844 CFOA,the input resistances 𝑅

𝑥= 50Ω and 𝑅

𝑧= 3MΩ [13]. This

4 ISRN Electronics

+

−

𝐼𝐷

𝐼𝑝

𝐼𝑛

1

1

2

1

𝑤

𝑤

𝐼𝑤

CC-II

CC-II

𝑉𝑤

𝑧𝐼𝑧 𝑉𝑧

𝑅𝑥

𝑅𝑥

𝑅𝑧

𝑅𝑧

𝐼𝑥2 𝐼𝑧2

𝑥

𝑥

𝑦

𝑦

𝑧

𝑧

𝐼𝑧1

Figure 7: Equivalent circuit of CDBA constructed with AD844.

circuit is used for exploring the nonideal behavior of all thethree proposed circuits.

From Figure 7, various currents can be calculated asfollows:

𝐼𝑧1= 𝐼𝑝,

𝐼𝐷= 𝐼𝑧1( 𝑅𝑧𝑅𝑥+ 𝑅𝑧

) ,

𝐼𝑥2= 𝐼𝑛− 𝐼𝐷,

𝐼𝑧2= 𝐼𝑥2.

(15)

Ideally, 𝐼𝐷should be equal to 𝐼

𝑧1, which can be approx-

imated only if 𝑅𝑧≫ 𝑅𝑥, which is true for AD844. Also,

the approximation that the input terminals are virtuallygrounded will be true only if the external resistance at theinput terminal of the CDBA is much larger than 𝑅

𝑥. If these

two conditions are satisfied, the CDBA constructed withAD844 closely approximates an ideal CDBA.

Taking into account the aforementioned approximations,from (15), 𝐼

𝑧, the current from 𝑧 terminal, can be calculated

as

𝐼𝑧= (𝐼𝑝− 𝐼𝑛) . (16)

And the output voltage 𝑉𝑤is given as

𝑉𝑤= 𝑉𝑧. (17)

If the equivalent circuit of CDBA constructed with AD844 isused in Figure 2 (circuit I), then the threshold limits of theoutput get modified to

𝑉TL =(𝑅𝐿//𝑅𝑧) − (𝑅

𝐹+ 𝑅𝑥)

𝑅𝐿//𝑅𝑧

𝑉−sat, (18)

𝑉TH =(𝑅𝐿//𝑅𝑧) − (𝑅

𝐹+ 𝑅𝑥)

𝑅𝐿//𝑅𝑧

𝑉+sat. (19)

Since 𝑅𝐿≪ 𝑅𝑧and 𝑅

𝐹≫ 𝑅𝑥, (18) and (19) reduce to (2) and

(3), respectively.The threshold limits of the output of Figure 4 (circuit II),

on using the equivalent CDBA model, get modified to

𝑉TL =(𝑅𝐿//𝑅𝑧) − (𝑅

1+ 𝑅𝑥+ 𝑅𝐷1)

𝑅𝐿//𝑅𝑧

𝑉−sat, (20)

𝑉TH =(𝑅𝐿//𝑅𝑧) − (𝑅

2+ 𝑅𝑥+ 𝑅𝐷2)

𝑅𝐿//𝑅𝑧

𝑉+sat, (21)

where 𝑅𝐷1

and 𝑅𝐷2

are forward resistances of the diodes 𝐷1

and𝐷2, respectively, and are of very small order as compared

to 𝑅1and 𝑅

2. Also, since 𝑅

𝑥≪ 𝑅𝐹and 𝑅

𝑧≫ 𝑅𝐿, (20) and

(21) can be approximated to (7) and (8), respectively.Similarly, for the astable circuit shown in Figure 5 (circuit

III), the modified threshold limits of the output can beexpressed as

𝑉TH = 𝑉+sat (1 −𝑅𝐹+ 𝑅𝑥

𝑅𝐿//𝑅𝑧

) + 𝑉dc𝑅𝐹+ 𝑅𝑥

𝑅𝑆+ 𝑅𝑥

, (22)

𝑉TL = 𝑉−sat (1 −𝑅𝐹+ 𝑅𝑥

𝑅𝐿//𝑅𝑧

) + 𝑉dc𝑅𝐹+ 𝑅𝑥

𝑅𝑆+ 𝑅𝑥

. (23)

The external resistance at the input of the CDBA shouldbe much larger than 𝑅

𝑥so that the feedback current can be

absorbed into the input terminals. Since𝑅𝐿,𝑅𝐹,𝑅𝑆, and𝑅

𝑧≫

𝑅𝑥, (22) and (23) reduce to (12) and (13), respectively.

4. Simulation and Experimental Results

To validate the theoretical predictions, the proposed astablemultivibrator circuits have been simulated using PSPICEmacromodel of current feedback operational amplifier(CFOA) AD 844 and experimented using commerciallyavailable AD 844AN. The CDBA realization using CFOAAD 844 is shown in Figure 6. Simulations were carried outto investigate the maximum and minimum frequencies thatproposed circuit configuration of Figure 2 (circuit I) can offerbefore the output signal gets distorted. Supply voltage of±10V was used for simulations. Figure 8 shows the output ofthe proposed circuit forminimumandmaximum frequencieswhich can be achieved, with frequency deviation not morethan 5%. The simulated square wave output obtained withcomponent values as𝑅

𝐹= 20KΩ,𝑅

𝐿= 50KΩ and𝐶 = 10 𝜇F

is shown in Figure 8(a). This is the minimum frequency thatcan be obtained from the circuit and its value is observed tobe 2Hz as against the theoretically computed value of 1.9Hz.Similarly output formaximumachievable frequency is shownin Figure 8(b). Component values used are 𝑅

𝐹= 1KΩ, 𝑅

𝐿=

40KΩ and 𝐶 = 100 pF. The simulated frequency is noted tobe 1.2MHz showing a minor deviation from the theoreticallycalculated value of 1.14MHz.

To test the tunability of this circuit, the variation infrequency, against the passive components𝐶,𝑅

𝐿, and𝑅

𝐹, was

observed. The variation of frequency against the capacitor 𝐶is presented in Figure 9(a), whereas Figures 9(b) and 9(c) plotthe variations against the resistors 𝑅

𝐿and 𝑅

𝐹, respectively.

ISRN Electronics 5

10

0

−10

(V)

Time (s)9 9.2 9.4 9.6 9.8 10

𝑉0

(a) Minimum frequency output

10

0

−10

(V)

1 1.5 2 2.5 3 3.5 4Time (𝜇s)

𝑉0

(b) Maximum frequency output

Figure 8: Output of circuit I.

0

20

40

60

80

100

120

140

160

𝐶 (nF)

Freq

uenc

y (K

Hz)

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1

SimulatedIdeal

(a)

SimulatedIdeal

00.10.20.30.40.50.60.70.80.9

1

10 20 30 40 50 60 70 80 90 100

Freq

uenc

y (M

Hz)

𝑅𝐿 (KΩ)

(b)

Freq

uenc

y (M

Hz)

0

0.1

0.2

0.3

0.4

0.5

0.6

3 4 5 6 7 8 9 10

SimulatedIdeal

𝑅𝐹 (KΩ)

(c)

Figure 9: (a) Variation of calculated and simulated values of frequency with 𝐶 for 𝑅𝐹= 15KΩ and 𝑅

𝐿= 40KΩ. (b) Variation of calculated

and simulated values of frequency with 𝑅𝐿for 𝐶 = 100 pF and 𝑅

𝐹= 5KΩ. (c) Variation of calculated and simulated values of frequency with

𝑅𝐹for 𝐶 = 100 pF and 𝑅

𝐿= 30KΩ.

6 ISRN Electronics

10

0

−10

Volta

ge (V

)

Time (𝜇s)0 20 40 60 80 100 120

(1) (2)

(a)

600

500

400

300

200

100

00.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1

𝐶 (nF)

Freq

uenc

y (K

Hz)

SimulatedIdeal

(b)

Figure 10: (a) Output of circuit II. (b) Variation of calculated and simulated values of frequency with 𝐶.

10

0

−10

(V)

600 650 700 750 800Time (𝜇s)

𝑉0

(a)

10

0

−10

(V)

600 650 700 750 800Time (𝜇s)

𝑉0

(b)

10

0

−10

(V)

600 650 700 750 800Time (𝜇s)

𝑉0

(c)

Figure 11: (a) Output of circuit III with 𝑉dc = 2V. (b) Output of circuit III with 𝑉dc = 5V. (c) Output of circuit III with 𝑉dc = −2V.

The circuit configuration of Figure 4 (circuit II) was sim-ulated to investigate the variation of duty cycle by changingthe passive component values. A typical output of this circuitis given in Figure 10(a), wherein curve (1) is plotted for 𝑅

1=

25KΩ and 𝑅2= 2KΩ and curve (2) for 𝑅

1= 4KΩ and

𝑅2= 15KΩ. The values of 𝑅

𝐿and 𝐶 are kept as 40KΩ 1 nF,

respectively, for both curves. It clearly shows that the on andoff periods of the output are not fixed anymore. Figure 10(b)

shows the plot of the calculated frequency and the simulatedfrequency of oscillation as a function of 𝐶 while keeping𝑅𝐿= 40KΩ, 𝑅

1= 20KΩ, and 𝑅

2= 4KΩ. The deviation

in frequency arises since the voltage drop across the diodesand their forward resistance is not taken into account incalculations.

Figure 11 shows the output of circuit III for three differentvalues of 𝑉dc, that is, 2 V, 5V, and −2V, while rest of the

ISRN Electronics 7

0

5

10

15

20

25

0 1 2 3 4 5

Freq

uenc

y (k

Hz)

IdealSimulated

−5 −4 −3 −2 −1

𝑉dc (volts)

(a)

00.10.20.30.40.50.60.70.8

Dut

y cy

cle

0 1 2 3 4 5

IdealSimulated

−5 −4 −3 −2 −1

𝑉dc (volts)

(b)

Figure 12: (a) Variation of calculated and simulated value of frequency with DC bias. (b) Variation of duty cycle with DC bias.

(a) (b) (c)

Figure 13: Experimental output obtained from circuit I.

component values are chosen as 𝑅𝑠= 40K, 𝑅

𝐿= 40K, 𝑅

𝐹=

15K, and𝐶 = 1 nF. It is evident that the output frequency andduty cycle can be controlled using 𝑉dc.

Figure 12(a) shows the comparison between the calcu-lated frequency and the simulated frequency of oscillationsas a function of 𝑉dc, and Figure 12(b) shows variation of dutycycle with𝑉dc, for component values of𝑅𝑆 = 40K,𝑅𝐿 = 40K,𝑅𝐹= 15K, and 𝐶 = 1 nF. It is observed that all the simulated

results are found in close agreement with the theoreticallyformulated values.

The functionality of the proposed square wave generatorcircuits is verified experimentally as well.The commercial 𝐼𝐶AD844AN is used to implement a CDBA. Supply voltagesused are ±10V.

Figure 13 shows typical experimental results for circuitI for three different frequencies. Figure 13(a) is output forcomponent values of 𝑅

𝐿= 82KΩ, 𝑅

𝐹= 15KΩ, and 𝐶 =

10 nF. The measured frequency of 1.547KHz closely matchesthe theoretical frequency of 1.46KHz as obtained from (6).Output for component values of 𝑅

𝐿= 3.9KΩ, 𝑅

𝐹= 1KΩ,

and𝐶 = 2 nF is shown in Figure 13(b), wherein the measured

frequency of oscillation is 123.3 KHz as against the computedvalue of 130KHz. Another screen shot of oscilloscope isshown in Figure 13(c) for 𝑅

𝐿= 40KΩ, 𝑅

𝐹= 1KΩ, and 𝐶 =

100 pF. Observed output is having a frequency of oscillationas 824KHz and the corresponding calculated value is foundto be 1.14MHz. Experimental outputs for the circuit III areshown in Figure 14 for different values of 𝑉dc, which depictsthe variation of duty cycle with 𝑉dc.

5. Conclusion

Three astable multivibrator circuits using single CDBA areproposed. The first circuit (circuit I) produces a variable fre-quency output with fixed duty cycle. The other two proposedcircuits (circuit II and circuit III) provide output with variableduty cycle; for circuit II, duty cycle control is accomplishedthrough passive component adjustment, and for circuit III,electronic control is used. Nonideality analysis is presentedto explore the effect of the parameters of a practical modelof the CDBA. The workability of the proposed circuits isdemonstrated through SPICE simulations and experimentalwork. AD-844-based CDBA is used for simulation and

8 ISRN Electronics

(a)

(b)

Figure 14: Experimental outputs for circuit III for (a) 𝑉dc = −5Vand (b) 𝑉dc = 2V.

hardware circuit tests. Results are found to be in conformitywith the proposed theory.

References

[1] C. Toumazou, F. J. Lidgey, andD. G. Haigh,Analogue IC Design:The Current Mode Approach, Peregrinus, London, UK, 1990.

[2] C. Acar and S. Ozoguz, “A new versatile building block: cur-rent differencing buffered amplifier suitable for analog signal-processing filters,” Microelectronics Journal, vol. 30, no. 2, pp.157–160, 1999.

[3] C. Cakir and O. Cicekoglu, “Low-voltage high-performanceCMOS current differencing buffered amplifier (CDBA),” in Pro-ceedings of the 4th Ph.D. Research in Microelectronics andElectronics Conference (PRIME ’08), pp. 37–40, June 2008.

[4] A. Sedra and K. C. Smith,Microelectronic Circuits, Oxford Uni-versity Press, London, UK, 4th edition, 1998.

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