research article tunable first-order resistorless all-pass filter … · 2019. 7. 31. · research...

Research ArticleTunable First-Order Resistorless All-Pass Filter withLow Output Impedance

Parveen Beg

Department of Electronics Engineering AMU Aligarh 202002 India

Correspondence should be addressed to Parveen Beg parveenbeggmailcom

Received 31 August 2013 Accepted 30 October 2013 Published 22 January 2014

Academic Editors M Riera-Guasp F L Tofoli and K-W Wong

Copyright copy 2014 Parveen Beg This is an open access article distributed under the Creative Commons Attribution License whichpermits unrestricted use distribution and reproduction in any medium provided the original work is properly cited

This paper presents a voltage mode cascadable single active element tunable first-order all-pass filter with a single passivecomponent The active element used to realise the filter is a new building block termed as differential difference dual-X currentconveyor with a buffered output (DD-DXCCII) The filter is thus realized with the help of a DD-DXCCII a capacitor and a MOStransistor By exploiting the low output impedance a higher order filter is also realized Nonideal and parasitic study is also carriedout on the realised filters The proposed DD-DXCCII filters are simulated using TSMC the 025 120583m technology

1 Introduction

Analog first-order filter design using a variety of active build-ing blocks has been the focus of research for the past severaldecades Operational amplifier was the active element ofchoice during the earlier stages of development Later theadvent of second generation current conveyors (CCII) differ-ential voltage current conveyor (DVCC) current controlledcurrent conveyor (CCCII) and dual-X current conveyor(DXCCII) signalled the era of voltage-mode and current-mode signal processing Since then there has been a signif-icant amount of technical literature available on the subjectObviously it is not possible to attempt a thorough reviewof allthe related works However a survey of some of the recentlypublished first-order voltage mode all-pass filters (APF) ispresented in this section A variety of circuits are availablebased on the above-mentioned conveyors [1ndash22] The filterin [1ndash8] is composed of more than one active element whilethe method proposed in [9ndash22] employs only a single activeelement and passive componentsThefilters in [16 17] employfour passive components the filter in [19] employs two tothree passive components while the filters designed in [10ndash13 15 20 21] employ three passive components Out ofthese the filters presented in [11 20 21] do not exhibit alow output impedance and hence fall in the category ofnoncascadable filters while those in [10 12 13 15] have alow output impedance and are classified as cascadable filters

The filters in [1 3 4 18] are resistorless circuits based on oneor more active elements A distinct advantage of the filterpresented in [18] is that it employs a single active and a passiveelement with low output impedance

However none of the above-mentioned filters supporttuning as a feature except the filter in [1]

The DXCCII presented in [15] even though contains abuffered output requires an additional current source toobtain a low output impedence terminal while in this workno additional current source is required The DD-DXCCIIis utilized to design a tunable voltage mode cascadable first-order filter

The single active element all-pass filter presented in thispaper exhibits the following features

(a) single active element DD-DXCCII(b) single passive element(c) resistorless(d) low output impedance(e) tunable(f) no matching condition

A detailed comparison of some of the reported single activeelement voltagemode filters with the proposed filter is shownin Table 1 From this table it is clear that none of the reportedfilters exhibit all the above-mentioned features

Hindawi Publishing Corporatione Scientific World JournalVolume 2014 Article ID 219453 6 pageshttpdxdoiorg1011552014219453

2 The Scientific World Journal

Table 1 Comparison of single active element based proposed and existing first-order circuits

Ref no Activeelement

No of passivecomponents Resistorless High input

impedanceLow outputimpedance

Supplyvoltages

Matchingconditionrequired

TunableHighestoperatingfrequency

[9] CCII 5 No Yes No mdash Yes No sim10 KHz[10] FDCCII 3 No Yes Yes plusmn33 V Yes No 159MHz[11] CCII 3 No Yes No mdash Yes No mdash[12] UVC 3 No Yes Yes plusmn25 V Yes Yes 117MHz

[13] CBTACCCDBA 3 No No Yes plusmn25 V No No 119KHz

[14] DDCC 2 No No No plusmn25 V No No 159MHz[15] DXCCII 23 No Yes Yes plusmn25 V No No 25MHz[16] CCIII 4 No No No mdash Yes No 1KHz[17] DXCCII 4 No Yes No plusmn125V Yes No 159MHz[18] VD-DIBA 1 Yes Yes Yes mdash No No 318KHz[19] ICCII 2 No No No plusmn25 V Yes No 370KHz[20] CCII 3 No Yes No plusmn25 V Yes No 1MHz[21] CCII 3 No No No mdash Yes No 159KHz[22] FDCCII 2 No Yes Yes plusmn3V No No 311MHzProposed DDDXCCII 1 Yes No Yes plusmn125V No Yes 4ndash6MHz

The rest of the paper is organized as follows Section 2presents a brief overview of the DD-DXCCII with bufferedoutput followed by the design and analysis of a new voltage-mode first-order all-pass filter section based on a single DD-DXCCII In Section 3 nonideal and parasitic analysis of theproposed circuit is performed The feature of easy cascadi-bility is highlighted in Section 4 while Section 5 presents theresults of computer simulations of the proposed circuits usingthe PSPICE program Some conclusive remarks appear inSection 6

2 Proposed First-Order All-Pass Filter

Thedifferential difference dual-X current conveyor with buff-ered output has been proposed as an eight-terminal devicecharacterized by the following port relations

[[[[[[[[[[[

[

1198681199101

1198681199102

1198681199103

119881119909119901

119881119909119899

119868119911119901119894

119868119911119899119894

119881119908119899

]]]]]]]]]]]

]

=

[[[[[[[[[[

[

0 0 0 0 0 0

0 0 0 0 0 0

0 0 0 0 0 0

1 minus1 1 0 0 0

minus1 +1 minus1 0 0 0

0 0 0 1 0 0

0 0 0 0 1 0

0 0 0 0 0 1

]]]]]]]]]]

]

[[[[[[[

[

1198811199101

1198811199102

1198811199103

119868119909119901

119868119909119899

119881119911119899

]]]]]]]

]

(1)

Figure 1 shows the schematic symbol of a DD-DXCCII withbuffered output The CMOS implementation of DD-DXCCIIwith buffered output at 119885119899 is shown in Figure 2

The input side has three terminals (called 1198841 1198842 and1198843) and there are two 119883-terminals (119883119901 and 119883119899) At theoutput side there are three terminals 119885119901 119885119899 and 119882119899 Forthe119885119901 terminal the direction andmagnitude of the conveyed

DD-DXCCII

Y1

Y3

Y2

Zp

Zn

Xp Xn

Vy1

Vy3

Vwn

Vxp Vxn

Ixp Ixn

Izp

Izn

Wn

Figure 1 Schematic symbol of DD-DXCCII

current are the same as those of the current flowing in the119883119901-terminal whereas for the 119885119899 terminal the current is the sameas in the119883119899-terminalThe voltage that appears at terminal119882119899is equal to the voltage at 119885119899

The proposed tunable voltage-mode first-order all-passfilter section is shown in Figure 3 As can be seen the circuithas minimal complexity and employs a single DD-DXCCII asingle capacitor and an NMOS transistor biased in the trioderegion

The transfer function of an all-pass filter can be given as

119879AP =119881out119881in

=119904 minus 2119877119872119862

119904 + 2119877119872119862 (2)

where 119877119872 is the resistance of the MOSFET transistor (119872) inFigure 3 and is given by

119877119872 = [120583119899119862119900119909 (119882

119871) (119881119862 minus 119881119879)]

minus1

(3)

The Scientific World Journal 3

M15M16 M17 M18

M19

M20

Z119901

X119901M1 M2 M3 M7 M8

X119899

C119888

C119888

M13

M11 M12M14

M4M5 M6 M9 M10

V

V

V1198611

Z119899

M21 M22 M23 M24

M26

M27

M28 M29M30

Y3Y1

V1198612

M25

M31

M32

M33

M34 M35

M36

M37

M38

W119899

DD

SS

Figure 2 CMOS implementation of DD-DXCCII

DD-DXCCII

Zp

Y1

Zn Y3

Vin

Xp

Xn

C M

Vc

Wn

Vout

ID

Figure 3 Proposed tunable first-order all-pass filter

where 120583119899 119862119900119909 119881119879 119882 and 119871 are the surface mobility oxidecapacitance threshold voltage channel width and length ofMOS From (2) the pole frequency 1205960 can be expressed as

1205960 =2

119877119872119862 (4)

From (4) it is clear that the pole frequency of the all-pass filtercan be tuned by varying the resistance (119877119872) of the triodeMOS resistor (119872) The phase angle of the all-pass filter canbe expressed as

ang120601 = 120587 minus 2tanminus1 (1205961198621198771198722

) (5)

3 Nonideal Study

31 Effect of Nonideal Transfer Gain The port relationsdefining the DD-DXCCII as given in (1) correspond toan ideal device in which the current and voltage conveyingprocesses are deemed perfect For a more realistic under-standing of the operation of the circuit of Figure 3 thenonidealities associated with the DD-DXCCII need to be

taken into consideration The nonideal port relationship canbe expressed as

119881119909119901 = 12057311990111198811199101 minus 12057311990121198811199102 + 12057311990131198811199103

119881119909119899 = 12057311989911198811199101 minus 12057311989921198811199102 + 12057311989931198811199103

119868119911119901 = 120572119901119868119909119901 119868119911119899 = 120572119899119868119909119899

119881119908119899 = 120574119899119881119911119899

(6)

where 120573119901119894 (120573119899119894) is the voltage transfer gain from the 119884119894 port to119883119901 (119883119899) port where 119894 = 1 to 3 120572119901 (120572119899) is the current transfergain from the119883119901 port to 119885119901 port (119883119899 port to 119885119899 port) and 120574119899is the voltage transfer gain from 119885119899 port to119882119899 port (ideallythese transfer gains are unity in magnitude)

Using (6) the ideal transfer functions of the AP filtersection given in (2) yield the following nonideal transferfunction

119879AP nonideal =119881out119881in

=119904 minus (21205721199011205731119877119872119862)

119904 + (21205721199011205733119877119872119862) (7)

From (7) the nonideal pole frequency can be expressed as

1205960 nonideal =21205721199011205733

119877119872119862 (8)

Equation (8) shows that due to nonideal voltage and currenttransfer gain the pole frequency does get affected Thesensitivity analysis shows that the pole frequency due to thenonidealities is unity in magnitude

32 Effect of Parasitics The parasitics associated with theactual DD-DXCCII are the same as those of the DXCCII[23] In Figure 3 1198841 and 119885119901 port parasitics are in parallelthat is 11987711991011198771199111199011198621199101119862119911119901 1198843 and 119885119899 port resistances andcapacitances are also in parallel that is 11987711991031198771199111198991198621199103119862119911119899Also the 119883119901 and 119883119899 parasitics that is 119877119909119901 and 119877119909119899 mergewith the resistance of triode MOSFET The proposed circuitis reanalyzed by taking into account the above parasitics


Zp

Y1

Zn Y3

Vin

Xp

Xn Vc

Wn

ID

C1C2 Cn

Vout(n)

DD-DXCCII DD-DXCCII DD-DXCCII1 2 n

M1

Zp

Y1

Zn Y3 Xp

Xn Vc

Wn

IDM2

Zp

Y1

Zn Y3 Xp

Xn Vc

Wn

IDMn

Figure 4 Proposed tunable 119899th order all-pass filter

(assuming 119877119872 ≫ (119877119909119901 + 119877119909119899)) The nonideal transfer gaindue to parasitics then becomes

119879APparasitic =119881out119881in

= (119862 + 119862

1015840

119862)(

119904 minus 2119877119872 (119862 + 1198621015840)

119904 + 2119877119872119862)

(9)

where1198621015840 = 1198621199101119862119911119901 and since119862 ≫ 1198621015840 the transfer function

reduces to


= (119904 minus 2119877119872119862

119904 + 2119877119872119862) (10)

From (10) it is clear that the pole frequency is unaffected inthe presence of parasitics

4 Higher Order All-Pass Filter

It is well known that higher order filters exhibit a larger rateof phase change at constant magnitude when compared toa first-order filter They can also be used as a group delayequalizer in video and communication applications Thesefeatures are the motivating factor behind realizing a higherorder filter in this work The proposed 119899th order APF filter ispresented in Figure 4 which is obtained by cascading 119899-stagesof the first-order filter described in Figure 3 The proposedfilter employs 119899-stages of DD-DXCCII and 119899-capacitors andMOS resistors operating in the triode region

Analysis of the above circuit yields the following transferfunction

119879AP 119899th order =119881out119881in

= (119904 minus 211987711987211198621

119904 + 211987711987211198621

)

times (119904 minus 211987711987221198622

119904 + 211987711987221198622

) sdot sdot sdot (119904 minus 2119877119872119899119862119899

119904 + 2119877119872119899119862119899

)

(11)

From (11) the pole frequency can be expressed as

1205960 119899th order

= (2119899

(1198771198721 sdot 1198771198722 sdot sdot sdot 119877119872119899) sdot (1198621198721 sdot 1198621198722 sdot sdot sdot 119862119872119899))

1119899

(12)

Gai

n (d

B)Frequency

10 kHz 100 kHz 10 MHz 10 MHz 100 MHzminus20

minus10

0

10

201

0 d

90 d

180 d2

Phas

e (de

g)

f0(MHz) 4=

f0(MHz) 5=

f0(MHz) 6=

Figure 5 Frequency response showing gain and phase of APS ofFigure 3

5 Design and Verification

The performance of the first-order all-pass shown in Figure 3was verified using PSPICE program Supply voltages werekept at plusmn125V The proposed filter was designed with 119862 =

10 pF and gate control voltages are 119881119862 = 08V 10V and12V The gain and phase plot is shown in Figure 5 whichshows the variation in pole frequency at different controlwords As can be seen the pole frequency is varied from4MHz 5MHz and 6MHz at 119881119862 = 08V 10V and 12Vrespectively The time domain response of the proposed all-pass filter as shown in Figure 6 is obtained by applying asine wave of 80mV peak-to-peak amplitude at 6MHz Theoutput is 889∘ phases shifted which corresponds well withthe theoretical value of 90∘ The total harmonics distortionwas found to be 1 at pole frequency of 6MHz The Fourierspectrum of input and output waveform is also shown inFigure 7

The circuit proposed in Figure 4 is verified for a third-order filter that is 119899 = 3The filter was designed at119862 = 10 pFat different gate control voltages of the MOS transistor thatis 119881119862 = 08V 10V and 12V Simulated gain and phaseresponse at different pole frequencies is shown in Figure 8The pole frequencies are found to be 4MHz 5MHz and6MHz at a phase of minus90∘ The variation in pole frequency isobtained by varying the control word The total harmonicsdistortion (THD) variation of first- and third-order filter isshown in Figure 9 which shows that the THD variation isaround 3 up to 300mV of the variation in the input signalamplitude


Time0 s 200 ns 400 ns 600 ns

V(5)V(1)

minus100mV

0 V

100 mV

Vin Vout

Am

plitu

de

Figure 6 Time domain response of APS at 6MHz

Frequency0 Hz 20 MHz 40 MHz 60 MHz

V(1)V(5)

0 V

20 mV

40 mVVin

Vout

Am

plitu

de

Figure 7 Fourier spectrum of input and output at 6MHz

Frequency100 kHz 10 MHz 10 MHz 100 MHz

minus20

minus10

0

10

201

minus200d

0 d

minus360d

2

Phas

e (de

g)

180d

Gai

n (d

B)

f0(MHz) 4=

f0(MHz) 5=

f0(MHz) 6=

Figure 8 Frequency response showing gain and phase of 3rd orderAPS of Figure 4

012345678

0 100 200 300 400

THD

()

Input voltage (peak-to-peak (mV))

1st order3rd order

Figure 9 THD variation of 1st and 3rd order filter

6 Conclusion

In this paper a new active element that is DD-DXCCII withbuffered output is presented By employing DD-DXCCII anew voltage mode tunable resistorless all-pass filter usingsingle passive element is realized The proposed filter doesnot require any matching conditionThe filter has low outputimpedance which is elaborated by designing a third-orderfilter Nonidealities of the active element along with parasiticsare also considered so as to evaluate the proposed filter Thefilter reported in [23 24] is a currentmode all-pass filter whilethe filter presented in this work is a voltage mode all-passfilter

Conflict of Interests

The author declares that there is no conflict of interestsregarding the publication of this paper

Acknowledgment

The author would like to thank the editors for recommendingthis paper

References

[1] T Tsukutani H Tsunetsugu Y Sumi andN Yabuki ldquoElectron-ically tunable first-order all-pass circuit employing DVCC andOTArdquo International Journal of Electronics vol 97 no 3 pp 285ndash293 2010

[2] M A Ibrahim S Minaei and E Yuce ldquoAll-pass sections withrich cascadability and IC realization suitabilityrdquo InternationalJournal of CircuitTheory and Applications vol 140 pp 477ndash4882012

[3] S Maheshwari ldquoA canonical voltage-controlled VM-APS withgrounded capacitorrdquo Circuits Systems and Signal Processingvol 27 no 1 pp 123ndash132 2008

[4] S Minaei and O Cicekoglu ldquoA Resistorless realization of thefirst-order all-pass filterrdquo International Journal of Electronicsvol 93 no 3 pp 177ndash183 2006

[5] S Minaei and E Yuce ldquoNovel voltage-mode all-pass filter basedon using DVCCsrdquo Circuits Systems and Signal Processing vol29 no 3 pp 391ndash402 2010


[6] S Maheshwari ldquoHigh input impedance voltage-mode first-order all-pass sectionsrdquo International Journal of Circuit Theoryand Applications vol 36 pp 511ndash522 2008

[7] SMaheshwari ldquoHigh input impedanceVM-APSswith ground-ed passive elementsrdquo IET Circuits Devices and Systems vol 1no 1 pp 72ndash78 2007

[8] S Maheshwari J Mohan and D S Chauhan ldquoNovel voltage-mode cascadable all-pass sections employing grounded passivecomponentsrdquo Journal of Circuits Systems and Computers vol22 Article ID 1250065 2013

[9] A M Soliman ldquoGeneration of current conveyor-based all-pass filters from op amp-based circuitsrdquo IEEE Transactions onCircuits and Systems II Analog andDigital Signal Processing vol44 no 4 pp 324ndash330 1997

[10] J Mohan S Maheshwari and D S Chauhan ldquoVoltage modecascadable all-pass sections using single active element andgrounded passive componentsrdquo Circuits and Systems vol 1 pp5ndash11 2010

[11] K Pal and S Rana ldquoSome new first-order all-pass realizationsusing CCIIrdquo Active and Passive Electronic Components vol 27no 2 pp 91ndash94 2004

[12] N Herencsar J Koton J Jerabek K Vrba and O CicekogluldquoVoltage-mode all-pass filters using universal voltage conveyorand MOSFET-based electronic Resistorsrdquo Radioengineeringvol 20 no 1 pp 10ndash18 2011

[13] S Maheshwari ldquoVoltage-mode all-pass filters including mini-mum component count circuitsrdquo Active and Passive ElectronicComponents vol 2007 Article ID 79159 5 pages 2007

[14] M A Ibrahim H Kuntman and O Cicekoglu ldquoFirst-order all-pass filter canonical in the number of resistors and capacitorsemploying a single DDCCrdquo Circuits Systems and Signal Pro-cessing vol 22 no 5 pp 525ndash536 2003

[15] S Maheshwari and B Chaturvedi ldquoHigh-input low-outputimpedance all-pass filters using one active elementrdquo IET Cir-cuits Devices and Systems vol 6 no 2 pp 103ndash110 2012

[16] S Maheshwari and I A Khan ldquoNovel first order all-pass sec-tions using a single CCIIIrdquo International Journal of Electronicsvol 88 no 7 pp 773ndash778 2001

[17] S Minaei and E Yuce ldquoUnityvariable-gain voltage-modecurrent-mode first-order all-pass filters using single dual-Xsecond-generation current conveyorrdquo IETE Journal of Researchvol 56 no 6 pp 305ndash312 2010

[18] D Biolek and V Biolkova ldquoFirst-order voltage-mode all-pass filter employing one active element and one groundedcapacitorrdquo Analog Integrated Circuits and Signal Processing vol65 no 1 pp 123ndash129 2010

[19] M A Ibrahim H Kuntman S Ozcan O Suvak and OCicekoglu ldquoNew first-order inverting-type second-generationcurrent conveyor-based all-pass sections including canonicalformsrdquo Electrical Engineering vol 86 no 5 pp 299ndash301 2004

[20] B Metin and O Cicekoglu ldquoComponent reduced all-passfilter with a grounded capacitor and high-impedance inputrdquoInternational Journal of Electronics vol 96 no 5 pp 445ndash4552009

[21] A Toker S Ozcan H Kuntman and O Cicekoglu ldquoSup-plementary all-pass sections with reduced number of passiveelements using a single current conveyorrdquo International Journalof Electronics vol 88 no 9 pp 969ndash976 2001

[22] S Maheshwari J Mohan and D S Chauhan ldquoVoltage-modecascadable all-pass sections with two grounded passive compo-nents and one active elementrdquo IETCircuits Devices and Systemsvol 4 no 2 pp 113ndash122 2010

[23] P Beg M A Siddiqi and M S Ansari ldquoMulti output filter andfour phase sinusoidal oscillator using CMOS DX-MOCCIIrdquoInternational Journal of Electronics vol 98 no 9 pp 1185ndash11982011

[24] J Mohan and S Maheshwari ldquoCascadable Current-mode firstorder all-pass filter based on minimal componentsrdquoThe Scien-tific Word Journal vol 2013 Article ID 859784 5 pages 2013

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Journal ofEngineeringVolume 2014

Submit your manuscripts athttpwwwhindawicom

VLSI Design



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The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014

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Chemical EngineeringInternational Journal of Antennas and

Propagation




Navigation and Observation



DistributedSensor Networks



Table 1 Comparison of single active element based proposed and existing first-order circuits

Ref no Activeelement

No of passivecomponents Resistorless High input

impedanceLow outputimpedance

Supplyvoltages

Matchingconditionrequired

TunableHighestoperatingfrequency

[9] CCII 5 No Yes No mdash Yes No sim10 KHz[10] FDCCII 3 No Yes Yes plusmn33 V Yes No 159MHz[11] CCII 3 No Yes No mdash Yes No mdash[12] UVC 3 No Yes Yes plusmn25 V Yes Yes 117MHz

[13] CBTACCCDBA 3 No No Yes plusmn25 V No No 119KHz

[14] DDCC 2 No No No plusmn25 V No No 159MHz[15] DXCCII 23 No Yes Yes plusmn25 V No No 25MHz[16] CCIII 4 No No No mdash Yes No 1KHz[17] DXCCII 4 No Yes No plusmn125V Yes No 159MHz[18] VD-DIBA 1 Yes Yes Yes mdash No No 318KHz[19] ICCII 2 No No No plusmn25 V Yes No 370KHz[20] CCII 3 No Yes No plusmn25 V Yes No 1MHz[21] CCII 3 No No No mdash Yes No 159KHz[22] FDCCII 2 No Yes Yes plusmn3V No No 311MHzProposed DDDXCCII 1 Yes No Yes plusmn125V No Yes 4ndash6MHz

The rest of the paper is organized as follows Section 2presents a brief overview of the DD-DXCCII with bufferedoutput followed by the design and analysis of a new voltage-mode first-order all-pass filter section based on a single DD-DXCCII In Section 3 nonideal and parasitic analysis of theproposed circuit is performed The feature of easy cascadi-bility is highlighted in Section 4 while Section 5 presents theresults of computer simulations of the proposed circuits usingthe PSPICE program Some conclusive remarks appear inSection 6

2 Proposed First-Order All-Pass Filter

Thedifferential difference dual-X current conveyor with buff-ered output has been proposed as an eight-terminal devicecharacterized by the following port relations

[[[[[[[[[[[

[

1198681199101

1198681199102

1198681199103

119881119909119901

119881119909119899

119868119911119901119894

119868119911119899119894

119881119908119899

]]]]]]]]]]]

]

=

[[[[[[[[[[

[

0 0 0 0 0 0

0 0 0 0 0 0

0 0 0 0 0 0

1 minus1 1 0 0 0

minus1 +1 minus1 0 0 0

0 0 0 1 0 0

0 0 0 0 1 0

0 0 0 0 0 1

]]]]]]]]]]

]

[[[[[[[

[

1198811199101

1198811199102

1198811199103

119868119909119901

119868119909119899

119881119911119899

]]]]]]]

]

(1)

Figure 1 shows the schematic symbol of a DD-DXCCII withbuffered output The CMOS implementation of DD-DXCCIIwith buffered output at 119885119899 is shown in Figure 2

The input side has three terminals (called 1198841 1198842 and1198843) and there are two 119883-terminals (119883119901 and 119883119899) At theoutput side there are three terminals 119885119901 119885119899 and 119882119899 Forthe119885119901 terminal the direction andmagnitude of the conveyed

DD-DXCCII

Y1

Y3

Y2

Zp

Zn

Xp Xn

Vy1

Vy3

Vwn

Vxp Vxn

Ixp Ixn

Izp

Izn

Wn

Figure 1 Schematic symbol of DD-DXCCII

current are the same as those of the current flowing in the119883119901-terminal whereas for the 119885119899 terminal the current is the sameas in the119883119899-terminalThe voltage that appears at terminal119882119899is equal to the voltage at 119885119899

The proposed tunable voltage-mode first-order all-passfilter section is shown in Figure 3 As can be seen the circuithas minimal complexity and employs a single DD-DXCCII asingle capacitor and an NMOS transistor biased in the trioderegion

The transfer function of an all-pass filter can be given as

119879AP =119881out119881in

=119904 minus 2119877119872119862

119904 + 2119877119872119862 (2)

where 119877119872 is the resistance of the MOSFET transistor (119872) inFigure 3 and is given by

119877119872 = [120583119899119862119900119909 (119882

119871) (119881119862 minus 119881119879)]

minus1

(3)


M15M16 M17 M18

M19

M20

Z119901

X119901M1 M2 M3 M7 M8

X119899

C119888

C119888

M13

M11 M12M14

M4M5 M6 M9 M10

V

V

V1198611

Z119899

M21 M22 M23 M24

M26

M27

M28 M29M30

Y3Y1

V1198612

M25

M31

M32

M33

M34 M35

M36

M37

M38

W119899

DD

SS


DD-DXCCII

Zp

Y1

Zn Y3

Vin

Xp

Xn

C M

Vc

Wn

Vout

ID



1205960 =2

119877119872119862 (4)



) (5)

3 Nonideal Study



119881119909119901 = 12057311990111198811199101 minus 12057311990121198811199102 + 12057311990131198811199103

119881119909119899 = 12057311989911198811199101 minus 12057311989921198811199102 + 12057311989931198811199103

119868119911119901 = 120572119901119868119909119901 119868119911119899 = 120572119899119868119909119899

119881119908119899 = 120574119899119881119911119899

(6)




=119904 minus (21205721199011205731119877119872119862)

119904 + (21205721199011205733119877119872119862) (7)


1205960 nonideal =21205721199011205733

119877119872119862 (8)




Zp

Y1

Zn Y3

Vin

Xp

Xn Vc

Wn

ID

C1C2 Cn

Vout(n)


M1

Zp

Y1

Zn Y3 Xp

Xn Vc

Wn

IDM2

Zp

Y1

Zn Y3 Xp

Xn Vc

Wn

IDMn




= (119862 + 119862

1015840

119862)(

119904 minus 2119877119872 (119862 + 1198621015840)

119904 + 2119877119872119862)

(9)


reduces to


= (119904 minus 2119877119872119862

119904 + 2119877119872119862) (10)





119879AP 119899th order =119881out119881in

= (119904 minus 211987711987211198621

119904 + 211987711987211198621

)

times (119904 minus 211987711987221198622

119904 + 211987711987221198622


119904 + 2119877119872119899119862119899

)

(11)


1205960 119899th order

= (2119899


1119899

(12)

Gai

n (d

B)Frequency


minus10

0

10

201

0 d

90 d

180 d2

Phas

e (de

g)

f0(MHz) 4=

f0(MHz) 5=

f0(MHz) 6=







Time0 s 200 ns 400 ns 600 ns

V(5)V(1)

minus100mV

0 V

100 mV

Vin Vout

Am

plitu

de



V(1)V(5)

0 V

20 mV

40 mVVin

Vout

Am

plitu

de



minus20

minus10

0

10

201

minus200d

0 d

minus360d

2

Phas

e (de

g)

180d

Gai

n (d

B)

f0(MHz) 4=

f0(MHz) 5=

f0(MHz) 6=


012345678

0 100 200 300 400

THD

()


1st order3rd order


6 Conclusion




Acknowledgment


References




























RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation










M15M16 M17 M18

M19

M20

Z119901

X119901M1 M2 M3 M7 M8

X119899

C119888

C119888

M13

M11 M12M14

M4M5 M6 M9 M10

V

V

V1198611

Z119899

M21 M22 M23 M24

M26

M27

M28 M29M30

Y3Y1

V1198612

M25

M31

M32

M33

M34 M35

M36

M37

M38

W119899

DD

SS


DD-DXCCII

Zp

Y1

Zn Y3

Vin

Xp

Xn

C M

Vc

Wn

Vout

ID



1205960 =2

119877119872119862 (4)



) (5)

3 Nonideal Study



119881119909119901 = 12057311990111198811199101 minus 12057311990121198811199102 + 12057311990131198811199103

119881119909119899 = 12057311989911198811199101 minus 12057311989921198811199102 + 12057311989931198811199103

119868119911119901 = 120572119901119868119909119901 119868119911119899 = 120572119899119868119909119899

119881119908119899 = 120574119899119881119911119899

(6)




=119904 minus (21205721199011205731119877119872119862)

119904 + (21205721199011205733119877119872119862) (7)


1205960 nonideal =21205721199011205733

119877119872119862 (8)




Zp

Y1

Zn Y3

Vin

Xp

Xn Vc

Wn

ID

C1C2 Cn

Vout(n)


M1

Zp

Y1

Zn Y3 Xp

Xn Vc

Wn

IDM2

Zp

Y1

Zn Y3 Xp

Xn Vc

Wn

IDMn




= (119862 + 119862

1015840

119862)(

119904 minus 2119877119872 (119862 + 1198621015840)

119904 + 2119877119872119862)

(9)


reduces to


= (119904 minus 2119877119872119862

119904 + 2119877119872119862) (10)





119879AP 119899th order =119881out119881in

= (119904 minus 211987711987211198621

119904 + 211987711987211198621

)

times (119904 minus 211987711987221198622

119904 + 211987711987221198622


119904 + 2119877119872119899119862119899

)

(11)


1205960 119899th order

= (2119899


1119899

(12)

Gai

n (d

B)Frequency


minus10

0

10

201

0 d

90 d

180 d2

Phas

e (de

g)

f0(MHz) 4=

f0(MHz) 5=

f0(MHz) 6=







Time0 s 200 ns 400 ns 600 ns

V(5)V(1)

minus100mV

0 V

100 mV

Vin Vout

Am

plitu

de



V(1)V(5)

0 V

20 mV

40 mVVin

Vout

Am

plitu

de



minus20

minus10

0

10

201

minus200d

0 d

minus360d

2

Phas

e (de

g)

180d

Gai

n (d

B)

f0(MHz) 4=

f0(MHz) 5=

f0(MHz) 6=


012345678

0 100 200 300 400

THD

()


1st order3rd order


6 Conclusion




Acknowledgment


References




























RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation










Zp

Y1

Zn Y3

Vin

Xp

Xn Vc

Wn

ID

C1C2 Cn

Vout(n)


M1

Zp

Y1

Zn Y3 Xp

Xn Vc

Wn

IDM2

Zp

Y1

Zn Y3 Xp

Xn Vc

Wn

IDMn




= (119862 + 119862

1015840

119862)(

119904 minus 2119877119872 (119862 + 1198621015840)

119904 + 2119877119872119862)

(9)


reduces to


= (119904 minus 2119877119872119862

119904 + 2119877119872119862) (10)





119879AP 119899th order =119881out119881in

= (119904 minus 211987711987211198621

119904 + 211987711987211198621

)

times (119904 minus 211987711987221198622

119904 + 211987711987221198622


119904 + 2119877119872119899119862119899

)

(11)


1205960 119899th order

= (2119899


1119899

(12)

Gai

n (d

B)Frequency


minus10

0

10

201

0 d

90 d

180 d2

Phas

e (de

g)

f0(MHz) 4=

f0(MHz) 5=

f0(MHz) 6=







Time0 s 200 ns 400 ns 600 ns

V(5)V(1)

minus100mV

0 V

100 mV

Vin Vout

Am

plitu

de



V(1)V(5)

0 V

20 mV

40 mVVin

Vout

Am

plitu

de



minus20

minus10

0

10

201

minus200d

0 d

minus360d

2

Phas

e (de

g)

180d

Gai

n (d

B)

f0(MHz) 4=

f0(MHz) 5=

f0(MHz) 6=


012345678

0 100 200 300 400

THD

()


1st order3rd order


6 Conclusion




Acknowledgment


References




























RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation










Time0 s 200 ns 400 ns 600 ns

V(5)V(1)

minus100mV

0 V

100 mV

Vin Vout

Am

plitu

de



V(1)V(5)

0 V

20 mV

40 mVVin

Vout

Am

plitu

de



minus20

minus10

0

10

201

minus200d

0 d

minus360d

2

Phas

e (de

g)

180d

Gai

n (d

B)

f0(MHz) 4=

f0(MHz) 5=

f0(MHz) 6=


012345678

0 100 200 300 400

THD

()


1st order3rd order


6 Conclusion




Acknowledgment


References




























RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation































RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation









research article tunable first-order resistorless all-pass filter … · 2019. 7. 31. · research...

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