QUESTION BANK 2019

SIDDHARTH GROUP OF INSTITUTIONS :: PUTTUR(AUTONOMOUS)

Siddharth Nagar, Narayanavanam Road 517583

QUESTION BANK (DESCRIPTIVE)

Subject with Code : Linear IC Applicatons (16EC417) Course & Branch: B.Tech - ECE & EEE

Year & Sem: III-B.Tech & I-Sem Regulation: R16

UNIT IDIFFRENTIAL AMPLIFIER & OP AMP

1. a) Compare different configurations of differential amplifier. [L2][CO1][5M] b) Draw the circuit of basic current mirror and explain its operation [L2][CO1][5M]2. a) Draw and explain the various functional blocks of an operational amplifier IC .[L2][CO1][5M] b) Draw the equivalent circuit diagram of Op amp and explain the voltage transfer curve?

[L2][CO1][5M]3. a) What is level translator? Explain the necessity of level translator stage in cascading differential

amplifiers. [L1][CO1][5M] b) Explain DC analysis of differential amplifier. [L2][CO1][5M]4. a) Discuss the DC characteristics of an OP-AMP in detail. [L2][CO1][6M] b) Explain about open loop op-amp configurations [L2][CO1][4M]5. a). Explain about the virtual ground concept. [L2][CO1][4M] b). Explain how the constant current bias circuit is replaced by the current mirror circuit?

[L2][CO1][6M]6. a) Explain about current mirror circuit diagram. . [L2][CO1][5M]

b) Compare and contrast ideal and practical op-amp? [L2][CO1][5M]7. Calculate the amplification factor for AC signal input in dual input balanced output differential amplifier? . [L1][CO1][10M]

8. Design the dual input balanced output differential amplifier to meet the following specifications and draw the circuit with designed values.

Rc= 2.2KΩ, RE = 4.7KΩ, Rin1= Rin2= 50Ω, +Vcc = +10V, -VEE= -10V and the transistor is The CA 3086 with βdc= βac= 100 and VBE= 0.715 V typically.

a). Determine the Icq and VCEq b). Determine Voltage gain c). Determine the input and output resistances? [L2][CO1][10M]

9. a) Why is Re in an emitter coupled differential amplifier replaced by a constant current source with circuit Diagram? . [L1][CO1][5M]

b) Explain the differential amplifier with a neat circuit diagram. [L2][CO1][5M]10. Calculate the amplification factor for AC signal input in single input balanced output differential amplifier? [L3][CO1][10M]

Linear IC Applications Page 1

QUESTION BANK 2019

UNIT IIFEEDBACK AMPLIFIERS & FREQUENCY RESPONSE

1. Explain in detail about external frequency compensation techniques with neat sketches. [L2] [CO2][10M]2. a) Derive the input resistance and output resistance for a voltage shunt feedback Amplifier. [L2][CO2][6M] b) Compare voltage series and voltage shunt feedback circuits, [L4][CO2][4M]3. a) Derive the expression for closed-loop gain for practical inverting op amp. . [L2][CO2][5M] b) Write the difference between compensating and un compensating networks. [L2][CO2][5M]4. a) The op-amp non-inverting amplifier and derive the voltage gain? [L1][CO2][5M] b) Explain the term Slew Rate and derive the exression for it. [L2][CO2][5M] 5. a).What is the voltage at point A and B for the circuit shown in figure below, if V1 = 5 V and V2 = 5.1 V. . [L2][CO2][5M]

b) Explain about the dominant pole frequency compensation network. [L2][CO2][5M]6. a) Explain the term slew rate and write the importance in op-amp circuits [L2][CO2][5M] b) Draw and Explain the high frequency equalent model of the op-amp [L2][CO2][5M]7. a) Draw the circuit of differential amplifier with one Op-Amp and derive the expression voltage gain and input resistance [L1][CO3][5M] b)Explain the importance of the stability criterion of the op-amp [L2][CO2][5M]8. a). Explain voltage series feed back amplifier with Voltage gain and input resistance. [L1][CO2][5M] b Explain about the pole zero frequency compensation network. [L2][CO2][5M]9. a) In inverting feed back op-amp R1= 10KΩ, Rf= 100KΩ and Vin= 1V then the load of 25 KΩ is

connected to the output terminal, calculate I1, Vo, IL and Io. [L2][CO2][5M] b) Define input bais current, input offset current and input offset voltage. [L2][CO2][5M]10. a) Explain the internal compensating technique. [L2][CO2][6M] b) What do you know about the unity gain bandwidth product. [L4][CO2][4M]

UNIT III

Linear IC Applications Page 2

QUESTION BANK 2019

LINEAR APPLICATIONS AND ACTIVE FILTERS

1. a) Explain &Derive the expression for 3 input summing amplifier with circuit diagram?[L2][CO3][7M]

b) What is the need of Current to Voltage Converter? [L1][CO3][3M]2. a) The op-amp non-inverting summing circuit has the following parameters VCC = +15 V, VEE = -15V, R = R1= 1 kΩ, Rf = 2 kΩ, V1 = +2 V, V2 = -3 V, V3 = +4 V. Determine the output voltage Vo.. [L1][CO3][7M] b). Write the design steps of the second order low pass filter and draw its circuit. [L1][CO3][3M]3. a) Design a differentiator to differentiate an input signal that varies in frequency from 10 Hz to about 1 kHz [L2][CO3][5M] b) Write short notes on V-I and I-V converters using op-amps. [L1][CO3][5M]4. Draw the circuit diagram of the instrumentation amplifier and derive the gain? [L1][CO3][10M]5 a).Explain the operation of first order low pass butter worth filter. [L2][CO3][5M] b). Design a second order low pass filter for a cutoff frequency of 100 Hz and draw the circuit

diagram. [L1][CO3][5M]6. a) Explain &Derive the expression for 2 input subtractor amplifier with circuit diagram?

[L2][CO3][5M] b) Derive the output voltage VO of practical differentiator circuit

[L1][CO3][5M]7. a) Draw a neat circuit of an integrator circuit. Explain the functioning with the input-output waveforms [L2][CO3][7M] b) Derive the output voltage VO of practical integrator circuit

[L1][CO3][3M]8. a) Design and explain the operation of inverting summing amplifier. [L2][CO3][5M] b) What is voltage follower? What are its features and applications? [L1][CO3][5M]9. Draw the frequency resonses of ideal&practical integrator and differentiator circuits

[L2][CO3][10M]10. Explain &Derive the expression for 3 input non-inverting summing amplifier with circuit diagram?

[L2][CO3][10M]

Linear IC Applications Page 3

QUESTION BANK 2019

UNIT IV

NON LINEAR APPLICATIONS & SPECIALIZED APPLICATIONS 1. a).Draw and explain the operation of Wein bridge oscillator and write its frequency expression

[L2][CO4][5M]b). Explain the saw tooth wave generator with neat circuit diagram. [L2][CO4][5M]

2. Draw the circuit diagram of RC phase shift oscillator and derive the expression for its frequency of oscillations. [L3][CO4][10M]

3. a) Explain in which the 555 timer can be used as monostable multivibrator [L1][CO4][5M]b) Draw the block diagram of PLL and explain its operation. [L1][CO4][5M]

4. a). Explain in which the 555 timer can be used as Astable multivibrator [L2][CO4][5M] b). Draw the circuit of PLL as frequency multiplier and explain its working. [L1][CO4][5M]

5. a).Configure a 555 timer as a Schmitt trigger and explain. [L1][CO4][5M]b).Explain frequency translation and FSK demodulation using 565PLL. [L2][CO4][5M]

6. a). What is the purpose of law pass filter in a phase Locked Loop? Describe different types of law pass filters used in a PLL. [L1][CO4][5M]

b). Explain the comparator and zero crossing detector. [L2][CO4][5M] 7. a). Explain the performance parameters of multiplier [L2][CO4][5M]

b).Discuss the applications of Astable multivibrator? [L1][CO4][5M]8. a). Explain the square wave generator with neat circuit diagram. [L2][CO4][5M]

b). Explain the basic multiplier and its characteristics. [L2][CO4][5M]9. a). What are the conditions to be satisfied by a circuit to produce oscillations [L1][CO4][3M]

b). Generate a triangular wave from the square wave with a neat expressions? [L1][CO4][7M]10. Explain in detail about wide bandwidth Precision Multiplier and its Applications. [L2][CO4][10M]

UNIT- VCONVERTERS

Linear IC Applications Page 4

QUESTION BANK 2019

1. Draw and explain successive approximation type ADC? [L1][CO5][10M]2. Draw and explain in detail about R-2R DAC. [L1][CO5][10M]3. Draw the circuit diagram of Dual Slope ADC and explain its working with neat

sketches. [L1][CO5][10M]4. a) Explain the operation of Weighted Resistor DAC with the help of circuit

diagram. [L2][CO5][6M] b).The basic step of a 9 bit DAC is 10.3 mV. If 000000000 represents 0 V. What output is produced if the input is 101101111? [L1][CO5][4M] 5. a). LSB of a 9 - bit DAC is represented by 19.6 mv. If an input of 9 zero bits is Represented by 0

volts. i. Find the output of the DAC for an input 10110 1101 and 01101 1011.

ii. What is the full scale reading (FSR) of this DAC? [L1][CO5][7M] b). Discuss the parameters specifications of ADC? [L1][CO5][3M]

6. a). Calculate the no. of bits required to represent a full scale voltage of 10 V with a resolution of 5mV approximately. [L1][CO5][3M]b). An 8-bit Analog to Digital converter has a supply voltage of +12 volts. Calculate: (i) The voltage step size for LSB. (ii) The value of analog input voltage for a digital output of 01001011 [L1][CO5][7M].

7. a). Draw and explain the weighted resistor DAC? [L1][CO5][5M]b). Explain about ladder type DAC? [L1][CO5][5M]

8. Draw the circuit diagram of single Slope ADC and exp lain its working with neat Sketches [L2][CO5][10M]

9. a). Explain about the sample and hold circuits? [L2][CO5][5M]b). Explain about flash type ADC? [L2][CO5][5M]

10. Explain about counter type ADC? [L2][CO5][10M]

Prepared by: 1. J.Rajanikanth

Associate Professor/ECE 2. U.Srinivasulu

Assistant Professor/ECE

Linear IC Applications Page 5

SIDDHARTH GROUP OF INSTITUTIONS :: PUTTURSiddharth Nagar, Narayanavanam Road 517583

QUESTION BANK (OBJECTIVE)

Subject with Code : Linear IC Applications(16EC417) Course & Branch: B.Tech - ECE &EEE

Year & Sem: III-B.Tech & I-Sem Regulation: R16

QUESTION BANK 2019

UNIT –I

DIFFRENTIAL AMPLIFIER & OP AMP

1. An ideal OP-AMP is an ideal [GATE-2002]2. Differential amplifier is ----------coupled amplifier3. The other name of voltage follower is4. For large CMRR, ACM should be5. Open loop operation of op-amp has output6. Common mode rejection ratio can be expressed as7. The ideal input impedance range of op-amp is8. A monolithic circuit means9. Military grade op-amp be operated in the temperature range of10. IC-741 op-amp has typical gain of in dB

11. The ideal OP-AMP has the following characteristics[GATE-2001]12. Which of the following amplifier compensates for drift?13. DC character of op-amp are14. The gain of the Inverting amplifier is_______15. For an ideal Op-Amp, the value of input offset voltage is 16. For an ideal Op-Amp, the value of input offset current is 17. For an Practical Op-amp the typical value of input resistance is 18. For an ideal Op-amp the typical value of input resistance is 19. For an Op-amp the typical value of CMRR is 20. For an Op-amp the typical value of Slew rate is 21. The value of Band width for an ideal op-amp is -------22. In a differential amplifier, CMRR can be improved by using an increased [GATE-1998]23. The op-amp voltage follower circuit is also known as ------24. The temperature range in which 741 IC op-amps is used is -----25. Offset adjustment in an op-amp is done with the pin numbers ------26. For an op-amp Inverting & non- inverting pins are -----27. The chip size of SSI chip is ----28. The chip size of MSI chip is ----29. The chip size of LSI chip is ----30. The open loop voltage gain of op-amp is ------31. Which of the following characteristics do not necessarily applied to the op-amp 32. IC 741 op-amp has typical gain of ---33. A change in the value of the emitter resistance, RE, in a differential amplifier [GATE-1995]34. The ideal input impedance range of op-amp is 35. A chip having more than 150 logic gates is known as -----36. A good op-amp has ----37. When an op-amp is operated in common mode fashion, CMRR should be ----

38. The emitter coupled pair of BJT’s given a linear transfer relation between the differential Output voltage and the differential input voltage Vid, only when the magnitude of Vid is less α times the thermal voltage, where α is [GATE-1998]

39. Decibel is defined in terms of –40. The basic element op-amp ---

UNIT –II

Linear IC Applications Page 6

QUESTION BANK 2019

SPE FEEDBACK AMPLIFIERS & FREQUENCY RESPONSE

1. If the differential voltage gain and the common mode voltage gain of a differential amplifier are 48 dB and 2 dB respectively, then common mode rejection ratio is [GATE-2003]

2. In a Negative feedback amp the phase difference between input signal & feedback signal is –3. The noise in a negative feedback amplifier ------4. In a Shunt – Shunt negative feedback amplifier, as compared to the basic amplifier [GATE-1998]

5. The negative feedback increases --------6. Negative feedback in an amplifier [GATE-1999]

7. In a negative feedback amplifier the bandwidth is given by ------8. A good current buffer has [GATE-2004]9. The current series feedback amplifier is also known as -----10. The term selectivity is given by -----

11. Negative feedback in a closed loop control system DOES NOT [GATE-2015] 12. The series feedback connection increases the ------13. The current shunt feedback amplifier is called as –14. In voltage shunt feed back op-amp output resistance –

15. The input impedance (Zi) and output impedance (Zo) of an ideal Transconductance (voltage controlled current source) amplifier are [GATE-2006]

16. In voltage series –ve feedback op-amp frequency response is --17. In voltage series –ve feedback op-amp frequency distortion is --18. In a negative feedback amplifier using voltage-series (Voltage sampling and series mixing) feedback,

[GATE-2002]19. Negative feedback in Current Shunt configuration [GATE-1997]20. In a positive feedback amp the phase difference between input signal & feedback signal is –21. The frequency compensation is used in operational amplifiers is to increase its ___________ 22. From a measurement of the rise time of the output pulse of an amplifier, whose input is a small Amplitude square wave, one can estimate the following parameter of the amplifier [GATE-1998]23. When the non-inverting. Amplifier is configured for unity gain it is called as 24. Voltage series feedback (also called series-shunt feedback) results in [GATE-2004] 25. The application of differential amplifier is 26. The effect of current shunt feedback in an amplifier is to [GATE-2005]27. The voltage series –ve feedback configuration is commonly called a---- amplifier with feedback.28. The voltage shunt feedback configuration is called a ------- amplifier with feedback.29. The use of negative feedback amplifier in non-inverting amplifier increases ------30. Negative feedback in Current Shunt configuration [GATE-1997]31. The special case of the non-inv. Amplifier is -----32. The differential amplifier with one op-amp as the same characteristics as the -----33. Positive feedback is necessary in ----- circuit34. The use of negative feedback amplifier in non-inverting amplifier increases ------35. The current to voltage converter produces output voltage proportional to --36. Negative feedback in amplifiers [GATE-1993]37. To obtain very high input and output impedance in a feedback amplifier, the topology mostly

Used is [GATE-1995]38. Negative feedback in Voltage Series configuration [GATE-1997]39. All pass filters are also called40. The gain of filter is expressed in

Linear IC Applications Page 7

QUESTION BANK 2019

UNIT –IIILINEAR APPLICATIONS AND ACTIVE FILTERS

1. For the OP-AMP circuit shown in the figure, Vo is [GATE-2007]

2. If the input is a sine wave, the inverting amplifier (output) will produce ____ phase shift3. An op-amp current to voltage converter is also called 4. One input terminal of high gain comparator circuit is connected to ground and a sinusoidal voltage is applied to the other input. The output of comparator will be [GATE-1998]5. A logarithmic amplifier can be used as 6. If a square wave is integrated by integrator using operational amplifier, the output is7. An OP-AMP is used as a zero crossing detector. If the maximum output available from the OP- AMP is ±12 volts peak to peak, and the slew rate of the OP-AMP is 12 V/µsec, then the maximum frequency of the input signal that can be applied without causing a reduction in the peak to peak output is ___________ [GATE-1998]8. For a practical differentiator, the time period T of the input signal is9. When a sine signal is given as input to differentiator, the output is10. The comparator using op-amp with input sine waveform gives11. The output of Schmitt trigger is 12. The other name of Schmitt trigger is 13. The total time period of the pulse from monostable multivibrator is14.The single output pulse of adjustable time direction in response to triggering signal is from _______ circuit.15.The other name of astable multivibrator is

16. The frequency of oscillation of triangular waveform from generator using op-amp 17. A comparator is _______ and gives _______ output.18. Schmitt trigger is comparator ________ feedback.19. A triangular wave can be generated by integrating20. The application of open-loop operation of op-amp is

21. The input offset voltage of the practical Op-amp in the order of the ______ 22. The gain of an instrumentation amplifier is varied by a single______ 23. An Op-amp current to voltage converter is also called as______ 24. An active integrator may be used to convert a square wave into a______wave 25.The application of op-amp in non-linear region is 26. The gain of the Inverting amplifier is_______ 27. The gain of the Non inverting amplifier_______ 28. Instrumentation amplifier is used to produce the gain range of__________ 29. What is the output voltage of average adder circuits if 3 inputs are applied____ 30. What is the voltage gain of the unity follower 31. Current to voltage converter is also called -------- 32. Zero crossing detector can be used as ------- 33. The Astable multivibrator is also called --------- 34.The slew rate of the instrumentation amplifier must be as --------- 35. Practical Integrator circuit is also called --------

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QUESTION BANK 2019

36. The output voltage of a particular op-amp increases 8 v in 12µsec in response to step voltage on the input .The slew rate is 37. The voltage gain of a voltage follower is 38. The highest possible impedance is achieved with the 39. The voltage gain of a non inverting op-amp amplifier 40. An op-map current to voltage converter is also known as ------

UNIT IVNON LINEAR APPLICATIONS & SPECIALIZED APPLICATIONS

1. The amount of voltage across capacitor is get charged and discharged in astable2. Amount of time taken by the capacitor to charge 1/3 Vcc to 2/3 Vcc is3. The duty cycle of a symmetric square worm of astable is4. The out put frequency of a symmetric square worm of astable is5. Voltage to frequency conversion factor Kv of a VCO is defined as6. Voltage to frequency conversion factor Kv of a VCO is7. Which Multivibrator does not require a input (Clock pulse or other). 8 .The output frequency of a FSk generator is9. The duty cycle of a symmetric square worm is10. The VLTP and ULTP OF Schmitt trigger is11. Application of monostable multivibrator is12. __________is applied to make the output is voltage is zero13. ________multivibrator having two quasi stable states14. _______ detector I better capture and locking characteristics as the DC output voltage islinear up to 360º15. Which one is true in the locking or tracking range16. Applications of PLL are17. The error voltage for analog phase detector Ve is18. The pulse width of the mono stable multivibrator is19.The output frequency fo of VCO is given by20. Conversion ratio o f the phase detector of 565IC PLL is KØ =21. The phase shift φ should be inn locked state is22. At what phase angle of φ the fo should deviate from centre to the right side in proportional to the error voltage23. At what phase angle of φ the fo should deviate from Centre to the right side in proportional to the error voltage24. The out put frequency of the phase detector is25.________ logic gate is used to perform the digital phase detection26. The frequency of oscillation to of phase shift oscillator using op-amp is given by27. A comparator is ------ & gives______28. Schmitt trigger is comparator ------ feed back29. A triangular wave can be generated by integrating ----30. The other name of A stable multivibrator is ---31. The comparator using op-amp with input sine wave form gives ---32. In the following Astable Multivibrator circuit, which properties of Vo(t) depend on R2 ? [GATE-2009]

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QUESTION BANK 2019

33. The frequency of oscillations of triangular waveform generator using op-amp is –34. The frequency of oscillations to of phase shift using op-amp is given by ----35. The gain of inverting op-amp in a phase shift oscillator (Av) is ---36. For self-sustain oscillations, the conditions to be satisfied for op-amp oscillators are ---37. The VCO is otherwise called as ----38. The filter used in PLL is ---39. IC 566 functions as -----40. IC PLL 565 is called ---

UNIT V

CONVERTERS

1. Which type of ADC is chosen for noisy environment? [GATE-2015] 2. How to overcome the drawback of the charge balancing ADC? [GATE-2015] 3. Which among the following has long conversion time? [GATE-2015] 4. In which application dual slop converter are used. [GATE-2015] 5. .A dual slope has the following specifications: [GATE-2015] 16bit counter; Clock rate =4 MHz; Input voltage=12v; Output voltage =-7v and Capacitor=0.47µF. If the counters have cycled through 2n counts, determine the value of resistor in the integrator.6. . A 12 bit dual ramp generation has a maximum output voltage of +12v. Compute the equivalent digital number for the analog signal of +6v. [GATE-2015] 7. In integrating type ADCs, the [GATE-2015] 8. An analog voltage of 3.41 V is converted into 8-bit digital form by an A/D converter with a reference voltage of 5 V. The digital output is [IES-2014] 9. In which of the following types of A/D converter does the conversion time almost double for every bit

added to the device ? [IES-2014] 10. A 10-bit DAC provides an analog output which has a maximum value of 10.23 volts.Resolution of the DAC is [IES-2014] 11. The most commonly used amplifier in Sample and Hold circuits is [GATE-2000] 12. The fastest ADC techniques is 13. In which of the following type DAC, current flowing in the resistors changes as the input data changes 14. The output of a DAC can be 15. The R-2R ladder type DAC has drawback of 16. How many levels are possible 2-bit DAC? 17. A V/F converter circuit is used in 18. ---------- of ADC gives error when analog signal changes rapidly. 19. For an 8-bit DAC, the resolution is -------of the full- scale range. 20. Quantization error is the characteristics of 21. The process is which a number of analogue signals, one at a time, are connected to a common load is

called22. A low speed ADC converter is

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QUESTION BANK 2019

23. The basic step of a 9-bit DAC is 10.3 mV. If 000000000 represents 0 V, what output is produced if the input is 101101111? 24. Which of the following belongs to integrating type ADC converters? 25. The property of DAC in which analog output increases with digital input is called26. % resolution of a 10 bit ADC is 27. The S/H circuit is not needed for --- ADC28. D/A converters requires – of A/D conversion29. What is the resolution of output range (0-3)V of DAC30. The advantage of ADC of dual slope type is –31. DAC essentially requires ----32. The resolution of DAC for 8-bit length is 33. The fastest ADC techniques is 34. A Low speed ADC is 35. The main drawbacks of dual-slope ADC converters is36. % resolution of a 10 bit ADC is37. High Speed & excellent resolution is obtained in 38. A typical digital-to-analog converter outputs an analog signal, which is usually________ that is

proportional to the value of the digital code provided to its inputs. 39. The R-2R ladder type DAC has drawback of 40. ---------- of ADC gives error when analog signal changes rapidly.

Prepared by: 1. J.Rajanikanth

Associate Professor/ECE 2. U.Srinivasulu

Assistant Professor/ECE3. G.Prasad Kumar

Assistant Professor/ECE

Linear IC Applications Page 11