quality controls
DESCRIPTION
Example of a good BGA (from a FED). BGA assembly verified with 3D X-Ray. Solder ball re-flow checked using Ersascope. Ersascope picture (not from FED). Final (optional) test of fully assembled boards using a “Fixtureless” Test Station. (Takaya 9400) with 4 probes. Quality Controls. - PowerPoint PPT PresentationTRANSCRIPT
Quality Controls
Assembly process:
At each stage of the assembly process strict quality controls are applied.- Solder paste height is measured prior to surface mount.- Re-flow ovens profiled using populated boards.
Photographs courtesy of DDi Technologies Limited.
Final (optional) test of fully assembled boards using a “Fixtureless” Test Station. (Takaya 9400) with 4 probes.
Surface mount assembly checking with Fully Automatic Optical Inspection (AOI) (Diagnosis VisionPoint, ~100 components per minute)Programmed using a “gold” board and ODB++ data.Detects component misplacements, incorrect part nrs, poor solder joints, solder bridges.
(N.b. AOI example is not from a FED)
BGA assembly verified with 3D X-Ray.Solder ball re-flow checked using Ersascope.
Example of a good BGA (from a FED)
Ersascope picture (not from FED)
(example is not from a FED)
-Future Plans
Quality Controls
1. Custom Tests atAssembly Plant
BScan, VME crate
3. Tests at CERNPrevessin
Readout Integration
2. Tests at RAL &IC
OptoRx, Full crate
4. Installation at CMSUSC55
0. Quality Controlsduring Assembly
processAOI, X-ray Boundary Scan Testing for Digital
Testing by Assembly plant operatives
0. Assembly ProcessQuality Checks
E.g. AOI
2. Fit FrontPanelDeflector Bar
Jumpers
1. VisualInspection
Multimeter tests
3. Serial NrFit FP label & 2D
Bar code
4. Insert in CrateCheck formechanics
5. Power On CrateVerify LEDs
6. Boundary ScanSave results
7.Program EPROM(change Jumper)
8.Power Reset
buttonVerify LEDs
10.Test Serial EPROM
Load with Ser Nr, Date etcJumper for Write Protect
9.Test VME Access
11.Test FPGA loadingInsert CFlash Card
Power ResetVerify LEDs for Load Done
Flashing Clocks
12.Run Test Bench Programs:Exercise FPGA Registers
Read TemperaturesRead Voltages
Scan DACs and OptoRx settings capture data
13.Final Tests
Box up
Results of Operator Checks andProgrammable Tests should go to
Dbase
For details of tests and checksand acceptance criteria see
detailed diagrams
VME Crate Testing for Analogue
Test Flow from Assembly Plant to USC55
500 boards to test over 10 months. Essential to catch any manufacturing faults early.