PSoC Designer Module 1: Introduction to PSoC

2

Module Outline

Section 1: Introduction to PSoC

Section 2: PSoC Designer™ IDE Software

Section 3: Hands-On Example Project

PSoCAn Introduction

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What is a PSoC Mixed Signal Device?

PSoC combines: • the familiarity of a microcontroller• the configurability of an CPLD• the capabilities of an Mixed –

Signal Array

P rogrammableS ystemo nC hip

5

What is PSoC?

PSoC Devices Features:

• Configurable Analog Blocks• Implement ADCs, DACs, filters, amplifiers, comparators, etc.

• Configurable Digital Blocks• Implement timers, counters, PWMs, UART, SPI, IrDA, etc.

• 4KB to 32KB of Flash memory for program storage• 256B to 2KB of SRAM for data storage• M8C Microcontroller: 4 Million Instructions Per Sec

6

What is PSoC?Inputs• Each pin can sink 25mA• Programmable filters• Flexible sensor interface I/O• 3 types of ADCs, up to 4

Processing• Fast M8 Microcontroller Core• Multiply Accumulate

Outputs• Each pin can source 10mA• Up to 16 PWMs, Timers, Counters• Up to 9-bit DACs, 14-bit ADCs

Support Functions• EEPROM• Sleep Options• Watch Dog Timer• Low voltage detect

71

6k F

las

h

POR

SROM

M8 CPU

BandGap

RAM

PUMP

MAC

PLL/Osc32K Osc

Dec.

GPIO

CY8C27XXX – PSoC 1208

PSoC Die

8

PSoC Architecture

InterruptController

LVDSupervisor

WatchdogSleep Timer

Decimator

SMPI2C

SRAMMemory

(up to 2K)

M8CCPUCore

MAC MultiplyAccumulate (up to 2)

FlashProgramMemory(up to32K)

SystemClocking

Generator

24 MHzInternal

Oscillator

Digital PSoC Block Array

Analog PSoC Block Array

ProgrammableInterconnect

and Logic

Analog InputMuxing

Analog OutputDrivers

Port 5

Port 4

Port 3

Port 2

Port 1

Port 0

Co

nfigura

ble I/O P

orts

System

Bu

s

BB

BB

BB

BB

CB

CB CB

CB

CT CT CT CT

SC

SC

SC SC

SC SC

SC

SC

Clocks

BB BB CB CB

BB BB CB CB

Port 6

Port 7

UART

PWM_16

Filter

AD

C

ADC(Decimator)

ADC

I2CSlave, Master, Multimaster

LCD

9

Analog Functions (Subset)•ADC Incremental 6-14 bits Delta Sigma 6-13 bits•DAC 6, 8, and 9 bit 6 and 8 bit multiplying•Filters 2-pole Low-pass 2-pole Band-pass•DTMF Dialer•Modulator•Peak Detector•V to I Converter•Amplifiers Programmable Gain Instrumental Inverting•Comparators Programmable Hysteresis Zero-Crossing•CapSense

10

Digital Functions (subset)

•Timer 8, 16, 24, 32 bit•Counter 8, 16, 24, 32 bit•PWM 8, 16, 24, 32 bit•Dead Band Generator 8, 16, 24, 32 bit•Pseudo Random Source•Cyclic Redundancy Check•Communication Interface I2C Master I2C Slave SPI Master SPI Slave Full Duplex UART Tx, Rx Full Speed USB v2.0

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• Define connections between pins and function blocks

• Define connections between function blocks

• Define clock paths• Change

connections dynamically too!

Interconnection Scheme

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User Modules

Pre-configured and Pre-characterized Digital and Analog PSoC Blocks

Greatly simplifies and shortens coding process

Analogous to On-chip Peripherals • ADCs, DACs, PGAs, Filters• Timers, Counters, PWMs• UART, SPI, I2C

Defines the Register Bits for Initial ConfigurationSelected via Double Click in IDE

User Modules Include • Application Programmer Interfaces (APIs)• Interrupt Service Routines (ISRs)• Specific UM Data Sheets

13

Additional Features

• Comprehensive Design Tools• Intuitive Resource Placement• Easy Routing• Powerful Logic• Dynamic Reconfiguration

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PSoC Design Tools

Free Design Software• Device Editor • Application Editor • C Compiler • Assembler• Librarian• Debugger

Low Cost ICE • CY3215-DK •Trace, Dynamic Event Point• Every thing you need for PSoC development

Graphical Application Design Software……

No MCU Coding!

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PSoC® Designer™ 5.0 A New Paradigm in Embedded Design

• An integration of PSoC software• PSoC Express™ - a visual embedded code free design environment• PSoC Designer 4.4 - a powerful and more traditional IDE

• MS Visual Studio based GUI—dock, tab, and float windows• Upgraded Debugger; new “Run-to-Cursor” breakpoint features

EASY-TO-USE, FAST, FLEXIBLE

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PSoC Designer 5.0 System-Level View (Formerly PSoC Express)

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PSoC Designer 5.0 Chip-Level View (Formerly PSoC Designer 4.4)

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PSoC Designer 5.0 System-Level to Chip-Level Transitions

1

2

3

4

Design & Build

Open Chip-View

Optimize the Design

Customize the Code

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PSoC® Programmer™ 3.xx Customize & Enhance your PSoC Programming Experience

•Customizable GUI—maximize & minimize what you want to see•COM object architecture—open access to programmer functionality•Automatic PSoC Programmable System on Chip Detection•Accelerated prototyping—turn timely verification on/off as needed•Huge array of GUI enhancements—cleaner, easier to use interface

Classic View

Modern View

Simple View

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PSoC Programmer 3.xx Classic View

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PSoC Programmer 3.xx Modern View

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PSoC Programmer 3.xx Simple View

Section 2: PSoC Designer IDE Software

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3) Press “Place User Module Button”

1) Drag Green “Target Placer” from default location

Intuitive Placement

2) Drag to desired location(Target Placer box fills in green when place-able)

25

Easy GUI Routing

26

Powerful Combinational Logic

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Powerful Combinational Logic

28

Dynamic Reconfiguration

More than meets the eye: Multiple Configurations

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Integrated Development Environment

• Device Editor • Application Editor • C Compiler• Assembler• Librarian• Debugger

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PSoC DesignerDevice Editor – Interconnect View

Placing User Modules• View block architecture with

combined UM & port views• Generates routed block to

block schematic• Routed global I/O connection

schematic• Step through potential UM

placement options• Select desired placement

option for UM• Select UM and resource

interconnections• Select/configure UM and

global device resources• Define clocking for UMs• Configure mode and drive

level for GPIO pins

Global resources table

Global resources table

User module parameter table

User module parameter table

Port tablePort table

UM Workspace

UM Workspace

User Module window

User Module window

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For Users to Write CodeFor Users to Assemble/Compile Code

* The C compiler needs to be enabled for use.

• View and edit individual source files

• Set and remove bookmarks (Editing tool)

• Assemble/compile individual files

• Build entire project including assemble/compile* all files in project

• Source line error pointer

PSoC Designer Application Editor

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PSoC Designer C CompilerThe C compiler by Hi Tech is an optional component of the

PSoC Designer IDE. Once enabled, it is fully integrated into the IDE and allows PSoC Designer to support C source level debugging.

Features Include:• ANSI C Compiler• Supports Inline Assembly and can interface with Assembly Modules• Integrated code compressor• Modern Stack-Based Architecture• 7 Basic Data Types Including IEEE 32-Bit Floating Point• Assembler and Linker• Math and String Libraries• C Interrupt Service Routines• Librarian

For more info on the C compiler, please see the C language compiler user guide in the documentation folder of PSoC Designer.

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• Interface to ICE

• View contents of Register and Memory spaces

• Change the contents of the register banks and the RAM

• Run/Halt /Single Step

• Set breakpoints and event points

• Capture trace

PSoC Designer Debugger

Note: We will not be using the DeBugger during this workshop

PSoC Hands On Example Project

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PSoC Design Flow

• Determine system requirements

• Choose User Modules

• Place User Modules

• Set global and User Module parameters

• Define the pin-out for the device

• Generate the application

• Review generated code

• Demonstrate working configuration

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Project Requirements

Blink two LEDs at approximately 2Hz, with duty cycle of 40% and 20%

Implementation:

Create An MCU with Two Pulse Width Modulators:

• Select Two PWM User Modules

• Set the PWM parameters

• Initialize the global clocks

• Connect the PWM outputs to the PSoC Pup LEDs

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Project Implementation

÷16 ÷16

16-bit PWM

÷ 65535

16-bit PWM

÷ 65535

24MHzVC1 VC2

(1.5MHz) (94kHz)

P2[0]

P2[1]

(1.4Hz)

(1.4Hz)

PSoC

Pup

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Starting a New Project

• Open PSoC Designer

• Select Start new project

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Starting a New Project

• Select Project Type

• Name The Project

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Starting a New Project

• Select Device and Coding Method • CY8C29466-24PXI• C

• OK

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Select and Place User Modules

Select the PWM16 from the User Modules page

Place User Modules for this Project• How do I know where to place the User

Modules?• How does PSoC Designer help me?

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Place User Modules

Try-out the modules individually first• See how restrictive they are, then return to original location

PSoC Designer will only allow the modules to be placed where the chip can support them

PSoC Designer will not prevent a placement that may create a conflict for resources

• Example: If you have an ADC and temperature sensor, they both use the comparator bus. There is only one comparator bus per column, therefore these two UMs must reside in separate columns in order to be used simultaneously.

Read the UM Data Sheets for details

Use the Cypress Online Resources• www.cypress.com/support

43

Place User Modules

Place the two selected User Modules. Double Click on PWM16 wait a few moments until the user module is placed in the Interconnect Window - repeat

PWM16_1 – Digital Blocks DBB00/DBB01 PWM16_2 – Digital Blocks DBB10/DBB11

Recommend placing the PWMs in the Basic Digital Blocks to Save the Digital Communication Blocks

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Place User Modules

• When you are done the screen should look like this

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Configure Global Resources

Power Setting: 5.0V/24MHzCPU_Clock: SysCLK/2 (12MHz)32K_Select: Internal

• Not using an external crystal PLL_MODE: Disable

• PLL can only be enabled when 32K_Select is External (crystal)

Sleep_Timer: 512_Hz. (Default)VC1 = SysClk/N: Set to 16

• This divides 24MHz by 16 = 1.5MHz

VC2 = VC1/N: Set to 16• This divides the 24V1 by 16

(1.5MHz/16=94kHz)VC3 Source: SysClk/1VC3 Divider: 1

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Configure Global Resources

SysClk Source: Internal

SysClk*2 Disable: YES

Analog Power: SC On/Ref Low This is required to power up any of the analog blocks,

depending on the number of analog functions. A Ref Med or Ref High may be required (and will increase power consumption)

Ref MUX: (Vdd/2) ±Bandgap (default)

AGndBypass: Disabled

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Configure Global Resources

Op-Amp Bias: Low (default)

This is not recommended as anything but low

A_Buff_Power: Low (default)

Adequate for most projects This selects the power level of the analog output buffer

There is a tradeoff between drive output power and power consumption.

SwitchModePump: OFF

Trip Voltage [LVD (SMP)]: 4.64V (5.0V)

48

Configure User Modules

•PWM16_1: We want to generate a 1/5 duty cycle

•User module parameters can be configured in two ways: through the GUI or through the User Module Parameters window. In this class we will use the User Module Parameters window in the left bottom corner.

Set Clock to VC2 (94kHz) Set Enable High to keep the PWM always runningSet CompareOut to Row_0_Output_0Set TerminalCountOut to NoneSet Period to 65535 (1.4Hz)Set PulseWidth to 13107Compare Type Less Then Or EqualInterrupt Type Terminal CountClockSync to Sync to SysClkInvertEnable set to Normal

49

Configure User Modules

PWM16_2: We want to generate a 2/5 duty cycle

Set Clock to VC2 (94kHz)Set Enable High to keep the PWM always runningSet CompareOut to Row_1_Output_1Set TerminaCountOut to NoneSet Period to 65535 (1.4Hz)Set PulseWidth to 26214Compare Type Less Then Or EqualInterrupt Type Terminal CountClockSync to Sync to SysClkInvertEnable set to Normal

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Interconnect Blocks to Resources

What interconnection possibilities are there?• Data Inputs• Data Outputs• Clocks• Block-to-block

When you specify a PSoC block connection to a pin you are making a physical connection to the hardware of the PSoC device.

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Define the Pin-out

What pins need to be defined?• UM Inputs• UM Outputs• General Purpose IO

What happens as pins are defined?

Pin-out our project• LEDs

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Interconnect Blocks to ResourcesRoute PWM16_1 to pin:

• Connect PWM16_1 output to Row_0_Output_0• Connect Row_0_Output_0 to GlobalOutEven_0

Left Click Left Click

53

Interconnect Blocks to Resources

Route PWM16_1 output to pin• Port 2 is connected to the LEDs on the Pup board

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Interconnect Blocks Resources

Route PWM16_2 output to pin

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Interconnect Blocks Resources

Route PWM16_2 output to pin

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Configuration Complete!

Save project – Go to File tabNow what? Where are we?

Time to “Generate Application” • All settings used by PSoC Designer

to create the boot-up code to configure the registers at reset

• ISRs are created (but not updated)• APIs are created or updated• Device Data Sheet generated

You must Generate Application whenever changes are made to the configuration

Now switch to the Application Editor view

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Time to Create Application Code

PSoC Designer generates application code based on the configurations you just defined in the Device Editor.

Project File Tree, located to the left of the application window, contains: • all interrupt routines• header files• include files• configuration tables

All APIs and ISRs can be modified by the user.

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Create Application Code

Open the main.c file Type the PWM start commands for each PWM_1 and PWM_2

void main(){ // Insert your main routine code here. PWM16_1_Start () ; PWM16_2_Start () ; while (1); }

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Create Application Code

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Build Project

Assembles code, links, and locatesCan individually assemble files as wellExplore Application Editor Features

• Project file management (view/add/delete files)• Finding compilation errors

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Program The Device

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Program The Device

Select MINIProg in the port window

Select Connect

Select Program

When Programming is complete Toggle Device Power

Congratulations, you have just completed your first PSoC design!

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Appendix

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•Bi-Directional Current Source

•DiffAmp configured with gain of one.• CF=CB=CA=16

• Sign = Pos•External Resistor and DAC value sets current.

• Independent of load.

SCBlock Amplifier Examples

DAC6

DiffAmpBuf0

P0.3P2.1Vload

Vset

Vout

Rset

+A

-B

i = -Vset / Rset

Rload

x1

setloadout VVV

set

set

set

loadout

R

V

R

VVi

65

SCBlock Filters FilterCalc

• Enter Following Parameters• Rolloff Frequency (f0)

• Acceptable Tolerance

• Damping Value• Acceptable Tolerance

• Column Clock (fs *4)

FilterCalc generates all Capacitor valuesthat meet these requirements.

Output file readable with Excel. 43 different solutions for this particular

example.

66

SCBlock Low Pass Filter

• Programmable• Roll off frequency (f0)• Damping ratio• Gain

• 300 Hz to 250 kHz• Scaled to clock

Vin

Vout

C1

C3

C4

CB

C2

CA

121

41

21

2

4

2

4

32

2

2

2

1

ss

BA

s

S

in

out

CC

fs

CC

CCCC

fs

fs

C

C

V

V

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•Two Cap Comparator

•With feedback capacitor CF removed Vout goes to either the high or low rail.

• Vout goes high when

VinACA > VinBCB

• Vout goes low when

VinACA < VinBCB

•VinB is the inverting input input.

SCBlock as Comparator

1

2

CA

1

12

VinA

Vout

CB

VinB

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•SCBlock Integrator

•Uses standard gain stage with the exception that the switch to discharge CF has been disabled.

•So:

SCBlock as Integrator

1

2

CA

CF

1

2

Vin

Vout

F

Ainoutout C

CVVV

old

sC

Cf

V

V

F

As

in

out 1

12 fs

69

•Dual Input SC Integrator•Feedback makes low pass filter with gain.

• Ratio of CA & CB determines gain.

• CF,CB, and fs determines rolloff frequency.

•Setting Vin to Vref makes filter DAC.

• Much higher fs than Conventional DAC

SCBlock as IntegratorSingle Pole LPF

21

1

1

B

F

s

B

A

in

out

CC

fsC

C

V

V

1

2

CA

CF

1

2

Vin

Vout

1

2CB

buf

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•Dual Input SC Integrator•External Emitter follower makes a high power output driver.

• Able to drive all the way to Vss rail

SCBlock as IntegratorPower Driver

1

2

CA

CF

1

2

Vin

Vout

1

2CB

buf

Rload

Vcc

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•Dual Input SC Integrator•Or a 4 Ohm Class B Speaker Driver.

4 Ohm

1

2

CA

CF

1

2

Vin

Vout

1

2CB

buf

Vcc

SCBlock as IntegratorSpeaker Driver

72

SCBlock as 2 Pole Filter• Two Pole Filters• Constructed with a BiQuad Circuit Topology

• Continuous Time Implementation shown below• Requires Three Op Amps

• Middle one only used to change polarity

V inVout

R 2

R1

C4

CB

R3

CA

R

R

CPP

CP

1

1

42322

1312

1

2

CsRCCRRs

CsRCCRRs

R

R

V

V

BA

pppA

in

out

73

SCBlocks as 2 Pole Filter

• Two Pole Filters• Switched Capacitor Implementation

• Requires Only Two Op Amps

141

21

41

21

2

4

2

4

322

2

2

1

22322

2

CC

fs

CC

CCCC

f

s

CC

C

C

fs

C

C

CC

CC

f

s

V

V

s

BA

s

p

s

pppA

s

in

out

Vin

Vout

C1C3

C4

CB

C2

CA

CPP

CP

High PassBand PassLow Pass

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SCBlock Band Pass Filter

Vin

Vout

C1

C3

C4

CB

C2

CA

AnalogBus

CompBus

• Programmable• Center frequency (fc)• Q• Gain

• 300 Hz to 250 kHz• Scaled to clock

121

41

21

2

4

2

4

32

2

3

2

1

CC

fs

CC

CCCC

fs

fs

CC

fs

C

C

V

V

s

BA

s

S

B

s

in

out

75

Elliptical Low Pass Filter

• Combines High Pass• and Low Pass Filters

• Produces two zeros.• Low pass filter when:

Vin

Vout

C1C3

C4

CB

C2

CA

CPP

121

41

41

1

2

4

2

4

32

231

2

2

1

CC

fs

CC

CCCC

fs

CCCC

fs

C

C

V

V

s

BA

s

APP

s

in

out

highpasslowpassff 00

76

SCBlock Notch Filter

• Special Case of • Elliptical Low Pass• Filter where:

Vin

Vout

C1C3

C4

CB

C2

CA

CPP

121

41

41

1

2

4

2

4

32

231

2

2

1

CC

fs

CC

CCCC

fs

CCCC

fs

C

C

V

V

s

BA

s

APP

s

in

out

highpasslowpassff 00