project 1: 4-to-1 multiplexer and 8 bit adder

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Project 1: 4-to-1 Multiplexer and 8 Bit Adder

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Figure 1.1 : 4-to-1 Multiplexer using 8-bit busses

Part A: 4-to-1 Multiplexer using 8-Bit Busses

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For part A of the project, I created a 4- to 1 multiplexer with 4 8-bit busses as the inputs. I implemented 8 4-to-1 multiplexers, as sub-designs,

that take two select lines and 4 inputs, one from each of the 8-bit busses (with the same values). Below are details about the 4-to-1 multiplexer I

created. To test the inputs, I incremented each 8-bit bus by counts of 8 (starting with 0), and tested the results of the output with the signals in 4

different positions (0,0),(0,1),(1,0),(1,1), resulting in an 8 bit output. The results are displayed in the waveforms above.

Figure 1.2: 4 -to-1 multiplexer

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4-to-1 Multiplexer

The sub-design I used for my 8-bit bus 4-to-1 Multiplexer is based on my single input 4-to-1 Multiplexer from the mini project. First I tested

the inputs of the original design with single inputs to make sure the multiplexer was working correctly. I used a method similar to the one I used for

the mini project, testing different combinations of the inputs with the signals in position (0,0),(0,1),(1,0),(1,1). The results are displayed in the

waveform. After I tested the multiplexer I connected the 8-bit busses in place of the single inputs for my final design.

7 Part B: 8-Bit Adder

For part B of the project, I created an 8 bit adder with 2 8-bit busses as the inputs. I implemented 8 1-bit adders, as sub-designs, that take one

select line and 2 inputs, one from either of the 8-bit busses (with the same values). Although each of the 1-bit adders required a select line input, I

only used the select line on the first one. After that I used the carryout from that 1bit adder as the select line for the next bit adder, and repeated the

process for each bit adder. The sums from each of the 1-bit adders were merged into the 8-bit output. Below are details about the 1-bit adder I

created. Using a similar method to that of the 4-to-1 multiplexer, I incremented each 8-bit bus by counts of 8 (starting with 0), and tested the results

of the output with the signal in the off or on position. The results are displayed in the waveforms above.

8 One Bit Adder

Figure 1.3: One bit adder circuit and waveform

The sub-design I used for my 8-bit adder uses one bit adders that I created in a separate file. The one bit adder uses 3 single bit inputs, 1 select

line and 2 regular inputs. I used the same method for testing as I did for the past 3 circuits, testing different combinations of the inputs with the signal

in the on and off position. The results are displayed in the waveform. After I tested the multiplexer I connected the 8-bit busses in place of the single

inputs for my final design.

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Part 2: 8-Bit ALU

For this part of the project we created an ALU (arithmetic logic unit) using 2 8-bit inputs and an enable. When the enable is on, the ALU is set up to

perform 8 different functions using the 2 8-bit inputs and single input, C_in. To determine which of the 8 functions the ALU should perform, we also

created an ALU_sel, a 3-bit input function selector, which is connected to each sub-circuit.

Figure 2.1: 8-bit ALU

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3 to 8 Decoder

Before we get to the functions, we had to convert the 3-bit ALU_sel to 8-bits, since there are 8 functions. To do this we used a 3 to 8 decoder. Taking

the 3-bit ALU_sel we used an expander to split it. Treating the three bits as representations of the decimal numbers 0 to 7, we used 8 AND gates that

combined the numbers so that they select the function that relates to its respective binary representation. Each AND gate also included the enable

select so that the output would only be affected if the enable = 1.

Figure 2.1: 3-to-8 decoder circuit and waveform

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Function 0: A or B

The first function of the ALU is A or B, which takes two 8-bit inputs, A and B, and OR’s them. This function uses an enable as a trigger, therefore

the output only changes when the enable is on. Since A and B are 8-bit input, we used the expander to split it, then OR’d each A bit with its

respective B bit, and then merged the 8 bits into one output.

Figure 2.2: Function 0 circuit and waveform

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Function 1: Not A

The second function of the ALU is not A, which takes the 8-bit input A and inverts it. This function also uses an enable. Since A is an 8-bit input, we

used the expander to split it, then inverted each bit, and then merged the 8 bits into one output.

Figure 2.3: Function 1 Circuit and Waveform

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Function 2: A or not B or C_in

The third function of the ALU is A or not B or C_in, which takes three single-bit inputs, A, B, and C_in, and OR’s them. For this circuit we based the

design off of a full bit adder, similar to the one used in part 1. Instead of using XOR gates we used OR gates and we inverted input B. Additionally

we used an enable for both outputs, Sum and Carryout, so that they would only change when the enable is on.


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Although this circuit completes function 2, the prompt calls for inputs A and B to be 8 bits instead of a single bit. So we took our circuit and turned

it into a subdesign as a part of a bigger circuit that uses 8-bit inputs. With A and B now being 8 bits we split the input and connected each bit to a

subdesign (there were 8 subdesigns total). Since the enable and C_in are still single bits we just created 8 segments to connect to each of the

subdesigns. This gives us the ability to perform the same function on more bits. We used subdesigns instead of having one big circuit so it would be

cleaner and easier to follow. Taking all the sums from each subdesign, we merged them to get the final 8-bit sum output. Then we simply OR’d the

carryouts to get a single bit carryout output.

Figure 2.5: Function 2 8-bit Circuit and Waveform

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Function 3: A or B or C_in

The fourth function of the ALU is A or B or C_in, for which we used the method and design as function 2, only this time, we didn’t invert B.


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We used the same methods in function 2, in creating a bigger circuit with 8 subdesigns.

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Function 4: A xor B

The fifth function of the ALU is A XOR B, which takes two 8-bit inputs, A and B, and XOR’s them. This function is similar to function 0, so we

used the expander to split A and B, then XOR’d each A bit with its respective B bit, and then merged the 8 bits into one output. We also used an

enable input.


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Function 5: A and B

The sixth function of the ALU is A AND B, which takes two 8-bit inputs, A and B, and AND’s them. This function is similar to function 0, so we

used the expander to split A and B, then AND’d each A bit with its respective B bit, and then merged the 8 bits into one output. We also used an

enable input.


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Function 7: A or C_in

The eighth function of the ALU is A or C_in, which is similar to function 2 but takes two single bit inputs, A and C_in instead of three single-

bit inputs, and OR’s them to get a sum. Then combines them with an AND to get the Carryout. Again, we used an enable for both outputs, Sum

and Carryout, so that they would only change when the enable is on.

Figure 2.10: Function 7 Circuit and Waeform


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We used the same methods in function 2, in creating a bigger circuit with 8 subdesigns.

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8 to 1 Multiplexer

Finally, to output the results of the functions, we created an 8 to one multiplexer. This multiplexer uses the output or sums of each function along

with ALU_sel inputs. It uses the ALU_sel to determine which function’s output is to be displayed and combined it with the actual output from each

function in an AND gate. Then we used or gates to combine all the outputs puts, bring the number of outputs from 8 to one final one.

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Figure 2.12: 8-to-1 mux Circuit and Waveform

The final 8 to 1 multiplexer uses outputs from the functions which are 8-bit inputs. So we took our circuit and turned it into a subdesign as a part of a

bigger circuit that uses 8-bit inputs. With the outputs being 8 bits we split the input and connected each bit to a subdesign (there were 8 subdesigns

total). Since the ALU_sel are still single bits we just created 8 segments to connect to each of the subdesigns. Taking all the outputs from each

subdesign, we merged them to get the final 8-bit sum output.

Figure 2.13: 8-to-1 Mux 8-bit Circuit

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8-bit ALU - Continued

To create the ALU, we created a circuit that included all the subdesigns for the functions, with the 3 to 8 decoder for ALU_sel and the 8 to 1

multiplexer for the display of the final output. We also have the final single bit outputs for the carryout of some of the functions, V (overflow from

function 6) and M7 (the sign bit from function 6).

WaveForms

All waveforms were tested at the minimum (0) and maximum (255), with the enable on and off.

project 1: 4-to-1 multiplexer and 8 bit adder

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