presenter: chien-chih chen

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1 Presenter: Chien-Chih Chen National Sun Yat-sen University Embedded System Laboratory Dynamic Scheduler for Multi-core Systems

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National Sun Yat-sen University Embedded System Laboratory Dynamic Scheduler for Multi-core Systems. Presenter: Chien-Chih Chen. Research Tree. Analysis of The Linux 2.6 Kernel Scheduler. Dynamic Scheduler for Multi-core Systems. Optimal Task Scheduler for Multi-core Processor. Abstract. - PowerPoint PPT Presentation

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Page 1: Presenter: Chien-Chih Chen

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Presenter: Chien-Chih Chen

National Sun Yat-sen University

Embedded System Laboratory

Dynamic Scheduler for Multi-core

Systems

Page 2: Presenter: Chien-Chih Chen

Research Tree

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Dynamic Scheduler for Multi-core

Systems

Analysis of The Linux 2.6 Kernel Scheduler

Optimal Task Scheduler for Multi-

core Processor

Page 3: Presenter: Chien-Chih Chen

Many dynamic scheduling algorithms have been proposed in the past. With the advent of multi core processors, there is a need to schedule multiple tasks on multiple cores. The scheduling algorithm needs to utilize all the available cores efficiently. The multi-core processors may be SMPs or AMPs with shared memory architecture. In this paper, we propose a dynamic scheduling algorithm in which the scheduler resides on all cores of a multi-core processor and accesses a shared Task Data Structure (TDS) to pick up ready-to-execute tasks.

Abstract

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Page 4: Presenter: Chien-Chih Chen

Conversion of sequential code to parallel code or writing parallel applications is not optimal solution.

Most of the proposed scheduling algorithms for multi-core processors don’t support dependent task.

What’s Problem

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Page 5: Presenter: Chien-Chih Chen

Related Work

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Dynamic Scheduler for Multi-core

Systems

Available data dependency analysis techniques

[9] [10] [11] [12] [13] [14] [15]

Have proposed dynamic scheduling techniques[1] [2] [3] [4] [5] [6] [7]

Page 6: Presenter: Chien-Chih Chen

[1] An improvement OFT algorithm for reducing preemption.

[2] A data flow based and discuss data reuse which is intended for numeric computation.

[3] Based on recording resource utilization and throughput to change cores.

[4] A compile time technique that dynamically extract dependency and schedule parallel tiles on the cores to improve scalability.

Scheduling Techniques

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Page 7: Presenter: Chien-Chih Chen

[5] Using FFT language to generate one-dimensional serial FFT schedule, multi-dimensional serial FFT schedule and parallel FFT schedules.

[6] Rearranges a long task into smaller subtasks to form another task state graph and then schedule them in parallel.

[7] Using sampling of dominant execution phases to converge to the optimal scheduling algorithm.

Scheduling Techniques

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Page 8: Presenter: Chien-Chih Chen

The scheduler will reside in the shared memory of the multi-core system to ensures that all the cores share the scheduler code.

The same scheduler code will be executing on different cores and maintain a shared task data structure (TDS) that contains task information.

Proposed Method

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Page 9: Presenter: Chien-Chih Chen

Dynamic Scheduler

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Page 10: Presenter: Chien-Chih Chen

Ti unique number identifying the task i

Tis status of task i Ready (1) Running (2) Not ready (-1)

Tid number of dependency on task i

Tia list of tasks that become available due to run task i

Tip priority number of task i

Tidp data pointer of task i

Tisp stack pointer of task i

Tix execution time of task i

Task Data Structure (TDS)

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Page 11: Presenter: Chien-Chih Chen

Duration of task (Tix). Total number of other tasks dependent on the task

(Tid) .

Priority of Task

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Page 12: Presenter: Chien-Chih Chen

Tij: Task j can be start after Task i finished Tij time i: row number j: column number T01: T1 will start after T0 run 100 seconds

Experimental Setup

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Page 13: Presenter: Chien-Chih Chen

Simulation Result

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200

300

400

500

100

{T1, T2, T3}

{T5}

{T2, T3, T5}

{T3, T4, T5}

{T4, T5}

Page 14: Presenter: Chien-Chih Chen

Attempt to increase utilization of multi-core processors.

Tasks execution can not be limit in one core. Addition wait time for cores since involves

accessing shared task structure through lock.

Conclusion

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