[email protected] lecture 10 - lecture10... · 2009-07-10 · fixed-function ic 12 an integrated...
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Dr. Prapun [email protected]
Lecture 10
1
Digital CircuitsECS 371
Office Hours:
BKD 3601-7
Monday 9:00-10:30, 1:30-3:30
Tuesday 10:30-11:30
Announcement
2
HW4 posted on the course web site
Chapter 5: 4(b,c,e), 20a, 22a, 56
Write down all the steps that you have done to obtain your
answers.
Due date: July 16, 2009 (Thursday)
There will be a quiz today.
Review
3
NAND gate is a universal gate.
NOR gate is a universal gate.
NAND Gate as a Universal Gate
4
NAND gates are sometimes called universal gates because they can
be used to produce the other basic Boolean functions.
Inverter
AA
AND gate
AB
AB
A
B
A + B
OR gate
A
B
A + B
NOR gate
Example
5
Implement the following logic circuit using only NAND gates:
Solution:Negative-OR NAND
C
C
C
Example
6
Implement the following logic circuit using only NAND gates:
Solution:
It is easy to turn
AND-OR
configuration
into a NAND-
gate-only circuit
Negative-OR NAND
NOR Gate as a Universal Gate
7
NOR gates are also universal gates and can form all of the
basic gates.
Inverter
AA
OR gate
AB
A + B
A
B
AB
AND gate
A
B
AB
NAND gate
Example
8
Implement the following logic circuit using only NOR gates:
Solution:
Combinational Logic
9
We studied the theoretical principles used in
combinational logic design.
We will build on that foundation and describe many of the
devices, structures, and methods used by engineers to solve
practical digital design problems.
A complex circuit or system is conceived as a collection of
smaller subsystems, each of which has a much simpler
description.
Digital System Concept
10
A digital system
is an arrangement
of the individual
logic functions
connected to
perform a
specified
operation or
produce a defined
output.
Combinational Building Blocks
11
There are several straightforward structures that turn up
quite regularly as building blocks in larger systems.
Encoder
Decoders
Comparators
Multiplexers
Where can we find these
building blocks?
Fixed-function IC
12
An integrated circuit (IC) is an electronic circuit that is
constructed entirely on a single small chip of silicon.
Two broad categories of digital ICs.
1. Fixed-function logic
2. Programmable logic
In fixed-function logic, the logic functions are set by the
manufacturer and cannot be changed.
Fixed-function IC package
13 Cutaway view of DIP (Dual-In-line Pins) chip
Complexity Classifications
14
Fixed-function digital lCs are classified according to their complexity.
Small-scale integration (SSI)
up to ten equivalent gate circuits on a single chip
basic gates and flip-flops.
Medium-scale integration (MSI)
from 10 to 100 equivalent gates on a chip.
encoders, decoders, counters, registers, multiplexers, arithmetic circuits, small memories
Large-scale integration (LSI)
Very large-scale integration (VLSI)
Ultra large-scale integration (ULSI)
SSI
15
74x00
MSI
16
For the next couple lectures, we will study
most of these 74-series MSI.
MSI
17 DECODER
C
D
B
A
G1N
G2N
O0N
O12N
O15N
O10N
O11N
O1N
O13N
O14N
O4N
O3N
O2N
O7N
O6N
O5N
O9N
O8N
74154
inst
BCD TO DEC
D
B
C
A
O7N
O8N
O9N
O0N
O3N
O2N
O1N
O6N
O5N
O4N
7442
inst1
BCD TO 7SEG
LTN
B
C
D
RBIN
BIN
A
OB
OC
OE
OD
OF
OG
OA
RBON
7447
inst2
COMPARATOR
A3
B2
A2
AEBI
AGBI
ALBI
A0
B0
B3
A1
B1
ALBO
AGBO
AEBO
7485
inst3
3:8 DECODER
A
B
G1
C
G2AN
G2BN
Y0N
Y1N
Y2N
Y3N
Y4N
Y5N
Y6N
Y7N
74138
inst4 2:4 DECODER
A1
A2
B1
B2
G1N
G2N
Y10N
Y20N
Y13N
Y12N
Y11N
Y21N
Y22N
Y23N
74139
inst5
ENCODER
1N
2N
3N
6N
5N
4N
9N
8N
7N
CN
BN
AN
DN
74147
inst6 ENCODER
5N
0N
1N
2N
3N
4N
EIN
6N
7N
A1N
A0N
A2N
EON
GSN
74148
inst7
MULTIPLEXER
GN
C
B
A
D5
D0
D1
D4
D3
D2
D6
D7
Y
WN
74151
inst8
MULTIPLEXER
A1
B1
SEL
B2
A3
B3
A2
B4
GN
A4
Y2
Y1
Y4
Y3
74157
inst9
PARITY GEN.
B
A
F
E
D
I
C
G
H
EVEN
ODD
74280
inst10 4 BIT ADDER
CIN
A1
A2
B2
A3
A4
B4
B1
B3
SUM4
COUT
SUM1
SUM2
SUM3
74283
inst11
Simple Decoder
18
A decoder is a logic circuit that detects the presence of a specific
combination of bits at its input.
Two simple decoders that detect the presence of the binary code
0011 are shown below. The first has an active HIGH output; the
second has an active LOW output.
A1
A0
A2
A3
X
Active HIGH decoder for 0011
A1
A0
A2
A3
X
Active LOW decoder for 0011
(A0 is the LSB and A3 is the MSB)
Exercise
19
Assume the output of the decoder shown below is a logic 1.
What are the inputs to the decoder?
A0 = 0
A1 = 1
A2 = 0
A3 = 1
1
Binary-to-Decimal Decoder
20
The binary-to-decimal decoder shown here has 16 outputs –
one for each combination of binary inputs.
Bin/Dec
A0
0123456789
101112131415
4-bit binary
input
Decimaloutputs
A1
A2
A3
1
1
0
1111111111101111
1
The bubbles indicate active-
LOW outputs.
Application: Port Address Decoder
21
Decoder can be used in computers for input/output selection.
Computers communicate with peripherals by sending and/or receiving data through what is known as input/output (I/O) ports.
A decoder can be used to select the I/O port so that data can be sent or received from a specific external device.
2:4 decoder
22
2-to-4 line decoder with enable input
Exercise
23
Find the truth table of the 1-to-2 line decoder below.
Then, implement the 1-to-2 line decoder.
I Y0
Y1
74x139: Dual 2:4 Decoder
24
Two independent 2:4 decoders
The outputs and the enable (E) input are active-LOW.
When E is HIGH all outputs are forced HIGH.
E
3O
Most MSI decoders
were originally
designed with active-
LOW output.
Notice that all of the signal names inside the symbol
outline are active-HIGH, and that bubbles indicate
active-LOW inputs and outputs.
74x139
25
74x139: Logic diagram
26
This is a
usual 2:4
decoder.
Active-
LOW
Enable
Active-LOW output because NAND gates are used instead of AND gates
Example: Building a larger decoder
27
Construct a 3-to-8 decoder from two 2-to-4 decoders
Low order bits (A1, A0) select within decoders. High order bit (A2) controls which
decoder is active.
How can we add an
active-HIGH enable
input?
Notice that
this part is
equivalent to a
1:2 decoder.
Building larger decoder from smaller
ones
28
To construct (k+n)-to-2n+k decoders, can use 1. 2n of k-to-2k decoders with enable input and 2. one n-to-2n decoders.
The connections are: For each of the k-to-2k decoder with enable input, all have k input
we put in A0…Ak-1.
The enable line of the rth decoder is connected to Dr of the n-to-2n
decoders. The inputs of the n-to-2n decoder get Ak to An+k-1.
Basically, each k-to-2k decoder works on the last k bits.
We use the first n bit, via the n-to-2n decoder, to select which one (and only one) of the k-to-2k decoders will be enabled.
Example
29
Construct a 4:16 decoder
with an active-LOW enable
from three 2:4 decoders.
74x138: 3:8 Decoder
30
Active-LOW outputs
Three enable inputs.
Example
31
Construct a 4:16 decoder
with an active-LOW enable
(EN) from two 74x138
decoder.
Example
32
Construct a 5:32
decoder with two active-
low enable and one
active-high enable
from four 74x138 and
one 74x139.
74x154:
4:16 Decoder
33 DECODER
C
D
B
A
G1N
G2N
O0N
O12N
O15N
O10N
O11N
O1N
O13N
O14N
O4N
O3N
O2N
O7N
O6N
O5N
O9N
O8N
74154
inst
Include two active-LOW chip select (CS)
lines which must be at the active level to
enable the outputs. These lines can be used
to expand the decoder to larger inputs.
Alternative logic
symbol
A LOW level on each
chip select input is
required to make the
enable gate output
(EN) HIGH.
5:32 Decoder
34
Decoder as general purpose logic
35
Any combinational circuit with n inputs and m outputs can be
implemented with an n-to-2n-line decoder and m OR gate
Observe that the
3:8 decoder
generates all
possible minterms.
Example
36
Implement a full adder circuit with a decoder and OR gates
S = X,Y,Z(1,2,4,7)
C = X,Y,Z (3,5,6,7)
OutputsInputs
A B C out SCin
0
1
0
1
0
1
0
1
0
0
0
0
0
0
1
1
1
1
0
0
1
1
1
1
0
0
0
1
0
1
1
0
0
1
1
0
1
1
0
1
X Y Z SC
Other Decoders
37
In general, a decoder converts coded information,
such as binary number, into non-coded form.
Later, (if time permitted) we will talk about
other types of decoder.