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Power-Aware Systems Manish Bhardwaj, Rex Min and Anantha Chandrakasan Massachusetts Institute of Technology November 2000

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Page 1: Power-Aware Systems

Power-Aware Systems

Manish Bhardwaj, Rex Min and Anantha Chandrakasan

Massachusetts Institute of Technology

November 2000

Page 2: Power-Aware Systems

Power-awareness: Intuitive Notions

n Motivation: Maximize lifetime of energy constrained systems ≈ Maximize system-level energy efficiency

n Implication: Given an operating scenario, consume only as much energy as the scenario demands

n Alternately, scale the power consumed in response to changing scenarios (power-awareness)

Page 3: Power-Aware Systems

Agenda

n Key questionsoWhat are operating scenarios?oHow well are these systems tracking their scenarios?oWhat can we do to improve this tracking?oWhat are the costs and benefits?

n AbstractionsoAwareness dimensions, operating scenarios, energy curves,

scenario distributions

n Formalizing Power-Awareness

n Enhancing Power-Awareness

n Examples: oMultipliersoRegister Fileso FiltersoAnalog-Digital Converterso Variable-Voltage ProcessorsoWireless Networks

Page 4: Power-Aware Systems

Abstractions: Scenarios

n Over any specified time interval, the energy consumed by a system is governed by five key dimensions

n Scenarios are characterized by precisely these dimensions

n Scenario ≡ <Input, Output Quality, Latency, State, Environment>

n Choices in specifying scenarioso Number of dimensions to includeo Detail with which the dimension is captured

n Example: Characterizing scenarios in a 16x16-bit multiplier

1. InputStatistics

5. Environment

4. State2. Desired

OutputQuality

3. Tolerable Latency/Desired Throughput

Awareness Dimensions

Page 5: Power-Aware Systems

Scenario Characterization in Multipliers

n Input dimension onlyo Scalar m: Specifies a maximum precision requirementoUnordered pair (m, n): Specifies a mxn-bit multiplicationoOrdered pair <m, n>oOrdered operands <X,Y>

n Input and state oOrdered operands and previous operands <X[n],Y[n],X[n-1],Y[n-1]>

n Input, state and desired precision

n Input, state, desired precision and latency

Page 6: Power-Aware Systems

Abstractions: Energy Curves

n The energy consumed by a system as a function of its scenario, E(H, s)

Page 7: Power-Aware Systems

Abstractions: Scenario Distributions

n The probability that a system will reside in a certain scenario is captured by scenario distributions, dS(s)

Page 8: Power-Aware Systems

Perfect Power Awareness

n Perfect energy curve obtained by constructing dedicated point systems

A system is termed perfectly power-aware iff it consumes only as much energy as its current scenario demands.

Page 9: Power-Aware Systems

Perfect Systems

n A system that would result in Eperfect is termed the perfect system (Hperfect)

n If scenario detection and interconnect costs were zero, the system above would yield Eperfect

H s1

H sS ||

H s2

H si

DEMUX

Scenario DeterminingUnit

Dedicated Point Systems

Input Output

MUX

Page 10: Power-Aware Systems

Quantifying Power Awareness

n The relative energy curve is simply the energy curve of a system normalized to the perfect energy curve

Page 11: Power-Aware Systems

Power Awareness Metric

n Reduce the relative curve to a single number by appropriate weightingoWeigh by probability of occurrence of scenariooWeigh by energy dissipated in the scenario

n Physical interpretation: Expected system lifetime normalized to lifetime of perfect system

n Defined w.r.t scenario distribution and a set of point systems

n Metric leads to complete ordering for a specified distribution and partial ordering otherwise

1

)(),(

)(),(

),()(

),()()(−

=

=

∑∑

∑∑

ScenariosiiSiperfect

ScenariosiiSi

ScenariosiiiS

ScenariosiiiSi

sdsHE

sdsHE

sHEsd

sHEsdsηφ

Page 12: Power-Aware Systems

Enhancing Power-Awareness: Ensemble Construction

n What is the optimal ensemble of point systems?

1x1

2x2

16x16

X Y X.Y

Zero Detection Circuit

1x11x1

2x22x2

16x1616x16

X Y X.Y

Zero Detection Circuit

16x16

X

Y

X.Y16x1616x16

X

Y

X.Y versus

Page 13: Power-Aware Systems

Formal Statement of the Problem

n Given:o Function to be realized (F)oConstraints to be met (C)oA set of point systems (P)oA scenario distribution (d)

n Form of the solution:oAn ensemble of point systemsoA scenario to point system mapping

n Measure of the solution: Power awareness

n Problem: Find the solution with the highest measure

n Appears to be unsolvable in polynomial time

n (Greedy) Heuristics seem to work well

n Can be generalized to temporal and spatial-temporal ensembles

Page 14: Power-Aware Systems

A Near-optimal 4-point Ensemble

Power-Awareness = 0.92

16x16

14x14

11x11

9x9

Zero Detection Circuit

X

Y X.Y

Page 15: Power-Aware Systems

Power-Aware Register Files

n MotivationoArchitecture trends point to increasingly energy-hungry fileso Processors typically access only a fraction of registers over typical

instruction windowsoWhy pay the energy price of full file access?

n Objective: Register access energy must scale with the number of registers being accessed over an instruction window

n Scenario: Number of distinct registers accessed in an instruction window of specified length

n Available point systems: 1, 2, 4, 8 … word register files

Page 16: Power-Aware Systems

Scenario Distributions

>70% of the time, <16 registers accessed in a 60 instruction window

Page 17: Power-Aware Systems

Window Locality

>85% of the time, <5 registers change from window to window

Page 18: Power-Aware Systems

Candidates

32 registers

Bank-0 (4 registers)

Bank-1 (4 registers)

Bank-2 (8 registers)

Bank-3 (16 registers)

Bank Select Logic

Address Data

Address Data

Monolithic File Segmented File

Page 19: Power-Aware Systems

Power-Awareness Comparisons

Power-Awareness Increases by 2-3x

Page 20: Power-Aware Systems

Power-Aware Digital Filters

n Motivation: oAdaptive filters used in communications applications dissipate

significant energyo Filtering requirements change with desired quality and channel

conditionsoWhy run the filter at maximum precision and taps?

n Objective: Energy consumed by a filter must scale with the word-length precision and taps

n Scenarios: <Desired Taps, Desired Precision>

n Point systems: All <m taps, n bits> filters

Page 21: Power-Aware Systems

Scenario Distribution

Page 22: Power-Aware Systems

Candidates

64-tap, 24-bit FIRX[n] Y[n]

51-tap, 10-bit FIR

58-tap, 20-bit FIR

64-tap, 24-bit FIR

64-tap, 15-bit FIR

Arbiter

X[n] Y[n]

51-tap, 10-bit FIR

58-tap, 20-bit FIR

64-tap, 24-bit FIR

64-tap, 15-bit FIR

Arbiter

X[n] Y[n]

43-tap, 23-bit FIR

43-tap, 13-bit FIR

64-tap, 7-bit FIR

30-tap, 17-bit FIR

Monolithic Filter

Optimal 4-point Ensemble Optimal 8-point Ensemble

Page 23: Power-Aware Systems

Monolithic Filter

Power-Awareness = 0.51

Page 24: Power-Aware Systems

4-point Ensemble

Power-Awareness = 0.82

Page 25: Power-Aware Systems

8-point Ensemble

Power-Awareness = 0.90

Page 26: Power-Aware Systems

Perfect System

Power-Awareness = 1.0

Page 27: Power-Aware Systems

Power-Aware Processors

n Motivation:o Processor workloads vary significantlyo Tremendous energy savings by spreading workload to occupy

all available time (by lowering Vdd and operating frequency)oWhy pay the energy price of a full workload?

n Objective: Energy consumed by a processor should scale with its workload requirement

n Scenarios: Workload (∈ [0,1])

n Point systems: Processors with Vdd, frequency customized for a workload

Page 28: Power-Aware Systems

Candidates

0ddV

SA-1100

maxddV

DEMUX

Workload DeterminingUnit

Input Output

MUX

1ddV

SA-1100

SA-1100

SA-1100

VddBuck

Regulator

Controller+

Prog. Logic

Vddmax

µ-OS

Desired Supply Voltage (Digital Value)

VariableVdd

SA-1100SA-1100

VddBuck

Regulator

Controller+

Prog. Logic

Vddmax

µ-OSµ-OS

Desired Supply Voltage (Digital Value)

VariableVdd

SA-1100

Vdd

Fixed Voltage Processor

Dynamic Voltage Processor

Page 29: Power-Aware Systems

Power-Awareness Comparisons

DVS 1.6x more power-aware than fixed-voltage system

Page 30: Power-Aware Systems

Analog-Digital ConvertersContributed by Kush Gulati, MIT [ISSCC’01]

n Motivation:oA/Ds have non-trivial system-level power-budgetsoUser/algorithms might be able to tolerate low quality

(resolution)o Signal statistics might allow variable sampling rates

n Objective: Conversion energy must scale with the desired sampling rate and resolution

n Scenarios: <Rate, Resolution>

n Point systems: All <Rate, Resolution> converters

Page 31: Power-Aware Systems

Candidates

Conventional A/D Power-aware A/D

ResolutionSamplingRate

ReconfigurableCore

AnalogInput

DigitalOutput

Page 32: Power-Aware Systems

Scenario Diversity in A/Ds

Power versus Sampling Rate for different Resolutions

0.01

0.1

1

10

100

1.00E+03 1.00E+04 1.00E+05 1.00E+06 1.00E+07 1.00E+08

Output Data Rate (Hz)

An

alo

g P

ow

er C

on

sum

pti

on

(m

W)

(6)

(12)

(10)

(16) (14)

(8)

Page 33: Power-Aware Systems

Power-Awareness Comparison

Power-Awareness increases from 0.31 to 0.81

0

1

2

3

4

5

6

7

8

9

10

70 75 80 85 90 95

SNR (dB)

Po

wer

(mW

)

Reconfigurable Converter

Unaware Converter

Page 34: Power-Aware Systems

Wireless Data-Gathering Networks

B

R

S0

S1

S2

123

4

5

6

789 10

n Energy constrained nodes deployed to observe a source in a specified region

Page 35: Power-Aware Systems

Power-Aware Wireless Networks

n Motivation: oKey challenge in data-gathering networks is energy efficiencyoNetworks exhibit tremendous operational diversity (topology,

source behavior, desired quality, environmental conditions, instantaneous state)

n Objective: Data gathering energy should scale with desired quality, environmental conditions and internal state

n Scenarios: <Environmental Noise, Energy Vector>

n Point systems: All <Noise, State> protocols

Page 36: Power-Aware Systems

Environmental Awareness

Protocol is potentially 10x more power-aware!

Page 37: Power-Aware Systems

Awareness to State

Protocol 2x more power aware than unaware versions

Page 38: Power-Aware Systems

Summary

n Power-aware design can significantly enhance lifetime of battery constrained systems

n Power-awareness is a system-wide design philosophy

n Systematic methodology for power-aware design:oCharacterize scenarios by understanding the awareness

dimensions of a domainoGather statistics and construct scenario distributionsoConstruct optimal ensemblesoMeasure power-awareness o Iterate

n Power-aware design is NOT low-power designo Low power design focuses on engineering point systemso Power-aware design focuses on characterizing and harnessing

diversity by actively adapting the system