Power-aware NOC Reuse on the Testing of Core-based

Systems*CSCE 932 Class Presentation by Xinwang Zhang

April 26, 2007

* Erika Cota, et al., International Test Conference, 2003

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Outline

Researching background and motivationNOC reuse on the testingPower-Aware NOC reuse during testExperimental resultBISTed Cores and Power-aware NOC Reuse

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Researching Background and Motivation

Reuse functional connections during test. (M. Nourani, et, 1998-2002)

Use packet-switching architecture. No power consumption is modeled. (NIMA)

(Aktouf and Nahvi) Introduce power constraints. Two cores are not tested concurrently if the sum of their power consumption is larger than the maximum value.

(R. M. Chou and E. Larsson)Power profile manipulation approach for the minimization of the power dissipation and test time during test.

(Rosinger, et al, 2002)

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NOC reuse on the testingSOC Interconnection Network (SOCIN)XY routingPacket-switchedWormhole switching approach (flits, the smallest unit, follow the header in a pipeline way. Its size equals the channel width)

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NOC reuse on the testingTest vector and test response of each core are expressed as two packets, divided into a number of flits.Wrapper configuration, two modes. In the test mode, in order to ensure each flit is unpacked in the same time. The scan chains, input and output should be similar length.Control information is also carried by specific bits in packets

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NOC reuse on the testingFor core (3, 4 and 8), the same number of flits per packet is used. The reason is the number of scan chains and input, output is less than 16.

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NOC reuse on the testingTiming conflict problem: multiple paths are transmitting/receiving packets. The order of input packet and output packet.Solution:

1. Each core has two scheduling times. (Next vector can be delivered, next response

can be delivered) 2. Give each channel a time information.

(Free or not)

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NOC reuse on the testing

The priority of using a given path. The cores with larger number and larger size of

packets have priority to use shorter paths to reduce test time.Test cost computation:

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Power-Aware NOC reuse during test

Main advantage: the possibility of parallelization provided by NOC.Disadvantage: More cores are tested in parallel more power consumption.Four sources of power consumption: router, channel, core and wrapper.

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Power Consumption Calculation

Router:

Channel:

Total power consumption for a packet transmission:

Suppose core’s and wrapper’s power consumption is given by core designer.

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Power-aware test scheduling

Test schedule: defined as a set of time slots of different lengths.Size of time slot: clock cyclesEach slot contains a set of packetsOne packet transmission may be distributed among several slotsSlots can be modified as the schedule is being defined.Total power consumption in one slot:

The system power limit must be respected at each time slot s:

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Power-aware test scheduling

The scheduling of a packet V of core 6.

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Experiment ResultsPower consumption limit was defined as a certain percentage of the sum of the power consumption of all cores. (system requirement). Circuit used in the experiment: d695, g1023, p22810The variation of the system test time according to: the maximum test power consumption, and the number of system interfaces.

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Experiment Results

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Experiment ConclusionPower constrains can change the original order of the scheduled cores, leading the scheduling heuristic to a better solution in some particular cases.Very tight power constraints may either increase the time or prevent the scheduling of the some test packetsThe more interfaces with the tester, the higher the impact of the power constraints on the system test time.Although one can notice an increase in the test time caused by power constraints, the network still presents a very effective trade-off in terms of pins and area overhead and test time.

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BISTed Cores and Power-aware NOC Reuse

Advantage: only two messages that must transit: a test enable and the resulting signature. Disadvantage: Larger number of test patterns, and higher power consumption

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