pic architecture: background microprocessor: Õrequires ‘external’ support hardware Õe.g.,...

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PIC Architecture: Background Microprocessor: Requires ‘external’ support hardware E.g., External RAM, ROM, Peripherals. Microcontroller: Very little external support hardware. Most RAM, ROM and peripherals on chip. “Computer on a chip”, or “System on chip” (SOC) E.g., PIC = Peripheral Interface Controller For example, PICs use: Data memory (RAM): a small number of 8bit registers Program memory (ROM): 12bit, 14bit or 16bit wide (in EPROM, FLASH, or ROM)

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Page 1: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

PIC Architecture: BackgroundMicroprocessor: Requires ‘external’ support hardware E.g., External RAM, ROM, Peripherals.

Microcontroller: Very little external support hardware. Most RAM, ROM and peripherals on chip. “Computer on a chip”, or “System on chip” (SOC) E.g., PIC = Peripheral Interface Controller For example, PICs use:

– Data memory (RAM): a small number of 8bit registers– Program memory (ROM): 12bit, 14bit or 16bit wide

(in EPROM, FLASH, or ROM)

Page 2: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

PIC Architecture: Background

PICs and most Harvard chips are “RISC” Reduced Instruction Set Computer (RISC) Used in: SPARC, ALPHA, Atmel AVR, etc. Few instructions (usually < 50) Only a few addressing modes Executes 1 instruction in 1 internal clock cycle (Tcyc) Example:

PIC16CXXX: MOVLW 0x55

1 word, 1 cycle

1100XX 01010101

Page 3: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

Exa

mp

le P

IC:

12C

508

Blo

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ram

Page 4: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

The PIC Family: Cores

PICs come with 1 of 4 CPU ‘cores’:

12bit cores with 33 instructions: 12C50x, 16C5x

14bit cores with 35 instructions: 12C67x,16Cxxx

16bit cores with 58 instructions: 17C4x,17C7xx

‘Enhanced’ 16bit cores with 77 instructions: 18Cxxx

Page 5: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

The PIC Family: Packages

PICs come in a huge variety of packages:

8 pin DIPs, SOICs: 12C50x (12bit) and 12C67x (14bit)18pin DIPs, SOICs: 16C5X (12bit), 16Cxxx (14bit)28pin DIPs, SOICs: 16C5X (12bit), 16Cxxx (14bit)40pin DIPs, SOICs: 16Cxxx (14bit), 17C4x (16bit)44 - 68pin PLCCs*: 16Cxxx (14bit), 17C4x / 17Cxxx (16bit)

* also TQFPs, etc.

Page 6: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

The PIC Family: Speed

PICs require a clock to work. Can use crystals, clock oscillators, or even an RC circuit. Some PICs have a built in 4MHz RC clock

– Not very accurate, but requires no external components! Instruction speed = 1/4 clock speed (Tcyc = 4 * Tclk) All PICs can be run from DC to their maximum spec’d speed:

12C50x 4MHz12C67x 10MHz16Cxxx 20MHz17C4x / 17C7xxx 33MHz18Cxxx 40MHz

Page 7: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

The PIC Family: Program Memory

PIC program space is different for each chip.

Some examples are:

12C508 512 12bit instructions16C71C 1024 (1k) 14bit instructions16F877 8192 (8k) 14bit instructions17C766 16384 (16k) 16bit instructions

Page 8: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

The PIC Family: Program Memory

PICs have two different types of program storage:

1. EPROM (Erasable Programmable Read Only Memory) Needs high voltage from a programmer to program (~13V) Needs windowed chips and UV light to erase Note: One Time Programmable (OTP) chips are EPROM chips,

but with no window! PIC Examples: Any ‘C’ part: 12C50x, 17C7xx, etc.

Page 9: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

The PIC Family: Program Memory

PICs have two different types of program storage:

2. FLASH Re-writable (even by chip itself) Much faster to develop on! Finite number of writes (~100k Writes) PIC Examples: Any ‘F’ part: 16F84, 16F87x, 18Fxxx (future)

Page 10: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

The PIC Family: Data Memory

PICs use general purpose “file registers” for RAM(each register is 8bits for all PICs)

Some examples are:

12C508 25 Bytes RAM16C71C 36 Bytes RAM16F877 368 Bytes (plus 256 Bytes of nonvolatile EEPROM)17C766 902 Bytes RAM

• Don’t forget, programs are stored in program space (not in data space), so low RAM values are OK.

Page 11: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

The PIC Family: Control Registers

PICs use a series of “special function registers” for controlling peripherals and PIC behaviors.

Some examples are:

STATUS Bank select bits, ALU bits (zero, borrow, carry)INTCON Interrupt control: interrupt enables, flags, etc.TRIS Tristate control for digital I/O: which pins are ‘floating’TXREG UART transmit register: the next byte to transmit

Page 12: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

The PIC Family: Peripherals

Different PICs have different on-board peripherals

Some common peripherals are:– Tri-state (“floatable”) digital I/O pins– Analog to Digital Converters (ADC) (8, 10 and 12bit, 50ksps)– Serial communications: UART (RS-232C), SPI, I2C, CAN– Pulse Width Modulation (PWM) (10bit)– Timers and counters (8 and 16bit)– Watchdog timers, Brown out detect, LCD drivers

Page 13: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

PIC Peripherals: Ports (Digital I/O)

• All PICs have digital I/O pins, called ‘Ports’– the 8pin 12C508 has 1 Port with 4 digital I/O pins– the 68pin 17C766 has 9 Ports with 66 digital I/O pins

• Ports have 2 control registers– TRISx sets whether each pin is an input or output– PORTx sets their output bit levels

• Most pins have 25mA source/sink (directly drives LEDs)• WARNING: Other peripherals SHARE pins!

Page 14: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

PIC Peripherals: ADCs

• Only available in 14bit and 16bit cores• Fs (sample rate) < 54KHz• Most 8bits, newer PICs have 10 or 12bits• All are +/- 1LSB and are monotonic• Theoretically higher accuracy when PIC is in sleep mode (less

digital noise)• Can generate an interrupt on ADC conversion done • Multiplexed 3 (12C671) - 12 (17C7xxx) channel input

– Must wait Tacq to charge up sampling capacitor(see datasheets)

Page 15: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

PIC Peripherals: USART: UART

• Serial Communications Peripheral: Universal Synchronous/Asynchronous Receiver/Transmitter

• Only available in 14bit and 16bit cores• Interrupt on TX buffer empty and RX buffer full

• Asynchronous communication: UART (RS-232C serial)– Can do 300bps - 115kbps– 8 or 9 bits, parity, start and stop bits, etc. – Outputs 5V so you need a RS232 level converter (e.g., MAX232)

Page 16: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

PIC Peripherals: USART: USRT

• Synchronous communication: i.e., with clock signal

• SPI = Serial Peripheral Interface– 3 wire: Data in, Data out, Clock– Master/Slave (can have multiple masters)– Very high speed (1.6Mbps)– Full speed simultaneous send and receive (Full duplex)

• I2C = Inter IC– 2 wire: Data and Clock– Master/Slave (Single master only; multiple masters clumsy)– Lots of cheap I2C chips available; typically < 100kbps

(For example, 8pin EEPROM chips, ADC, DACs, etc.)

Page 17: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

PIC Peripherals: Timers

• Available in all PICs.• 14+bit cores may generate interrupts on timer overflow.• Some 8bits, some 16bits, some have prescalers• Can use external pins as clock in/clock out

(ie, for counting events or using a different Fosc)• Warning: some peripherals share Timer resources

Page 18: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

PIC Peripherals: CCP Modules

• Capture/Compare/PWM (CCP)• 10bit PWM width within 8bit PWM period (frequency)

– Enhanced 16bit cores have better bit widths

• Frequency/Duty cycle resolution tradeoff– 19.5KHz has 10bit resolution– 40KHz has 8bit resolution– 1MHz has 1bit resolution (makes a 1MHz clock!)

• Can use PWM to do DAC - See AN655• Capture counts external pin changes• Compare will interrupt on when the timer equals the value in

a compare register

Page 19: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

PIC Peripherals: Misc.• Sleep Mode: PIC shuts down until external interrupt (or internal timer)

wakes it up.• Interrupt on pin change: Generate an interrupt when a digital input pin

changes state (for example, interrupt on keypress).• Watchdog timer: Resets chip if not cleared before overflow• Brown out detect: Resets chip at a known voltage level• LCD drivers: Drives simple LCD displays• Future: CAN bus, 12bit ADC, better analog functions

• VIRTUAL PERIPHERALS:– Peripherals programmed in software. UARTS, timers, and more can be done in

software (but it takes most of the resources of the machine)

Page 20: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

Low End: 12C508• 8pin package (DIP, SO)• 12bit core - 33 instructions• 1us instruction time (Tclk = 4MHz)• 512 12bit program memory• 25 8bit data memory or registers (“File registers”)• 2 level hardware stack (no interrupts)• 5 GPIO pins, 1 input only (25mA source/sink)• Features: Internal pullups, wake up on pin change, internal oscillator• Peripherals: Timer, Watch Dog Timer

• $1.88(1), $1.25(100), $9.65(W)

Page 21: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

Mid Range: 16F876• 28pin package (DIP, SO)• 14bit core - 35 instructions• 200ns instruction time (Tclk = 20MHz)• 8,092 14bit FLASH program memory• 368 8bit data memory or registers (“File registers”)• 256 8bit EEPROM (nonvolatile) data registers• 8 level hardware stack (interrupts enabled)• 22 GPIO (20mA source / 25mA 7sink)• Peripherals: 5ch 10bit ADC, USART/I2C/SPI, 16bit & 8bit timers• Features: Brown out detect, In-Circuit Debugger (ICD)• $11.00(1), $5.89(100)

Page 22: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

High End: 17C766• 84pin PLCC package• 16bit core - 58 instructions• 121ns instruction time (Tclk = 33MHz)• 16,384 16bit program memory• 902 8bit data memory or registers• 16 level hardware stack (priority interrupts)• 66 GPIO (20mA source / 35mA sink)• Features: 8x8 multiply, BOD, microprocessor mode• Peripherals:

– 2x 16bit + 2x 8bit timer, WDT, 2x USART, 4x CCP, – 12ch 10bit ADC,

• $20.25(1), $10.53(100), $18.38(W)

Page 23: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

12C508, 16F876, 17C766 Uses

• 12C508– Inexpensive controllers, glue logic, simple tasks– E.g., quadrature decoding, digital interfacing

• 16F876– Multitasking programs, serial communication– E.g., Cheap data acquisition system and digital I/O system for PC off

COM ports, data logging

• 17C766– RTOS, low end DSP, communications, big moosey applications– E.g., FEC converter, Rocket Flight Computer, cheap FFT chip

Page 24: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

Instruction Examples

movlw 0xFF

Move (“mov”) the number (“l” for “literal”) 0xFF - that’s 256 in decimal- into the working register (“w”).

In other words, load W with the value 0xFF.

Page 25: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

Instruction Examples

movwf PORTA

Move (“mov”) the working register (“w”) into the file register(“f”) named PORTA.

In other words, load the register called PORTA with whatevernumber is in the W register.

Page 26: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

Instruction Examples

movf PORTA, W

Move (“mov”) the the value of the file register (“f”) named PORTA into the working register (“w”) .

In other words, load W with the whatever number is in PORTA.

Page 27: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

Assembly Format• First column: Labels• Second column: opcodes and assembler directives• Third Columns & more: operands

; This is a comments since it starts with a “;”; This program puts out a square wave on PORTA Pin 0

clrf PORTA ; Clear PORTA registerclrf TRISA ; Make PORTA all outputs

Loop bsf PORTA,0; Turn on PORTA Pin 0nop ; Match ‘goto’ delay nop ; “ “ “ bcf PORTA,0; Turn off PORTA Pin 0goto Loop ; If not zero, loop back

Page 28: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

Branch Instruction• All branches are “Bit Tests”• All branches only skip one instruction

; Set EqualFlag if PORTA = PORTB

bcf EqualFlag, 7 ; First, clear the flag

movf PORTA, W ; Move PORTA -> W

subwf PORTB, W ; W - PORTB -> W

btfsc STATUS, Z ; Check Z bit (see STATUS)

bsf EqualFlag, 7 ; Ports equal; set flag

Page 29: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

ST

AT

US

Reg

iste

r

Page 30: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

Direct Addressing• All file registers (RAM) are accessed by an address. This

is called direct addressing.

• For example,

movlw 0xFFmovwf 0x06

loads W with FF, and then loads W into GPIO (address 0x06).

• Thankfully, we can use labels instead of addresses:

GPIO equ 0x06movwf GPIO

Page 31: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

Relative Addressing• PCL = Low byte of the Program Counter• Can be read and written.• Writing to it sets the address of the next instruction to be executed.

12bit core 14bit core

Page 32: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

Relative Addressing

Example of Relative Addressing (using a table):

; Here’s a simple lookup table which is called as a; subroutine. Expects the table offset to be loaded in W.; An example call looks like this:; movlw 0x04 ; Load W with 4; call Table ; Call the table subroutine; movwf Result ; Store the result from the table

Table addwf PCL, W ; Jump to (current PCL) + Wretlw 0x00 ; Return with 0x00 in Wretlw 0x23 ; Return with 0x23 in Wretlw 0x33 ; etc.retlw 0x88

Page 33: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

Indirect Addressing

• Load indirect address into FSR• Reading/Writing to INDF acts on

address stored in FSR

• Example code to clear 0x20 - 7F:

movlw 0x20movwf FSR

loopclrf INDFincf FSR,Fbtfss FSR,7goto loop

INDF00h

04h

7FhRegister File

FSR

Page 34: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

BankingRAM in the PICs is banked, especially special function registers. Use the bank select commands to choose the bank.

Either:

bsf STATUS, RP0bcf STATUS, RPO

Or use the assembler directive:

Banksel <registername>

Page 35: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

Software Tips

• Destination bit determines W or F for result• Look at data movement and re-structure

Example: A + B -> AExample: A + B -> A

MOVF B,WADDWF A,F

2 instructions

MOVF B,WADDWF A,F

2 instructions

MOVF A,WADDWF B,WMOVWF A

3 instructions

MOVF A,WADDWF B,WMOVWF A

3 instructions

Page 36: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

Software Tips

; Define variable names (without bothering with; absolute addresses)

CBLOCK 0x20 ;Start of data space. Var1: 1

Var2: 1Var16:2

ACCL: 1 ACCH: 1

ENDC

; You can always call one thing many names, Grasshopper.

ACCA equ ACCL ;alias ACCLACCB equ ACCH ;alias ACCH

Page 37: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

Software Tips

; This routine multiplies W by tmp (8x8). Uses; temporary register CntDwn and stores 16bit result; in ACCH:ACCL.

Mult clrf ACCL clrf ACCH clrf CntDown bsf CntDown,3 ;CntDown -> 8 bcf STATUS,CMSum rrf tmp,F btfsc STATUS,C addwf ACCH,F rrf ACCH,F rrf ACCL,F decfsz CntDown,F goto MSum return

Page 38: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

Software Tips

;Save the current state on interrupt;(NOTE: _W must map in both Banks - e.g. 7F/FF)

Interrupt movwf _W swapf STATUS,W ;Move STATUS w/o changing it bcf STATUS,RP0 ;Switch to page 0 movwf _STATUS ;Save old status (swapped)

.

.

. swapf _STATUS,W ;Load old STATUS (& unswap)movwf STATUS ;also restores old page#

swapf _W,F swapf _W,W retfie

Page 39: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

Pitfalls!

• Bit tests will screw you up! Be careful!• For example:

movf Register, Wbtfsc STATUS, Zgoto NZero

Zero ..

Nzero .

(WRONG!)

Page 40: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

Pitfalls!

• For all 12 and 14bit cores, the working register, “W”, can NOT be addressed. So:

swapf W, W

will not work!

• However, in the 17CXXX series you CAN address the working register (called WREG).

Page 41: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

Pitfalls!

• Peripheral Pin sharing

Many times pins share functions. E.g., a GPIO will share a pin with a UART module (say the TX line). You CAN’T use one pin for two functions! You must choose between them.

• Peripheral Resource Sharing

Some resources require using the same resource. For example, some of the PWM modules use TMR2, which may also be used in the USART

module.

Page 42: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

Pitfalls!• Read-Modify-Write problems CAN BE SERIOUS! (Uplink)

• BCF/BSF PORTn Does the following:– Reads in the PORTn byte – Clears/sets the bit– Write the whole byte back.– BUT! If something external pulls a different output pin low or high during the

READ, the read in value will not be what you expect - WORSE, the WRITE will permanently change it that way.

• Solution: Use Shadowed I/O (Example: set PORTA Bit 0)bsf _PORTA, 0movf _PORTA, Wmovwf PORTA

Page 43: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

Pitfalls!

Make sure you always set the correct BANK bits!

bsf STATUS, RP0clrf TRISAbcf STATUS, RPO

is correct; but if you just do

clrf TRISA

you’ll actually execute:

clrf PORTA

Page 44: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

Programming PICs: ICSP

• In-Circuit Serial Programmability– Good for commercial design– Available for most PICS– Assemble boards, then program them

• Vpp = +13V• Vdd = Operating Vdd• Cons: Requires dual use on ICSP pins

PIC16CXXPIC14CXXXPIC12CXXX

MCLR/VPP

VDD VDD

VPP

VSS VSS

I/O 1 Clock

I/O 2 Data I/O

Page 45: PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little

Home Task

I/O LEDsA B C 1 2 3 4 5 6

0 0 0 0 0 0 0 0 00 1 Z 1 0 0 0 0 01 0 Z 0 1 0 0 0 0Z 0 1 0 0 1 0 0 0Z 1 0 0 0 0 1 0 00 Z 1 0 0 0 0 1 01 Z 0 0 0 0 0 0 10 0 1 0 0 1 0 1 00 1 0 1 0 1 0 0 00 1 1 1 0 0 0 1 01 0 0 0 1 0 0 0 11 0 1 0 1 1 0 0 01 1 0 0 0 0 1 0 11 1 1 0 0 0 0 0 0

A I/O

B I/O

C I/O

PICmicro

1 2

3 4

5 6

6 LEDs off only three pins!