photolithography – iii ( part 1 ) - folk.ntnu.nofolk.ntnu.no/jonathrg/fag/tfe4180/slides/ch15...
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TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
Photolithography – III ( Part 1 )Chapter 15 : Semiconductor Manufacturing Technology by M. Quirk & J. Serda
Saroj Kumar Patra,Department of Electronics and Telecommunication,
Norwegian University of Science and Technology ( NTNU )
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Ten steps of Photolithography
10) Develop inspect7) Post-exposure bake (PEB)
8) Develop 9) Hard bake
UV Light
Mask
6) Alignmentand Exposure
Resist
4) Spin coat 5) Soft bake1-3) Vapor prime
HMDS
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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Objectives
1. Explain why and how a post exposure bake is done for conventional and Chemically amplified DUV resist.
2. Describe the negative and positive resist development process for conventional and chemically amplified DUV resist.
3. List and discuss the two most common resist development methods and the critical development parameters.
4. Explain why a hard bake is done after resist development.
5. Explain the benefits of a post-develop inspection.
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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Ten steps of Photolithography
10) Develop inspect7) Post-exposure bake (PEB)
8) Develop 9) Hard bake
UV Light
Mask
6) Alignmentand Exposure
Resist
4) Spin coat 5) Soft bake1-3) Vapor prime
HMDS
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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Post-Exposure Bake (PEB)Process:• Typically 1 minute at 100-110 o C on hot plate, followed by cold
plate
Purpose:• Required for DUV-resist (PEB catalyzes the chemical reaction
that makes the exposed resist soluble)• Optional for UV-resist (PEB improves adhesion and reduces
standing waves)• Resist hardening ( Solvent reduction to 3 %)
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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DUV Post-Exposure Bake (PEB)CA DUV resist
DUV exposurePAG forming acids
PEBAcid removes the resistance component
Exposed resist is dissolved in the developer
( water based, alkaline )
CA: Chemically AmplifiedPAG: Photo Acid Generator
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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DUV Post-Exposure Bake (PEB)
• Important with uniform temperature on wafer during PEB
• Delay time from DUV exposure to PEB must be less than 30 minutes to avoid the acid to neutralize due to amine contamination from ambient air (see fig. 15.1)
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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Amine Contamination of DUV Resist leading to “T-top” Formation
PAG
PAG
PAG
PAG
PAG
PAG
PAGPAG
H+
H+
H+
H+
H+
H+
H+
H+
H+
H+
Region of unexposed photoresist
Neutralized photoresist
Acid-catalyzed reaction of
exposed resist (post PEB)
Development
Resist T-topping
Figure 15.1 Quirk & Serda
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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Post-Exposure Bake (PEB)Process:• Typically 1 minute at 100-110 o C on hot plate, followed by cold
plate
Purpose:• Required for DUV-resist (PEB catalyzes the chemical reaction
that makes the exposed resist soluble)• Optional for UV-resist (PEB improves adhesion and reduces
standing waves)• Resist hardening ( Solvent reduction to 3 %)
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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Photolithography Exposure Equipment
(d) Result of PEB
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC PAC
PAC
PAC
PAC
(c) PEB causes PAC diffusion
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC PAC
PAC
PAC
PAC
Unexposed photoresist
Exposed photoresist
(b) Striations in resist
PACPAC
PAC
PAC PAC
PAC
PAC
PAC
PAC
PACPAC
PAC
PAC
PAC
PAC PAC
PACPAC
PACPAC
PAC
PACPAC
Standing waves
(a) Exposure to UV light
PAC = Photo Active Compound
(= DNQ in positive i-line resist)
Positive i-line DNQ-novolak resist
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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Ten steps of Photolithography
10) Develop inspect7) Post-exposure bake (PEB)
8) Develop 9) Hard bake
UV Light
Mask
6) Alignmentand Exposure
Resist
4) Spin coat 5) Soft bake1-3) Vapor prime
HMDS
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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DevelopPurpose:• Pattern printed by removal of unlit resist ( negetive resist ) or lit resist
( positive resist ).
Process Negetive Resist:• Developer is typically an organic solvent (e.g., Xylen).• Application by spray during spinning. Stop developing and rinsing
with alcohol ( spray ) during spinning. Spin dry.
Process Positive Resist:• Often alkaline based developer (e.g., TMAH or KOH).• Application by spray/puddle and subsequent DI water flushing
during spinning. (Alternative in small scale photolithography: Dip indeveloper bath and development stops by dipping in DI water bath).Spin dry.
TMAH = Tetramethyl-ammonium hydroxide
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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Negative Resist Crosslinking
UV
CrosslinksUnexposed resist
Exposed resist
Figure 15.4 Quirk & Serda
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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DevelopPurpose:• Pattern printed by removal of unlit resist ( negetive resist ) or lit resist
( positive resist ).
Process Negetive Resist:• Developer is typically an organic solvent (e.g., Xylen).• Application by spray during spinning. Stop developing and rinsing
with alcohol ( spray ) during spinning. Spin dry.
Process Positive Resist:• Often alkaline based developer (e.g., TMAH or KOH).• Application by spray/puddle and subsequent DI water flushing
during spinning. (Alternative in small scale photolithography: Dip indeveloper bath and development stops by dipping in DI water bath).Spin dry.
TMAH = Tetramethyl-ammonium hydroxide
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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Development of Positive ResistResist exposed to light dissolves in the develop chemical.
Unexposedpositive resist
Crosslinked resist
Figure 15.5 Quirk & Serda
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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Resist Development with Continuous Spray
Vacuum chuckSpindle connected to spin motor
To vacuum pump
Spray Develop-
RinseLoad Station Transfer StationVapor Prime
Resist Coat
Edge-bead Removal
Soft Bake
Cool Plate
Cool Plate
Hard Bake
Wafer Transfer System
(a) Wafer track system (b) Developer spray dispenser
Figure 15.6 Quirk & Serda
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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Puddle Resist Development
(d) Spin dry(c) DI H2O rinse
(b) Spin-off excess developer(a) Puddle dispense
Developerdispenser
Puddle formation
Figure 15.7 Quirk & Serda
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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Photoresist Development Problems
XX X Under
developIncomplete
developCorrectdevelop
Severe overdevelop
Resist Substrate
Figure 15.3 Quirk & Serda
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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Resist Development Parameters• Developer Temperature (ΔT < 1°C)• Developer Time• Developer Volume• Normality (Active concentration in the liquid affects
the development speed)• Rinse (DI water or organic solvent/alcohol)• Exhaust Flow (in case of spray development)• Wafer Chuck (must be perfectly horizontal to ensure
coverage uniformity during puddle development)
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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Ten steps of Photolithography
10) Develop inspect7) Post-exposure bake (PEB)
8) Develop 9) Hard bake
UV Light
Mask
6) Alignmentand Exposure
Resist
4) Spin coat 5) Soft bake1-3) Vapor prime
HMDS
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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Hard Bake• Characteristics of Hard Bake:
– Typically 20 min @ 120-140°C on Hotplate, followed by Cold plate– Removes traces of Water and Developer– Evaporates Residual Solvent in Photoresist (to < 2 %)– Hardens the Resist– Improves Resist-to-Wafer Adhesion– Prepares Resist for Subsequent Processing– Higher Temperature than Soft Bake, but not to Point where Resist Softens
and Flows
• Resist Hardening with Deep UV (for DNQ-novolak resist)– Forms a thin Surface Crust which increases the resist Thermal Stability– Resist can now withstand thermal processes (e.g. ion implant or plasma
etching) up to 210°C without significant resist flow
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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Softened Resist Flow at High Temperature
Photoresist
Figure 15.8 Quirk & Serda
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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Ten steps of Photolithography
10) Develop inspect7) Post-exposure bake (PEB)
8) Develop 9) Hard bake
UV Light
Mask
6) Alignmentand Exposure
Resist
4) Spin coat 5) Soft bake1-3) Vapor prime
HMDS
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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Develop Inspect
• Post-Develop inspection to find defects• Find defects before Etching or Implanting• Prevents scrap• Characterizes the photo process by providing feedback
regarding quality of the lithography process• Develop inspect rework flow
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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Photolithography Exposure Equipment
Photograph courtesy of Advanced Micro Devices, Leica Auto Inspection station
Photo 15.1
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Develop Inspect Rework Flow
1-3. Vapor prime
HMDS
4. Spin coat
Resist
5. Soft bake 6. Align and expose
UV light
Mask
7. Post-exposure bake
8. Develop9. Hard bake10. Develop inspect
O2
PlasmaPlasmaStrip and clean
Rejected wafers
Passed wafersIon implant Etch
Rework
Figure 15.9 Quirk & Serda (modified)
TFE4180 Semiconductor Manufacturing Technology, Photolithography - III
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TFE4180 Semiconductor Manufacturing Technology, Photolithography - III