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Parallel optoelectronic realization of neural networks models using CID technology Aharon Agranat, Charles F. Neugebauer, and Amnon Yariv

California Institute of Technology, Pasadena, California 91125. Received 3 August 1988. Sponsored by Bernard H. Soffer, Hughes Research Lab­oratory. 0003-6935/88/214354-02$02.00/0. © 1988 Optical Society of America. The field of neural networks (NN) models continues to

arouse considerable interest both because of its relevance to brain research and because of its potential for performing various artificial intelligence tasks.1 Further advances in this field are, however, limited due to the absence of efficient and reliable hardware realizations of NN models.

Recently we proposed a new generic architecture for real­izing NN models.2-3 The underlying principle of this ap­proach is to take advantage of the fact that signal processing in microelectronics is an advanced and mature technology and to incorporate optics where microelectronics fails, name­ly, to the interconnectivity problem. To explain the under­lying operation principles of the architecture, let us first describe the basic dynamics of a NN.

LetV = (V1 . . . VN) designate the state of an N-dimension-al network, where Vi is the state of the ith neuron. (For the sake of clarity, we shall limit ourselves to the simple Hopfield model with binary neurons,4 that is, Vi = 0 or Vi = 1.) And let W designate the synaptic interaction matrix—namely, Wij is the strength of the interaction from the jth neuron to the ith neuron. Each neuron, say i, is being updated periodi­cally according to the total input Ii, where

and by using some decision process designated by

where Vi is the next state of the neuron i. Given a set of vectors to be stored in the system u(s) s = 1 . . .

p, the synaptic interaction matrix W is defined by applying a learning rule which impresses these vectors as the stable state of the system (e.g., the Hebb's learning rule5). It is now expected that if the system is not in one of the stable states [V ≠ u(s), s = 1 . . . p], it will be attracted to the stable state which is the closest to its initial state.

The basic idea of the architecture is presented schemati­cally in Fig. 1. The system consists of two main subassemb­lies: a 2-D spatial light modulator (SLM), including its memory and control unit; and an integrated circuit which we shall call the neural processor (NP).

Consider Fig. 1. The synaptic interaction matrix W is stored in the SLM. Thus, by imaging the SLM contents

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onto an array detector which serves as the input unit of the NP, W can be loaded in parallel into the NP. The NP then updates the state of the network V by computing the inputs Ii in parallel and using the decision process.2

In our previous work the array detector of the NP was built of N linear N-dimensional CCD shift registers into which the respective rows of W were loaded. At each iteration the columns of the array are sequentially multiplied by the re­spective neuron state, and the result is accumulated by a column of integrators. Thus the neuronic inputs Ii are calcu­lated in a semiparallel synchronous manner.

In what follows, we describe a completely parallel architec­ture for the NP based on charge injection device (CID) technology.6,7

Fig. 1. Schematic description of the architecture.

Pig. 2. Schematic layout of the CID neural processor.

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For the sake of clarity we shall first describe making the basic NN model (with binary neurons and analog synapses), which is outlined above

A schematic description of the device for an N-dimension-al network is presented in Fig. 2:

SYNP is an N × N CID detector array of the kind de­scribed in Refs. 6 and 7.

AMP is an N-dimensional column of high input imped­ance potential amplifiers, each capable of sensing the charge transfer into its respective row.

DF is a column of decision functions implementing Ref. 2, (e.g., threshold functions).

X is a column of binary registers which contain the state vector of the system V.

VCTRL is a row of N charge collecting control units (to be explained below), and HCTRL is a column of N sensing control units, each connected to the respective row.

Both VCTRL and HCTRL are connected to the main control unit of the device which does not appear in Fig. 2.

A complete update consists of the following stages: (a) Initially the synaptic interaction matrix W is imaged

onto SYNP, so that the collecting electrode7 of each pixel accumulates charge proportional to the respective synaptic efficacy [i.e., the charge accumulated at the (i,j) pixel is proportional to Wij].

(b) After charge accumulation is completed, the charge transfer stage takes place. For each column, if the respective neuron is active, the charge transfer from each pixel of that column (using the respective HCTRL unit) into the row of that pixel is enabled, i.e., for the jth column: if V) = 1, then Wij is transferred to the ith row for i = 1 . . . N.

(c) The charge transferred to each row is sensed collec­tively (using the respective VCTRL unit); thus the charge measured at each row is proportional to ƒ,∙ (given by Ref. 1). The state of the network stored in X is then updated using the decision function column (DF).

(d) Finally the system is reset either destructively or nondestructively.7 In a destructive reset the charge in SYNP is flushed into the substrate, and SYNP is ready for an optical reloading as in (a). In nondestructive reset the charge in each pixel is returned to the charge collecting electrode and the system is ready to be reupdated directly as in (b).

The update cycle can thus be repeated until the state of the network V converges. (The main control unit of the device which controls the update and halts operation when V con­verges is not contained in Fig. 2.)

Currently existing CID array detectors typically contain 256 × 256 elements. The dimension of a neural network built using this technology will, therefore, be limited to 102-103 neurons. (Relying on currently existing technologies, the bottleneck is probably the absence of a suitable SLM.8)

The update rate will depend on the readout mode. When using destructive readout, W must be loaded prior to each update cycle. The update rate in this arrangement would be determined by the performance of the light source and would be limited to 103-104 updates/s. When using nondestructive readout, faster update rates can be achieved. Assuming 10 μsec/read,8 105 updates/s can be reached. However, in the latter case, the thermally generated charge has to be taken into account.8 The device will have to be kept at low tem­perature, or a periodic reset and reload of W must take place.

Finally, it should be realized that the CID NP is not limited to the basic Hopfield model with binary neurons. In particular, by changing the voltage of the columns, the charge transfer efficiency can be governed, and thus analog neurons9 can be realized.

References 1. S. Grossberg, "Nonlinear Neural Networks: Principles, Mecha­

nisms and Architectures," Neural Network 1, 17 (1988). 2. A. Agranat and A. Yariv, "Semiparallel Microelectronic Imple­

mentation of Neural Network Models using CCD Technology," Electron. Lett. 23, 580 (1987).

3. A. Agranat and A. Yariv, "A New Architecture for a Microelec­tronic Implementation of Neural Network Models," in Proceed­ings, IEEE First Annual International Conference on Neural Networks, June 1987, Vol. 3, pp 403-409.

4. J. J. Hopfield, "Neural Networks and Physical Systems with Emergent Collective Computational Abilities," Proc. Natl. Acad. Sci. USA 79, 2554 (1982).

5. D. 0. Hebb, The Organization of Behavior (Wiley, New York, 1949).

6. G. J. Michon and H. K. Burke, "Charge Injection Imaging," in Technical Digest, IEEE International Solid State Circuit Con­ference (1973), Vol. 16, pp. 138-139.

7. G. R. Sims and M. Bonner Denton, "Spatial Pixel Crosstalk in a Charge Injection Device," Opt. Eng. 26, 999 (1987).

8. U. Efron, "Spatial Light Modulators for Optical Information Processing," Proc. Soc. Photo-Opt. Instrum. Eng. 700, (1986).

9. J. J. Hopfield, "Neurons with Graded Responses Have Collective Computational Properties like Those of Two State Neurons," Proc. Natl. Acad. Sci. USA 81, 3088 (1984).

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