panels mpc5645s-demo-v2 output from mpc5645s · the mpc5645s-demo-v2 comes configured for use with...
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1 IntroductionThe MPC5645S-DEMO-V2 features the MPC5645S 32-bitmicrocontroller targeting single-chip automotive instrumentcluster applications. MPC5645S devices are part of theMPC56xxS family of Power Architecture™-based devices.This family has been designed with an emphasis on providingcost-effective and high quality graphics capabilities to satisfythe increasing market demand for color Thin Film Transistor(TFT) displays within the vehicle cockpit. Traditional clusterfunctions, such as gauge drive, real time counter, and soundgeneration are also integrated on each device. The boardsimplifies the development of applications for the MPC5645Smicrocontroller by providing the most commonly usedexternal peripherals on a single PCB. Specifically the boardfeatures:
• Connections for 2 x SHARP LQ043T1DG01 touchscreen LCD TFT panels or LQ043T1DG02 LCD TFTpanels (DCU and DCULite)
• General purpose MICTOR connector for connection ofyour own panels
• Two DVI outputs for connection of desktop TFT LCDpanels
• Headphone amplifier and 3.5 mm stereo jacks for soundoutput from MPC5645S
• Video in port and video ADC supporting compositevideo connected to the VIU module
• 64 MB of serial flash in two 32 MB chips connected inparallel to QuadSPI ports
• 64 MB of mobile LPDDR memory in two 32 MB chips
Freescale Semiconductor Document Number:MPC5645SDEMOUG
User Guide Rev. 0,09/2012
MPC5645S-DEMO-V2
© 2012 Freescale Semiconductor, Inc.
Contents
1 Introduction................................................................1
2 Initial Setup...............................................................2
3 On-board memory.....................................................4
4 Application Configuration........................................4
5 Index of MCU pin usage.........................................11
6 Project Examples.....................................................13
• 1 x CAN and 1 x LIN serial interfaces with physical interfaces• USB port for connection to UART or SPI interfaces• Nexus interfaces on MICTOR connector and JTAG connector and embedded USB debug connection
2 Initial SetupThe MPC5645S-DEMO-V2 comes configured for use with the most common settings. You can change the configuration ofthe board by configuring jumpers as described below.
NOTEIn all cases remove power from the board before changing any jumper configurations.
2.1 Power supplyThe board operates from a +12 V, 1 A supply provided on a barrel jack, centre positive, at P1. The board is protected by a 20mm cartridge fuse F1 and a value of 1 A is recommended for this. Note that the board includes protection for reverse polarityconnection.
The +12 V supply to the board is enabled by switch SW1.
The board generates further voltages from this initial supply. It is recommended that these are always enabled for normaloperation but they can be disabled or disconnected by connecting or removing jumpers as follows:
• +5 V switching regulator — Disable fit J40• +3.3 V switching regulator — Disable fit J35• +1.8 V switching regulator — Disable fit J36
It is possible to isolate the MCU from its power supplies for measurement purposes or to change the supply voltage bycutting traces on the PCB and providing jumpers to replace the connections.
NOTETake extreme care to avoid unintentionally disconnecting the MCU from its powersupplies.
Jumper Description Cut link
J38 Analog 5 V supply SH4
J39 MCU stepper motor +5 V supply SH5
J37 MCU 3V3 supply SH3
By default the VDDR supply for the MCU is configured to operate from +5 V but this can be changed by cutting a link andconnecting a jumper.
Jumper Description Cut link
J11 1-2 MCU VDDR operates from +5 V SH1
J11 2-3 MCU VDDR operates from +3.3 V
2.2 OscillatorThe MCU operates from an 8 MHz crystal.
Initial Setup
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A second auxiliary 32 kHz crystal is directly connected to port pins PC14 and PC15. This means that these pins cannot alsobe used for other functions.
2.3 ResetThe board includes an external low-voltage reset controller that pulls reset on the part when the +5 V regulator drops belowapproximately 2.6 V. A reset button SW6 is also supplied to force the MCU reset line low. LED D9 will be active when theMCU reset line is active.
2.4 Development toolsSeveral suppliers provide development and debugging support for the MPC5645S. Freescale provides the CodeWarriorDevelopment Studio, this is a complete integrated Development Environment (IDE) that provides a highly visual andautomated framework to accelerate the development of the most complex embedded applications. An evaluation license isavailable from freescale.com.
2.5 Debug interfacesThere are three debug interfaces available on the board:
• Integrated OSBDM debug interface on J2• JTAG 14-pin universal debug connector on P1• Nexus trace debug connector on P3
The USB connector J2 allows connection of the MPC5645S-DEMO-V2 directly to a PC with the CodeWarrior DevelopmentStudio for the MPC56xx. The debug software provided with this package recognizes the attached hardware as a developmenttool and attempts to connect. Depending on the version of the tool in use it may be necessary to select the MPC5645S as thetarget processor. The MPC5645S-DEMO-V2 does not take any power from the connected USB cable and so the primary 12V power supply must always be provided even when using the integrated debugger.
The P1 and P3 connectors allow connection of any compatible debugger. Refer to freescale.com for information aboutsuppliers of these debuggers
The choice of a debug interface in use is made using jumper J12. Fit jumpers to J12 to enable the integrated OSBDMdebugger.
Header Description
J12 1-2 Enable the integrated debugger option
12 3-4, 5-6 Enable the integrated debugger to reset the MPC5645S MCU
If using an external debugger then there is an option to place the TDO pin in a known default state. Jumper J8 provides anoptional pull-up on the TDO pin.
Header Description
J8 Provides 10k pull up on JTAG TDO pin
Header J10 is provided to reprogram the integrated MC9S08JM60 device if required.
Initial Setup
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2.6 Starting up the boardFollow these steps when starting the board:
• Install the required development software include any additional software required for your debugger of choice• Ensure switch SW1 is in the OFF position. It connects the supplied +12 V power supply from connector P2• Select the debugger option required using jumpers on J12• Connect the debugger or USB cable• If any change has been made to the default power supply cut-links then ensure that a suitable jumper is in place (see
section 2.1)• Apply power to the board by setting SW1 to the ON position.• If the integrated OSBDM debugger is in use then the host PC recognizes a USB connection and may require new
drivers to be installed. Install the required drivers.• Run your debug software and the MPC5645S MCU will be visible and ready for development
Note that the OSBDM connection requires a delay of 200 ms after reset for correct connection.
3 On-board memoryThere are two external memory systems available on the MPC5645S and both are supported on the MPC5645S-DEMO-V2.
• 2 x Micron MT46H16M16LFBF-6 (256 Mb) LPDDR memories providing a 32-bit interface to the MPC5645S for atotal of 32 MB of SDRAM
• 2 x Spansion S25FL256P (256 Mb) serial QuadSPI flashes providing a dual QuadSPI serial flash interface to theMPC5645S for a total of 32 MB of serial flash
The LPDDR memory uses the dedicated SDRAM interface on the MPC5645S and requires no GPIO for this function. Theserial flash uses 12 GPIO pins.
There is no hardware configuration required to use these on-board memories.
Both memory systems require software configuration before they can be used. See Section 6 for how to obtain exampleconfigurations provided by Freescale.
4 Application ConfigurationThis section includes a description of the interfaces provided on the board and how to configure them.
NOTEIn all cases remove power from the board before changing any jumper configurations orconnecting any external hardware.
4.1 LCD TFT panelsThe board contains direct connections for two independent TFT panels. These are connected to the DCU and the DCULiteinterfaces and each provides a choice of three connection possibilities:
• 2 x Sharp LQ043T1DG01 touch screen LCD TFT panels or LQ043T1DG02 LCD TFT panels• General purpose MICTOR connector for connection of your own panel• DVI to video monitor
On-board memory
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The panels can be configured independently from each other, but only one option should be used at a time for each of theDCU or DCULite.
4.2 Configuring touch screen panelsFit the Sharp LQ043T1DG01 touch screen panels by connecting the panel FFCs to J42, J44, and J46 for the DCU and J41,J43, J45 for the DCULite.
When using the Sharp LQ043T1DG01 touch screen LCD TFT panels a backlight voltage of +30 V is provided.
4.3 Using an alternate panelIt is possible to connect a different panel to the board by using the general purpose connectors P9 for the DCU and P8 for theDCULite. These are industry-standard 38-pin MICTOR connectors.
4.4 DVI connectionIt is also possible to connect the board to external TFT panels via DVI (Digital Video Interface) connectors P10 and P11. Toenable the DVI output, configure the DCU or DCULite to a suitable panel format (normally VGA or higher) then connect ajumper at J14 1-2 for the DCU and J14 3-4 for the DCULite. Any timing skew on the panel can be corrected by adjusting theswitches at SW5. The status of the connection may be monitored at J14 pin 5 for the DCU or J14 pin 6 for the DCULite; alow signal on these pins indicates a panel has been connected.
NOTEThe default connection on the board assumes that four ADC pins will be used onconnectors P8 and P9 for resistive touch screen operation. Since the connector alsoallows an I2C interface on these pins the factory configuration connects the followingpins directly to each other: PC0=PC4=PK10 and PC1=PC5=PK11. If these pins are to beused independently then it is necessary to cut links SH6, SH7, SH9, and SH10.
Table 5. DCU connections on connector P9
Pin no RGB Digital RSDS Pin no RGB Digital RSDS
1 R0 RSDS0P 2 B0 RSDS8P
3 R1 RSDS0M 4 B1 RSDS8M
5 R2 RSDS1P 6 B2 RSDS9P
7 R3 RSDS1M 8 B3 RSDS9M
9 R4 RSDS2P 10 B4 RSDS10P
11 R5 RSDS2M 12 B5 RSDS10M
13 R6 RSDS3P 14 B6 RSDS11P
15 R7 RSDS3M 16 B7 RSDS11M
17 G0 RSDS4P 18 +3.3 V
19 G1 RSDS4M 20 +3.3 V
21 G2 RSDS5P 22 VSYNC —
23 G3 RSDS5M 24 HSYNC —
25 G4 RSDS6P 26 DE/ENABLE RSDCLKM
Table continues on the next page...
Application Configuration
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Table 5. DCU connections on connector P9 (continued)
Pin no RGB Digital RSDS Pin no RGB Digital RSDS
27 G5 RSDS6M 28 CLK RSDSCLKP
29 G6 RSDS7P 30 +5 V
31 G7 RSDS7M 32 +5 V
33 Y down 34 Y up1
35 X right 36 X left 2
37 +12 V 38 +12 V
1. Optional I2C SDA_1 function on PK10 by link at SH102. Optional I2C SCK_1 function on PK11 by link at SH9
Table 6. DCULite connections on connector P8
Pin no RGB Digital Pin no RGB Digital
1 R0 2 B0
3 R1 4 B1
5 R2 6 B2
7 R3 8 B3
9 R4 10 B4
11 R5 12 B5
13 R6 14 B6
15 R7 16 B7
17 G0 18 +3.3 V
19 G1 20 +3.3 V
21 G2 22 VSYNC
23 G3 24 HSYNC
25 G4 26 DE/ENABLE
27 G5 28 CLK
29 G6 30 +5 V
31 G7 32 +5 V
33 Y down 34 Y up1
35 X right 36 X left 2
37 +12 V 38 +12 V
1. Optional I2C SDA_1 function on PK10 by link at SH72. Optional I2C SCK_1 function on PK11 by link at SH6
4.5 SoundThe board contains a Freescale sound codec and headphone amplifier SGTL5000 connected to the MCU. This codec canprovide headphone and line out levels from either the I2S or the PWM output of the MCU’s Sound Generation Module(SGM).
Application Configuration
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The choice of output between the PWM and I2S is controlled in software by registers in the SGM. The board is configuredsuch that the I2S DO pin is connected to PB8, and the PWMO pin is connected to PB10. Therefore, for PWM output thesoftware must configure the MCU to use PB10 and for I2S output the software must configure the MCU to use PB8.
The sound output is available to directly connect headphones at connector J30. A line-level output is also provided atconnector J34.
4.6 PWM OutputThe PWM output is filtered by a 8 kHz low pass 4th order Bessel filter and fed to the left Line-in pin of the SGTL5000. Anunfiltered version is fed to the right Line-in pin. This allows comparison of the sound quality of filtered and unfiltered PWMunder software control.
4.7 I2S OutputThe SGTL5000 codec is configured using I2C_1 on pins PF4 and PF7. Refer to the documentation of the codec forconfiguration options.
4.8 VideoThe board allows connection of two types of video input. Connector J24 allows input of an analogue composite video signal(either PAL or NTSC) and connector P4 allows connection of a digital RGB or YUV bus.
The composite signal conversion is performed by an Analog Devices video DAC ADV7180. This device is configured usingI2C_0 on pins PF8 and PF9 and controlled by MCU I/O PM0, PM1, PJ3, and PF2.
MCU port MCU Function Comment
PF8 SDA_0 I2C_0 bus
PF9 SCL_0
PM0 Output pin Video DAC reset input pin (active low)
PM1 Output pin Video DAC power down pin (active low)
PF2 Input pin Video DAC interrupt request pin (activelow)
The digital input signals are connected such that the VIU or PDI inputs can be used. Note that I2C_0 is also used as theconfiguration bus for peripherals connected to this connector.
Table 8. Pinout for P4
Pin no Signal Pin no Signal
1 VIU0 (PK2) 2 PDI0 (PJ4)
3 VIU1 (PK3) 4 PDI1 (PJ5)
5 VIU2 (PK4) 6 PDI2 (PJ6)
7 VIU3 (PK5) 8 PDI3 (PJ7)
9 VIU4 (PK6) 10 PDI4 (PJ8)
11 VIU5 (PL4) 12 PDI5 (PJ9)
Table continues on the next page...
Application Configuration
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Table 8. Pinout for P4 (continued)
Pin no Signal Pin no Signal
13 VIU6 (PL5) 14 PDI6 (PJ10)
15 VIU7 (PL6) 16 PDI7 (PJ11)
17 VIU8 (PL7) 18 +3.3 V
19 VIU9 (PL8) 20 +3.3 V
21 — 22 PDI_VSYNC (PJ2)
23 — 24 PDI_HSYNC (PJ1)
25 — 26 PDI_DE/ENABLE (PG12)
27 VIU CLK (PJ3) 28 PDI_CLK (PL9)
29 — 30 +5 V
31 — 32 +5 V
33 — 34 SDA_0 (PF8)
35 — 36 SCL_0 (PF9)
37 +12 V 38 +12 V
4.9 CAN InterfaceThe board implements a physical interface (TJA1041T) on one of the MCU FlexCAN busses: FlexCAN0 is connected to J5.
It is possible to supply the physical interface from an external power supply. The physical interface enable and inhibit signalsare brought out to headers to allow connection of additional control signals from the CPU. However, jumper J13 providessimple connections to the STB and EN pins to allow the interface to be operated with the addition of two jumpers.
Connector Description
J20 Vbat supply for physical interface for FlexCAN0, fit jumper to use on-board +12 V supply
J16 – 1 FlexCAN0 Physical interface INH pin
J16 – 2 FlexCAN0 Physical interface ERR pin
J13 – 1 FlexCAN0 Physical interface WAKE pin
J13 – 4 FlexCAN0 Physical interface EN pin — jumper to pin 2 for pull to +5 V, jumper to pin 6 for software controlvia PM4
J13 – 5 FlexCAN0 Physical interface STB pin — jumper to pin 3 for pull to +5 V, jumper to pin 6 for software controlvia PM4
4.10 Serial Boot mode supportFlexCAN0 uses MCU pins PB0 and PB1 for compatibility with serial boot mode support on the MPC5645S. To configurethe device to perform FlexCAN serial boot mode place jumpers on J13 pin 2-4 and pin 3-5, then select CAN boot mode byplacing jumpers on J23 pin 9-10 (no jumper on J23 pin 11-12).
Application Configuration
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4.11 LIN InterfaceThe board implements a physical interface (MCZ33661EF) on one of the MCU LINFlex buses: LINFlex1 is connected to J3.
It is possible to pull up the LIN bus from an external power supply.
Connector Description
J7 Diode and 1k pull up enabled between Vsup and LIN bus
4.12 Serial Boot mode supportSee Section 3.6.1 for details.
4.13 USB adapterThere are two options for serial connection to a host computer over USB. The UART function of LINFlex0 can be routedthrough the integrated OSBDM debug connector at J2 or to a dedicated connector at J1.
• The use of the serial channel on J2 requires suitable software for the OSBDM interface.• The J1 connector provides a high-speed interface to the MCU via a dedicated USB adapter (FT2232D). The USB
adapter supports the USB serial port format and is recognized automatically by a host computer, however, you mayneed to install drivers to use the port. The drivers are available from http://www.ftdichip.com/FTDrivers.htm. Select thedrivers that support FT2232D interface IC.
Select the required USB interface by setting jumpers on J17.
Header USB Port MCU pin/port
J17 – 1-3 FT2232D BDBUS0 PB3
J17 – 2-4 FT2232D BDBUS1 PB2
J17 – 3-5 OSBDM Rx PB3
J17 – 4-6 OSBDM Tx PB2
The USB converter IC has six spare pins on port A. These are available on header J6.
Header FT2232D Port MCU pin/port
J6 – 1 ADBUS0 —
J6 – 2 ADBUS4 —
J6 – 3 ADBUS1 —
J6 – 4 ADBUS5 —
J6 – 5 ADBUS2 —
J6 – 6 ADBUS6 —
Application Configuration
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4.14 Serial Boot mode supportThe LinFlex0 (UART) function uses MCU pins PB2 and PB3 for compatibility with serial boot mode support on theMPC5645S. To configure the device to perform LINFlex serial boot mode place jumpers on J23 pin 9-10 and pin 11-12 andJ17 pins 1-3 and 2-4.
4.15 Stepper Motor and ADC portsThe board provides two connectors that simplify stepper motor connections to the board. Each port also includes four ADCpins to allow other analog feedback and measurement if required.
These pins may be used as general purpose I/O as required.
Connector pin Description Connector pin Description
P6 — 1 PC10 (ANS10) P6 — 2 PD4 (M1C0M)
P6 — 3 PL0 (ANS19) P6 — 4 PD5 (M1C0P)
P6 — 5 GND P6 — 6 PD6 (M1C1M)
P6 —7 PD3 (M0C1M) P6 — 8 PD7 (M1C1P)
P6 — 9 PD2 (M0C1P) P6 — 10 +5 V
P6 — 11 PD1 (M0C0M) P6 — 12 PL1 (ANS18)
P6 — 13 PD0 (M0C0P) P6 — 14 PC11 (ANS11)
P5 — 1 PD11 (M2C1P) P5 — 2 PL3 (ANS16)
P5 — 3 PD10 (M2C1M) P5 — 4 PC13 (ANS13)
P5 — 5 PD9 (M2C0P) P5 — 6 +5 V
P5 — 7 PD8 (M2C0M) P5 — 8 PD12 (M3C0M)
P5 — 9 GND P5 — 10 PD13 (M3C0P)
P5 — 11 PC12 (ANS12) P5 — 12 PD14 (M3C1M)
P5 — 13 PL2 (ANS17) P5 –—14 PD15 (M3C1P)
4.16 General purpose I/O interfacesTo simplify hardware debug the board provides some basic I/O functions on the remaining unused MCU pins. These pinsmay be connected to external hardware or jumpered to the on-board functions.
Connector MCU Port Hardware function Recommended function
J32 1-2 PK0 Red LED: anode connected via 100R to +3.3V
eMIOS[18]
J32 3-4 PF0 Green LED: anode connected via 100R to+3.3 V
eMIOS1[19]
J32 5-6 PF1 Push switch of thumbwheel SW9 EIF8 (SIU interrupt)
J32 7-8 PF3 Push switch of thumbwheel SW8 WKUP10
J32 9-10 PL10 A pin of thumbwheel SW8 eMIOS1[10:11] in quadrature mode
J32 10-12 PL11 B pin of thumbwheel SW8
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Application Configuration
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Connector MCU Port Hardware function Recommended function
J32 13-14 PL12 A pin of thumbwheel SW9 eMIOS1[12:13] in quadrature mode
J32 15-16 PL13 B pin of thumbwheel SW9
J23 1-2 PK7 DIP switch 1 GPIO
J23 3-4 PK8 DIP switch 2 GPIO
J23 5-6 PK9 DIP switch 3 GPIO
J23 7-8 PB4 None
J23 9-10 PB5 Pull up to 3.3 V FABM serial boot mode
J23 11-12 PB6 Pull down to GND ABS serial boot select
J23 13-14 PH4 None
J23 15-16 PJ12 DIP switch 4 GPIO
J47 1 PE0 None High drive GPIO / Stepper
J47 3 PE1 None High drive GPIO / Stepper
J47 5 PE2 None High drive GPIO / Stepper
J47 7 PE3 None High drive GPIO / Stepper
J47 9 PE4 None High drive GPIO / Stepper
J47 11 PE5 None High drive GPIO / Stepper
J47 13 PE6 None High drive GPIO / Stepper
J47 15 PE7 None High drive GPIO / Stepper
J48 1 PC8 None ADC
J48 3 PC9 None ADC
5 Index of MCU pin usageTo optimize function and performance most of the MCU I/O pins are pre-configured for specific uses on the board. This tablesummarizes where the I/O pins are used and for what function.
Table 15. I/O pins
MCU Port Connected to Recommended function
PA[0:15] DCU display connectors DCU
PB[0:1] FlexCAN0 Interface FlexCAN0
PB[2:3] USB Interface or OSBDM DebugInterface
LINFlex0 (UART mode)
PB[4:6] J23 GPIO/DPSI/Alternate boot function
PB7 SCK function of Sound codec SGM (I2S)
PB8 DO function of Sound codec SGM (I2S)
PB9 FS function of Sound codec SGM (I2S)
PB10 PWM function of Sound codec SGM (PWM)
PB11 MCLK function of Sound codec SGM
PB[12:13] LINFlex1 Interface LINFlex1
Table continues on the next page...
Index of MCU pin usage
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Table 15. I/O pins (continued)
MCU Port Connected to Recommended function
PC[0:3] Touch screen for DCU ADC
PC[4:7] Touch screen for DCULite ADC
PC[8:9] J48 ADC / GPIO
PC[10:11] P6 ADC / GPIO
PC[12:13] P5 ADC / GPIO
PC[14:15] 32 kHz crystal SXOSC (32 kHz oscillator)
PD[0:7] P6 SMC / SSD / GPIO
PD[8:15] P5 SMC / SSD / GPIO
PE[0:7] J47 SMC / SSD / GPIO
PF0 J32 or Green LED GPIO / eMIOS1[19]
PF1 J32 or thumbwheel switch on SW9 GPIO / EIF[8] / eMIOS1[20]
PF2 Video ADC interrupt WKUP9 or NMI
PF3 J32 or thumbwheel switch on SW8 GPIO / WKUP10] / eMIOS1[21]
PF4 I2C for sound codec I2C_1
PF5 I/O for QuadSPI1 QuadSPI
PF6 I/O for QuadSPI1 QuadSPI
PF7 I2C for sound codec I2C_1
PF[8:9] I2C for video ADC and video input port I2C_0
PF[10:15] Serial flash U18 (QuadSPI0) QuadSPI
PG[0:11] DCU display connectors DCU
PG12 P4 Camera input port PDI
PH[0:3] P1 and P3 debug connectors JTAG
PH4 J23 GPIO / eMIOS1[21]
PJ0 DCULite display connectors DCULite
PJ[1:2] P4 Camera input port VIU/PDI
PJ3 Video clock in on video ADC andcamera input port
VIU
PJ[4:11] P4 camera input port PDI
PJ12 J23 or DIP switch GPIO
PJ[13:15] Serial flash U21 (QuadSPI1) QuadSPI
PK0 J32 or Red LED GPIO / eMIOS1[18]
PK1 I/O for QuadSPI1 QuadSPI
PK[2:6] P4 camera input port VIU
PK[7:9] J23 or DIP switch GPIO / LINFlex2 / SGM (PWM)
PK[10:11] Optional I2C interface for DCU adapterand DCULite adapter (fit SH6, SH7,SH10, SH11)
PL[0:1] P6 ADC / FlexCAN1
PL[2:3] P5 ADC / eMIOS1[22:23]
PL[4:9] P4 Camera input port VIU
Table continues on the next page...
Index of MCU pin usage
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Table 15. I/O pins (continued)
MCU Port Connected to Recommended function
PL[10:11] J32 and thumbwheel encoder GPIO / eMIOS1[10:11]
PL[12:13] J32 and thumbwheel encoder GPIO / eMIOS1[12:13]
PM[0:1] Reset and power down for video ADCand 10k pull down
PM2 DCULite display connectors DCULite
PM3 LIN enable GPIO
PM4 J13 or FlexCAN0 enable GPIO
PM[12:13] DCULite display connectors DCULite
PN[0:15] DCULite display connectors DCULite
PP[0:7] DCULite display connectors DCULite
6 Project ExamplesFreescale provides CodeWarrior Development Studio projects to assist in the development of software. These softwareprojects initialize the MPC5645S-DEMO-V2 hardware and provide simple examples of how the hardware may be used. Seefreescale.com for the latest version.
Project Examples
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Table of Contents
Power supply2 Notes3
RevisionsRev Description
X1 FirstproductionMPC5645S board
Approved
S.McAslan
Date
05August11
456789101112
MPC5645S PowerDecouplingMPC5645S PeripheralsDisplaysMemoryAudio and motorsSerial InterfaceVideo InputDebug
X2
1. Capacitors C2, C31, C23, C26 changed to higher voltage rating
2.Capacitor C201 moved from VDD_30V to P12V
3.Capacitors C215,C216 added to VDD_30V
4.Capacitors C217,C218, C219,C220 added to DM_VTT_DDR2 power
5.Capacitor C37 added to P12V
18August11 S.McAslan
X3
S.McAslan23August11
1.Capacitor C38 & C39 filtering added to USB nets and made as DNP.
2.Net names added before and after FB in power and regulator sections.
3.Differential clock nets suitably appended with _P/_N
4. U14 updated to 344-01142
X41. Header J31 rotated per Alberto request.
2. IC U4, LIN Transceiver changed from 312-76816 to TMP-WF-15527 (TJA1020T from NXP) S.McAslan26August11
3. Decaps added to U19,U20 and U22
X5
1. Pullup resistor added to PF8 (SDA_0), PF9(SCL_0) PF4 (SDA_1) and PF7(SCL_0) and made as DNP
30August11 S.McAslan
2. Netname between U25 and P11 changed from DCU_* to DCUL_*
X605Sep11 S.McAslan
1. DDR series termination resistor's package changed from 0603 to 0402
X7
1. DDR series termination resistors RN5 and RN6 package changed to individual 0402 package to aid routing.
2. Capacitor C38 & C39 filtering added to USB nets JM_USB_N/P and made as DNP.
06Sep11 S.McAslan
X8 1. CAN-DB9 pinouts changed to standard connection.07Sep11 S.McAslan
S.McAslan19Sep11A A085 Release
AX1 A070 Release - J41,J42 connector pin outs reversed17Nov11 S.McAslan
R89 removed from U12- pin no 3
R23 value changed from 100ohms to 470ohms
U12 - pin 4 is supply changed from 5V_SR to 3.3V_SR
– J12 pin 4 is connected with U12- pin 3 ( Net name JM_RST_B)
18Nov11
B
A085 Release
S.McAslan21Nov11
1 Revision History & TOC
R89(DNP) added at U12- pin no 3, connected to 3.3V_SR
MKT part number updated as MPC5645S-DEMO-V2 23Nov11
Board ID, Board Revision are Hard wired. 29Nov11
1Dec11
Drawing Title:
Size Document Number Rev
Date: Sheet of
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Designer:
Drawn by:
Approved:
Microcontroller Solutions Group
6501 William Cannon Drive WestAustin, TX 78735-8598
This document contains information proprietary to Freescale Semiconductor and shall not be used forengineering design, procurement or manufacture in whole or in part without the express written permissionof Freescale Semiconductor.
ICAP Classification: FCP: FIUO: PUBI:
SCH-27293 PDF: SPF-27293 B
MPC5645S-DEMO-V2
C
Friday, January 11, 2013
TITLE PAGE
S.McAslan
S.McAslan
S.McAslan
1 12
____X____Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Microcontroller Solutions Group
6501 William Cannon Drive WestAustin, TX 78735-8598
This document contains information proprietary to Freescale Semiconductor and shall not be used forengineering design, procurement or manufacture in whole or in part without the express written permissionof Freescale Semiconductor.
ICAP Classification: FCP: FIUO: PUBI:
SCH-27293 PDF: SPF-27293 B
MPC5645S-DEMO-V2
C
Friday, January 11, 2013
TITLE PAGE
S.McAslan
S.McAslan
S.McAslan
1 12
____X____Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Microcontroller Solutions Group
6501 William Cannon Drive WestAustin, TX 78735-8598
This document contains information proprietary to Freescale Semiconductor and shall not be used forengineering design, procurement or manufacture in whole or in part without the express written permissionof Freescale Semiconductor.
ICAP Classification: FCP: FIUO: PUBI:
SCH-27293 PDF: SPF-27293 B
MPC5645S-DEMO-V2
C
Friday, January 11, 2013
TITLE PAGE
S.McAslan
S.McAslan
S.McAslan
1 12
____X____
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1. Unless Otherwise Specified:
All resistors are in ohms, 5%, 1/8 Watt
All capacitors are in uF, 20%, 50V
All voltages are DC
All polarized capacitors are aluminum electrolytic
2. Interrupted lines coded with the same letter or letter combinations are electrically connected.
3. Device type number is for reference only. The number varies with the manufacturer.
4. Special signal usage:
_B Denotes - Active-Low Signal
<> or [] Denotes - Vectored Signals
5. Interpret diagram in accordance with American National Standards Institute specifications, current revision, with the exception of logic block symbology.
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NOTES
2 12
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NOTES
2 12
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NOTES
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___ ___X
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Vout = 1.21(1 + R2/R1)
1.8V Switching Regulator (@0.75A)
Main Power-In
GND Test Points
Switching Regulators
3.3V Switching Regulator (@1A)
Nexus ConnectorPower Monitor
5V Switching Regulator (@1A)
2.1mm BarrelConnector
POWER SWITCH
Power supply input and filter
Test and reference points
Power 1: Input and Switchers
Vout = 1.21(1 + 487/1000) = 1.80 V
1.8V_SR_EN 1.8V_SR_L
1.8V_SR_FB
5.0V_SR_L
3.3V_SR_L
VSwitched VFused12V-IN
5.0V_SR_EN
3.3V_SR_EN
GND
1.8V_SR
GND
GND
P12V
5.0V_SR
GND
P12V_R
GND
3.3V_SR
GND
GND
P12V
Drawing Title:
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Power Supply
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Power Supply
3 12
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Power Supply
3 12
___ ___X
R108
560
U15
LM2676S-ADJ
INPUT2
SW_OUT1
C_BOOST3
GN
D4
TA
B8
FEEDBACK6
ON/OFF7
NC5
L9 68UH
D14
LED GREEN
AC
C2
0.1UF
TP9
1
D5
B130LB-13
AC
+
C202
68UF
+
C199
220uF
+
C4
1000UF
C200 0.01uF
L5 47UH1 2
+
C32
10UF
D10
LED GREEN
AC
D8
B340A
AC
TP3
1
TP14
1
P2
12V_DC
123
R102
270
TP19
1
U16
LM2676S-5.0
INPUT2
SW_OUT1
C_BOOST3
GN
D4
TA
B8
FEEDBACK6
ON/OFF7
NC5R59 100
C26
0.1UF
L7 47UH1 2
C1
1000PF
J40
HDR 1X2
5V disable
12
TP16
1
F1
Fuse Holder
1 2
D11
B130LB-13
AC
TP18
1
+
C21
10UF
J36
HDR 1X2
1.8V disable
12
R28 487.0
TP2
1
C28
1UF
TP15
1
SW1
G-107-0513
OFF ON
1 34 2
5
TP23
1
+
C65
68UF
R29 1.0K
L6 47UH1 2
TP1
1
U13
LM2676S-3.3
INPUT2
SW_OUT1
C_BOOST3
GN
D4
TA
B8
FEEDBACK6
ON/OFF7
NC5
C23
0.1UF
C27
1UF
C116 0.01uF
J35
HDR 1X2
3.3V disable
12
TP17
1
TP20
1
TP22
1
C184 0.01uF
D12
B130LB-13
AC
C31
0.1UF
TP13
1
+
C149
100uF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Do not fit jumpers
MCU POWER
VSSAGND
5.0V_SR
V_REG
V_AN5.0V_SR
SMD_5V5.0V_SR
MCU_3V33.3V_SR
3.3V_SR
MCU_3V3
V_AN
SMD_5V
VDD12
VDDAV_AN
1.8V_SR
MCU_3V3
VDD12
VSSA
GND
GND
V_REG
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MPC5645 Power
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MPC5645 Power
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MPC5645 Power
4 12
___ ___X
SH2 0
SH3 0
L8
BLM31AJ601SN1L
1 2
SH1 0
J38
HDR 1X2
1 2
J11
HDR TH 1X3
1 2 3
SH4 0
J39
HDR 1X2
1 2
J37
HDR 1X2
1 2
MPC5645S 416BGAPOWER SIGNALS
U14C
MPC5645S-416PKG
VDD12_1K10
VDD12_2M10
VDD12_3P10
VDD12_4T10
VDD12_5L11
VDD12_6N11
VDD12_7R11
VDD12_8U11
VDD12_9K12
VDD12_10T12
VDD12_11L13
VDD12_12U13
VDD12_13K14
VDD12_14T14
VDD12_15L15
VDD12_16U15
VDD12_17K16
VDD12_18M16
VDD12_19P16
VDD12_20T16
VDD12_21L17
VDD12_22N17
VDD12_23R17
VDD12_24U17
VDD33_DDR_1F4
VDD33_DDR_2R4
VDD33_DDR_3D6
VDD33_DDR_4D12
VDDAAC22
VDDEH_ADCAD23
VDDM_SMD_1W24
VDDM_SMD_2U25
VDDM_SMD_3AA25
VDDPLLAB4
VDDREGAA4
VSS_1Y1
VSS_2B2
VSS_3E2
VSS_4H2
VSS_5L2
VSS_6P2
VSS_7V2
VSS_8AE2
VSS_9C3
VSS_10F3
VSS_11J3
VSS_12M3
VSS_13R3
VSS_14AB3
VSS_15AD4
VSS_16B5
VSS_17C6
VSS_18AE7
VSS_19B8
VSS_20C9
VSS_21L10
VSS_22N10
VSS_23R10
VSS_24U10
VSS_25AD10
VSS_26B11
VSS_27K11
VSS_28M11
VSS_29P11
VSS_30T11
VSS_31C12
VSS_32L12
VSS_33M12
VSS_34N12
VSS_35P12
VSS_36R12
VSS_37U12
VSS_38K13
VSS_39M13
VSS_40N13
VSS_41P13
VSS_42R13
VSS_43T13
VSS_44AE13
VSS_45B14
VSS_46L14
VSS_47M14
VSS_48N14
VSS_49P14
VSS_50R14
VSS_51U14
VSS_52C15
VSS_53K15
VSS_54M15
VSS_55N15
VSS_56P15
VSS_57R15
VSS_58T15
VSS_59L16
VSS_60N16
VSS_61R16
VSS_62U16
VSS_63AD16
VSS_64C17
VSS_65K17
VSS_66M17
VSS_67P17
VSS_68T17
VSS_69B19
VSS_70AE19
VSS_71C21
VSS_72E24
VSS_73K24
VSS_74B25
VSS_75H25
VSSAAD22
VSSM_SMD_2AA24
VSSM_SMD_3W25
VSSEH_ADCAC23
VSSM_SMD_1U24
VSS_76P25
VDDE_DDR_1C2
VDDE_DDR_2E3
VDDE_DDR_3H3
VDDE_DDR_4L3
VDDE_DDR_5N3
VDDE_DDR_6T3
VDDE_DDR_7C5
VDDE_DDR_8C8
VDDE_DDR_9C11
VDDE_DDR_10C14
VDDE_1AD2
VDDE_2W3
VDDE_3AE4
VDDE_4AD7
VDDE_5AE10
VDDE_6AD13
VDDE_7AE16
VDDE_8B17
VDDE_9C19
VDDE_10AD19
VDDE_11B21
VDDE_12B24
VDDE_13H24
VDDE_14N24
VDDE_15E25
VDDE_16L25
R103 0
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Decoupling Caps
Place decoupling on MCU VDDM pins
Place decoupling on MCU VDDE_DDR pins - 10 in total, 0.1 and 470pF in a pair
Place decoupling on MCU VDDPLL pin
Place decoupling on MCU VDDR pin
Place decoupling on MCU VDDE and VDD33_DR pins - 20 in total, 0.1 and 470pF in a pair
Place decoupling close to MCU VDDE_A pins
Place close to emitter of Q1
VSSA
VDDA
VDD12 VDD12VDD12
GND
GND
GND
VDD12
GND GNDGND
GND
GND
GND
GND
MCU_3V3
MCU_3V3
V_AN
SMD_5V
V_REG
1.8V_SR
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Decoupling
5 12
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C
Friday, January 11, 2013
Decoupling
5 12
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Decoupling
5 12
___ ___X
C161
0.1UF
C170
470pF
C115
0.1UF
C190
470pF
C168
0.1UF
C122
470pF
C191
0.1UF
C145
470pF
C128
470pF
C154
470pF
C138
470pF
C179
470pF
C178
0.1UF
C96
0.1UF
C106
0.1UF
C130
0.1UF
C189
0.1UF
C165
470pF
C141
0.1UF
C124
0.1UF
C114
0.1UF
C123
0.1UF
C182
1uF
C186
470pF
C188
470pF
C160
470pF
C144
0.1UF
C100
0.1UF
C104
0.1UF
C110
470pF
C120
0.1UF
C171
0.1UF
C119
470pF
C166
0.1UF
C140
0.1UF
C136
0.1UF
C174
470pF
+
C89
10UF
C92
1uF
+
C67
10UF
C158
0.1UF
C159
470pF
C132
0.1UF
C169
10nF
C113
470pF
C196
1uF
C180
0.1UF
C94
10nF
C137
470pF
C117
0.1UF
C155
470pF
C125
0.1UF
C111
0.1UF
C84
10UFDNP
C150
470pF
C193
0.1UF
C134
470pF
+
C82
10UF
C118
0.1UF
C177
470pF
C152
0.1UF
C95
470pF
C164
0.1UF
C172
470pF
C3
10UF
C126
470pF
C187
0.1UF
C109
0.1UF
C135
0.1UF
C101
470pF
C192
470pF
C129
470pF
C98
0.1UF
+
C5
10UF
C102
0.1UF
C112
470pF
C86
10UFDNP
C105
470pF
C103
470pF
C97
470pF
C162
0.047UF
C173
0.1UF
C121
0.1UF
C107
470pF
C175
0.1UF
C176
0.1UF
C99
470pF
C163
470pF
C153
0.1UF
C127
0.1UF
C151
0.1UF
C93
0.1UF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Need clock and Reset ccts
Loop Controlled PierceOscillator Circuit
Loop Controlled PierceOscillator Circuit
RESET Button
V_RESET
V_PWR
(DE)
(B7)
(PCLK)
(HSYNC)
(VSYNC)
(R0)
(R1)
(R2)
(R3)
(R4)
(R5)
(R6)
(R7)
(G5)
(G3)
(G4)
(G2)
(G1)
(G0)
(B1)
(B0)
(G7)
(G6)
(B5)
(B4)
(B3)
(B2)
(B6)
(PDI HSYNC/VIU9)
(PDI VSYNC/VIU8)
V_CLK
(PDI0)
(PDI1)
(PDI2)
(PDI3)
(PDI4)
(PDI5)
(PDI6)
(PDI7)
To QuadSPI1
(IO3)
(CLK)
(CS)
(IO2) To QuadSPI1(VIU0)
(VIU3)
(VIU2)
(VIU1)
(VIU4)
(PDI_CLK)
TCK
TDI
TDO
TMS
(B0)
(B1)
(B2)
(B3)
(B4)
(B5)
(B6)
(B7)
(VSYNC)
(HSYNC)
(DE)
(PCLK)
(PDI DE)
(R0)
(R1)
(R2)
(R3)
(R4)
(R5)
(R6)
(R7)
(G0)
(G1)
(G2)
(G3)
(G4)
(G5)
(G6)
(G7)
(CANTX_0)
(CANRX_0)
(TXD_0)
(RXD_0)
(DO)
(FS)
(DO)
(SCK)
(SYS_MCLK)
(RXD_1)
(TXD_1)
DCU_YU
DCU_XL
DCU_YD
DCU_XR
DCUL_XR
DCUL_YD
DCUL_XL
DCUL_YU
(M0C0P)
(M0C0M)
(M0C1P)
(M0C1M)
(M1C0M)
(M1C1P)
(M1C1M)
(M1C0P)
(M2C1P)
(M2C1M)
(M2C0P)
(M2C0M)
(M3C1P)
(M3C1M)
(M3C0P)
(M3C0M)
(M4C1M)
(M4C0P)
(M4C0M)
(M5C1P)
(M5C1M)
(M5C0P)
(M5C0M)
(M4C1P)
(INTRQ_B)
(SDA_1)
(SCL_1)
(IO1)
(IO0)To QuadSPI1
(SDA_0)
(SCL_0)
(CLK)
(IO1)
(IO0)
(IO3)
(IO2)
(CS)
To QuadSPI0
CLK_XTAL32K_PC15
CLK_EXTAL32K_PC14
CLK_XTAL8
CLK_EXTAL8
RESET_B
PA0PA1PA2PA3PA4PA5PA6PA7PA8PA9PA10PA11PA12PA13PA14PA15
PA
[0..
15]
PB
[0..
13]
PB0PB1PB2PB3PB4PB5PB6PB7PB8PB9PB10PB11PB12PB13
PC
[0..
13]
PC0PC1PC2PC3PC4PC5PC6PC7PC8PC9PC10PC11PC12PC13
CLK_EXTAL32K_PC14CLK_XTAL32K_PC15
PD
[0..
15]
PD0PD1PD2PD3PD4PD5PD6PD7PD8PD9PD10PD11PD12PD13PD14PD15
PE3PE4PE5PE6PE7
PE
[0..
7]
PE0PE1PE2
PF0PF1PF2PF3PF4PF5PF6PF7PF8PF9PF10PF11PF12PF13PF14PF15
PF
[0..
15]
CLK_XTAL8CLK_EXTAL8
RESET_B
MDO11MDO10MDO9MDO8MDO7MDO6MDO5MDO4MDO3MDO2MDO1MDO0
MD
O[0
..11]
PG
[0..1
2]
PG0PG1
PG3PG4
PG6
PG2
PG7
PG9
PG11PG12
PG10
PG8
PG5
PH
[0..4
]
PH0PH1PH2PH3
PJ[0
..15]
PJ0PJ1PJ2PJ3PJ4PJ5PJ6PJ7PJ8PJ9PJ10PJ11PJ12PJ13PJ14PJ15
PK
[0..1
1]
PK0PK1PK2PK3PK4PK5PK6PK7PK8
PK10PK9
PL12PL13
PL[0
..13]
PL0PL1PL2PL3PL4PL5PL6PL7PL8
PL10PL9
PL11
PM0PM1PM2PM3PM4PM12PM13
PN0PN1PN2PN3PN4PN5PN6PN7PN8PN9PN10PN11PN12PN13PN14PN15
PN
[0..1
5]
PP0PP1PP2PP3PP4PP5PP6PP7
PP
[0..7
]
PH4
PK11
JM_RST_B
GND
3.3V_SR
GND
GND
3.3V_SR3.3V_SR
GND GND
3.3V_SR
PA[0..15]{7}
PB[0..13]{9,10,12}
PC[0..13]{7,9,12}
PD[0..15]{9}
PE[0..7]{12}
PF[0..15]{8,9,11,12}
RESET_B{12}
MDO[0..11]{12}EVTI_B{12}EVTO_B{12}MCKO{12}
MSEO_B{12}MSEO2_B{12}
PG[0..12] {7,11}
PH[0..4] {12}
PJ[0..15] {7,8,11,12}
PK[0..11] {7,8,11,12}
PL[0..13] {9,11,12}
PM0 {11}PM1 {11}PM2 {7}PM3 {10}PM4 {10}PM12 {7}PM13 {7} PN[0..15] {7}
PP[0..7] {7}
JM_RST_B
{12}
Drawing Title:
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ICAP Classification: FCP: FIUO: PUBI:
SCH-27293 PDF: SPF-27293 B
MPC5645S-DEMO-V2
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Friday, January 11, 2013
MCU Peripherals
6 12
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MPC5645S-DEMO-V2
C
Friday, January 11, 2013
MCU Peripherals
6 12
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MPC5645S-DEMO-V2
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Friday, January 11, 2013
MCU Peripherals
6 12
___ ___X
C29 12PF
C22
0.1UF
U12
STM6315RDW13F
VCC4
RST2
VSS1
MR3
SW6
PTS645
MCU_RST
12
34
R26
10.0K
R23
470
C24 12PF
C25 12PF
C30 12PF
R89
10.0K
DNP
MPC5645S 416BGASIGNALS
U14B
MPC5645S-416PKG
PA0/DCU_R0/SDA_B/EMIOS0_18/RSDS0_PK26
PA1/DCU_R1/SCL_B/EMIOS0_17/RSDS0_NK25
PA10/DCU_G2/RSDS5_PH23
PA11/DCU_G3/RSDS5_NG23
PA12/DCU_G4/RSDS6_PF26
PA13/DCU_G5/RSDS6_NF25
PA14/DCU_G6/RSDS7_PF24
PA15/DCU_G7/RSDS7_NF23
PA2/DCU_R2/RSDS1_PK23
PA3/DCU_R3/RSRS1_NJ23
PA4/DCU_R4/RSDS2_PJ26
PA5/DCU_R5/RSDS2_NJ25
PA6/DCU_R6/RSRS3_PH26
PA7/DCU_R7/RSDS3_NG26
PA8/DCU_G0/SCL_C/EMIOS0_20/RSDS4_PG25
PA9/DCU_G1/SDA_C/EMIOS0_19/RSDS4_NG24
PB0/CNTX_A/TXD_AW4
PB1/CNRX_A/RXD_AV1
PB10/CNRX_B/I2S_DOW2
PB11/CNTX_B/SGM_MCLKY4
PB12/RXD_B/EMIOS1_10/PCS_A2AF7
PB13/TXD_B/EMIOS1_11Q/PCS_A1AC8
PB2/TXD_AD21
PB3/RXD_AA22
PB4/SCK_B/MA0AF15
PB5/SOUT_B/MA1/FABMAC16
PB6/SIN_B/MA2/ABS[0]AF16
PB7/SIN_A/EMIOS1_20/I2S_SCKAC14
PB8/SOUT_A/EMIOS1_19Q/I2S_DOAF13
PB9/SCK_A/EMIOS1_18/I2S_FSAC13
PC0/AN0AC21
PC1/AN1AC25
PC10/AN10(MUX)/I2S_DOAE23
PC11/AN11/MA0/PCS_B2AE24
PC12/AN12/MA1/PCS_B1AF26
PC13/AN13/MA2/PCS_B0AF25
PC14/AN14/EXTAL32AF24
PC15/AN15/XTAL32AF23
PC2/AN2AC26
PC3/AN3AC24
PC4/AN4AD24
PC5/AN5AD26
PC6/AN6AD21
PC7/AN7AD25
PC8/AN8AE26
PC9/AN9AE25
PD0/M0C0M/SSD0_0/EMIOS1_8AB26
PD1/M0C0P/SSD0_1/EMIOS1_16AB25
PD10/M2C1M/SSD2_2/EMIOS0_10W26
PD11/M2C1P/SSD2_3/EMIOS0_11W23
PD2/M0C1M/SSD0_2/EMIOS1_23AB24
PD3/M0C1P/SSD0_3/EMIOS0_9AB23
PD4/M1C0M/SSD1_0/EMIOS0_8AA26
PD5/M1C0P/SSD1_1/EMIOS0_16AA23
PD6/M1C1M/SSD1_2/EMIOS0_23Y26
PD7/M1C1P/SSD1_3Y25
PD8/M2C0M/SSD2_0Y24
PD9/M2C0P/SSD2_1/EMIOS0_9Y23
PD12/M3C0M/SSD3_0/EMIOS0_12V26
PD13/M3C0P/SSD3_1/EMIOS0_13V25
PD14/M3C1M/SSD3_2/EMIOS0_14V24
PD15/M3C1P/SSD3_3/EMIOS0_15V23
PE0/M4C0M/SSD4_0U26
PE1/M4C0P/SSD4_1U23
PE2/M4C1M/SSD4_2T26
PE3/M4C1P/SSD4_3T25
PE4/M5C0M/SSD5_0T24
PE5/M5C0P/SSD5_1T23
PE6/M5C1M/SSD5_2R24
PE7/M5C1P/SSD5_3R23
PF0/EMIOS1_19Q/EVTO/DCULITE_B2C20
PF1/EMIOS1_20/MSEO/DCULITE_B3B20
PF3/EMIOS1_21Q/MSEO2/DCULITE_B4A20
PF4/EMIOS1_14/SDA_B/DCULITE_B5D19
PF5/QSPI_IO1_B/EMIOS1_15/PDI16_(VIU8)A19
PF6/QSPI_IO0_B/EMIOS1_16/PDI17_(VIU9)D18
PF7/EMIOS1_15/SCL_B/DCULITE_B6C18
PF8/SDA_A/PCS_B2/RXD_BA18
PF9/SCL_A/PCS_B1/TXD_BD17
PF12/QSPI_IO3_A/MDO1C16 PF11/QSPI_IO2_A/MDO0D16
PF15/QSPI_CLK_A/CLKOUT/MCKOB18
PF13/QSPI_IO0_A/MDO2B16
PF10/QSPI_PCS_A/EVTIA17
PF2/NMIAC7
PF14/QSPI_IO1_A/MDO3A16
PG0/DCU_B0/SCL_D/EMIOS0_21/RSDS8_PE26
PG1/DCU_B1/SDA_D/EMIOS0_22/RSDS8_ND26
PG10/DCU_DE/TCON3T1
PG11/DCU_PCLK/RSDSLCK_PE23
PG12/PCS_B0/PDI_DE/DCULITE_B7A15
PG2/DCU_B2/RSDS9_PD25
PG3/DCU_B3/RSDS9_NC25
PG4/DCU_B4/RSDS10_PC26
PG5/DCU_B5/RSDS10_NB26
PG6/DCU_B6/RSDS11_PA26
PG7/DCU_B7/RSDS11_NA25
PG8/DCU_VSYNC/TCON2T4
PG9/DCU_HSYNC/TCON1T2
PJ0/DCULITE_B6/I2S_DOL26
PJ1/VIU1/PDI_HSYNC/EMIOS1_9/EMIOS0_8U4
PJ12/DCU_TAG/TCON0/DCULITE_G6A23
PJ13/QSPI_PCS_B/EMIOS1_8/PDI13_(VIU5)D22
PJ14/QSPI_CLK_B/EMIOS1_17/PDI_PCLKC22
PJ15/QSPI_IO3_B/EMIOS1_9/PDI14_(VIU6)B22
PJ2/VIU0/PDI_VSYNC/EMIOS1_14/EMIOS0_9U3
PJ3/VIU_PCLK/EMIOS0_22/PDI_DEAD15
PJ4/VIU2_PDI0/EMIOS0_21/EMIOS0_23AD14
PJ5/VIU3_PDI1/EMIOS0_20/EMIOS0_16AE14
PJ6/VIU4_PDI2/EMIOS0_19/EMIOS0_15AF14
PJ7/VIU5_PDI3/EMIOS0_18/EMIOS0_14AC15
PJ8/VIU6_PDI4/EMIOS0_17/EMIOS0_13U2
PJ9/VIU7_PDI5/EMIOS1_22/EMIOS0_12U1
PJ10/VIU8_PDI6/EMIOS1_17/EMIOS0_11V4
PJ11/VIU9_PDI7/EMIOS1_15/EMIOS0_10V3
PK0/EMIOS1_18/DCULITE_G7A21
PK1/QSPI_IO2_B/EMIOS1_14/PDI15_(VIU7)D20
PK10/SDA_B/EMIOS1_12/DCULITE_TAGAF8
PK11/SCL_B/EMIOS1_13Q/DCU_TAG/TCON0AC9
PK2/PDI8_(VIU0)/EMIOS1_10/DCULITE_TAGAE3
PK3/PDI9_(VIU1)/EMIOS1_11Q/DCULITE_DEAF3
PK4/PDI10_(VIU2)/EMIOS1_12/DCULITE_HSYNCAC4
PK5/PDI11_(VIU3)/EMIOS1_13Q/DCULITE_VSYNCAF4
PK6/PDI12_(VIU4)/EMIOS1_9/DCULITE_PCLKAC5
PK7/RXD_C/DCULITE_R2/TCON8AD5
PK8/TXD_C/DCULITE_R3/TCON9AE5
PK9/I2S_DO/DCULITE_R4/TCON10AF5
PL0/AN19/CNRX_B/SDA_BAE22
PL1/AN18/CNTX_B/SCL_BAE21
PL10/EMIOS1_10/DCULITE_G2C24
PL11/EMIOS1_11Q/DCULITE_G3A24
PL12/EMIOS1_12/DCULITE_G4C23
PL13/EMIOS1_13Q/DCULITE_G5B23
PL2/AN17/CNRX_A/EMIOS1_22AF22
PL3/AN16/CNTX_A/EMIOS1_23AF21
PL4/PCS_C2/PDI13_(VIU5)/TCON6AB2
PL5/PCS_C1/PDI14_(VIU6)/TCON7AC2
PL6/PCS_C0/PDI15_(VIU7)/EMIOS1_18AD1
PL7/SIN_C/PDI16_(VIU8)/EMIOS1_19QAE1
PL8/SOUT_C/PDI17_(VIU9)/EMIOS1_20AF1
PL9/SCK_C/PDI_PCLK/EMIOS1_21QAF2
PM0/I2S_SCK/DCULITE_R5/TCON11AE9
PM1/I2S_FS/DCULITE_R6AF9
PM12/DCULITE_B7/I2S_SCKL24
PM13/DCULITE_PCLK/SGM_MCLKL23
PM2/EMIOS1_17/DCULITE_R7/DCULITE_DE/RSDSLCK_ND23
PM3/CNRX_C/RXD_D/TCON4Y3
PM4/CNTX_C/TXD_D/TCON5Y2
PN0/DCULITE_HSYNC/TCON4AC3
PN1/DCULITE_VSYNC/TCON5AD3
PN10/DCULITE_G0/RXD_D/PDI10_(VIU2)AE12
PN11/DCULITE_G1/TXD_D/PDI11_(VIU3)AF12
PN12/DCULITE_G2/EMIOS0_17R26
PN13/DCULITE_G3/EMIOS0_18R25
PN14/DCULITE_G4/EMIOS0_19P26
PN15/DCULITE_G5/EMIOS0_20P24
PN2/DCULITE_R0/RXD_C/PDI8_(VIU0)AC10
PN3/DCULITE_R1/TXD_C/PDI9_(VIU1)AF10
PN4/DCULITE_R2/TCON6AC11
PN5/DCULITE_R3/TCON7AD11
PN6/DCULITE_R4/TCON8AE11
PN7/DCULITE_R5/TCON9AF11
PN8/DCULITE_R6/TCON10AC12
PN9/DCULITE_R7/TCON11AD12
PP0/DCULITE_G6/EMIOS0_21P23
PP1/DCULITE_G7/EMIOS0_22N26
PP2/DCULITE_B0/CNRX_C/PDI12_(VIU4)N25
PP3/DCULITE_B1/CNTX_C/PDI_DEN23
PP4/DCULITE_B2/EMIOS0_11M26
PP5/DCULITE_B3/EMIOS0_13M25
PP6/DCULITE_B4/EMIOS0_15M24
PP7/DCULITE_B5/I2S_FSM23
PH0/TCKAC6
PH1/TDIAD6
PH2/TDOAE6
PH3/TMSAF6
PH4/PCS_A0/EMIOS1_21Q/DCULITE_G6AE15
EVTIAD8
EVTOAE8
MCKOAC17
MDO11AF19
MDO10AC19
MDO9AF18
MDO8AE18
MDO7AD18
MDO6AC18
MDO5AF17
MDO4AE17
MDO3AF20
MDO2AE20
MDO1AD20
MDO0AC20
MSEOAD9
MSEO2AD17
EXTALAB1
XTALAA1
RESETW1
R24
1.0M
DNP
Y2
8MHz
12
D9LED RED
AC
R27
1.0M
DNP
Y3
32.768KHZ12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
(R0)
(R1)
(R2)
(R3)
(R4)
(R5)
(R6)
(R7)
(G0)
(G1)
(G2)
(G3)
(G4)
(G5)
(G6)
(G7)
(B0)
(B1)
(B2)
(B3)
(B4)
(B5)
(B6)
(B7)
(VSYNC)
(HSYNC)
(DE)
(PCLK)
(R0)
(R1)
(R2)
(R3)
(R4)
(R5)
(R6)
(R7)
(G0)
(G1)
(G2)
(G3)
(G4)
(G5)
(G6)
(G7)
(B0)
(B1)
(B2)
(B3)
(B4)
(B5)
(B6)
(B7)
(VSYNC)
(HSYNC)
(DE)
(PCLK)
Sharp LQ043
Sharp LQ043
(VSYNC)
(HSYNC)
(DE)
(PCLK)
(R0)
(R1)
(R2)
(R3)
(R4)
(R5)
(R6)
(R7)
(G0)
(G1)
(G2)
(G3)
(G4)
(G5)
(G6)
(G7)
(B0)
(B1)
(B2)
(B3)
(B4)
(B5)
(B6)
(B7)
(PCLK)
(DE)
(HSYNC)
(VSYNC)
(R0)
(R1)
(R2)
(R3)
(R4)
(R5)
(R6)
(R7)
(G0)
(G1)
(G2)
(G3)
(G4)
(G5)
(G6)
(G7)
(B0)
(B1)
(B2)
(B3)
(B4)
(B5)
(B6)
(B7)
DVI ConfigDESKEW
Decoupling for U25
Decoupling for U24
(DE)
(DE)
(HSYNC)
(VSYNC)
(PCLK)
(PCLK)
(HSYNC)
DCU_YU
DCU_XL
DCU_YD
DCU_XR
DCUL_XR
DCUL_YD
DCUL_XL
DCUL_YU
PA0PA1PA2PA3PA4PA5PA6PA7PA8PA9PA10PA11PA12PA13PA14PA15
PG0PG1PG2PG3PG4PG5PG6PG7
PG8PG9PG10PG11
PN0PN1PN2PN3PN4PN5PN6PN7
PP4PP5PP6PP7
PP0PP1PP2PP3
PN12PN13PN14PN15
PN8PN9PN10PN11
PM12
PM13
PJ0
PM2
PC0PC1PC2PC3PC4PC5PC6PC7
DCU_YDDCU_XR
DCU_XLDCU_YU
DCUL_YDDCUL_XR
DCUL_XLDCUL_YU
PG0PG1PG2PG3PG4PG5PG6PG7
PG8PG9PG10PG11
PP2PP3PP4PP5PP6PP7PJ0PM12
PN1PN0PM2PM13
DCU_XRDCU_YD
DCU_XLDCU_YU
DCUL_XR DCUL_XLDCUL_YUDCUL_YD
PK10PK11
DCU_YDDCU_XR
VDD_30V_J42
PG10PG11
PG9PG8
DCUL_YDDCUL_XR
VDD_30V_J41
PM2PM13
PN0PN1
PN2PN3PN4PN5PN6PN7
PN10PN11PN12PN13PN14PN15
PP2PP3PP4PP5PP6PP7
PN8PN9
PP0PP1
PJ0PM12
DCUL_YUDCUL_XL
DCU_YUDCU_XL
PK10PK11
PK10PK11
VDD_30V_IPKVDD_30V_DRVC
VDD_30V_SWCVDD_30V_FB
VDD_30V_TCAP
PG0PG1PG2PG3PG4PG5PG6PG7PA8PA9PA10PA11PA12PA13PA14PA15PA0PA1PA2PA3PA4PA5PA6PA7
PG11
PG10PG9PG8
DCU_TX0PDCU_TX0M
DCU_TX1PDCU_TX1M
DCU_TX2PDCU_TX2M
DCU_TXCMDCU_TXCP
DSK_ENDSK_CTL3DSK_CTL2DSK_CTL1
DSK_CTL3DSK_CTL2DSK_CTL1
DSK_CTL3DSK_CTL2DSK_CTL1
DCUL_TX0PDCUL_TX0M
DCUL_TX1PDCUL_TX1M
DCUL_TX2PDCUL_TX2M
DCUL_TXCMDCUL_TXCP
DSK_EN
DSK_EN
PM2PN0PN1
PM13
PP4PP5PP6PP7
PP2PP3
PJ0
DCU_MSEN
DCUL_MSEN
PG0PG1PG2PG3PG4PG5PG6PG7
PA10
PA1
PA9
PA7
PA0
PA13
PA6
PA14
PA12
PA5
PA3
PA15
PA11
PA4
PA2
PA8
DCU_PD
DCUL_PD
DCU_PDDCUL_PD
DCU_MSEN DCUL_MSEN
PN10
PP1PP0PN15
PN13PN14
PN12PN11
PN5PN4PN3
PN6
PN2
PN8PN9
PN7
PM12
GNDGND
GNDGND
3.3V_SR3.3V_SR
5.0V_SR5.0V_SR
5.0V_SR5.0V_SR
3.3V_SR3.3V_SR
P12V P12V
P12VP12V
GND
GNDGND
GND
GND
GND
GND
GND
GND
GNDGND
GND
3.3V_SR3.3V_SR
5.0V_SR5.0V_SR
GND
GND
VDD_30V
5.0V_SR5.0V_SR
GND
GND
VDD_30V
P12V
GND
GND
GND
VDD_30V
GND
GND
GNDGNDGNDGND
GNDGNDGND
3.3V_SR3.3V_SR3.3V_SR
3.3V_SR
3.3V_SR3.3V_SR
3.3V_SR
3.3V_SR
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDGNDGNDGND
GNDGNDGND
GNDGND
3.3V_SR3.3V_SR3.3V_SR
3.3V_SR
3.3V_SR3.3V_SR
3.3V_SR
3.3V_SR
3.3V_SR
3.3V_SR
3.3V_SR3.3V_SR
GND
GNDGND
3.3V_SR3.3V_SR
3.3V_SR 3.3V_SR
GNDGND
3.3V_SR3.3V_SR3.3V_SR3.3V_SR
GND
3.3V_SR
GND
3.3V_SR
GND
PA[0..15]{6}
PG[0..12]{6,11}
PN[0..15]{6}
PP[0..7]{6}
PM12{6}
PM13{6}
PJ[0..15]{6,8,11,12}
PM2{6}
PC[0..13]{6,9,12}
PK[0..11]{6,8,11,12}
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-27293 PDF: SPF-27293 B
MPC5645S-DEMO-V2
C
Friday, January 11, 2013
Displays
7 12
___ ___X
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-27293 PDF: SPF-27293 B
MPC5645S-DEMO-V2
C
Friday, January 11, 2013
Displays
7 12
___ ___X
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-27293 PDF: SPF-27293 B
MPC5645S-DEMO-V2
C
Friday, January 11, 2013
Displays
7 12
___ ___X
+
C201
100uF
R41560
R113 10.0K
TP26
R32 560
TP31
R39 0
J43
CONN FPC/FFC 40
123456789
10111213141516171819202122232425262728293031323334353637383940
DV
I-I
P10
DVI-I_Dual_29
analog BLUEC3
analog GRNC2
analog REDC1
analog H-SYNCC4
TX2-1
SHELL1S1
SHELL2S2
analog RTN2C5_2
TX2+2 TX2/4 Shld3 TX4-4 TX4+5 DDC CLK6 DDC DATA7 analog V-SYNC8 TX1-9 TX1+
10 TX1/3 Shld11 TX3-12 TX3+13 +5V14 GND15 HP detect16 TX0-17 TX0+18 TX0/5 Shld19 TX5-20 TX5+21 TXC Shld22 TXC+23 TXC-24
analog RTN1C5_1
C212
0.1UF
R110 10.0K
C210
0.1UF
C206
0.1UF
TP27
D13
1N5819
AC
TP28
U24
TFP410PAP
TGND232
TGND126
TGND020
TXC+22
TX2-30TX2+31
TX1+28
TX1-27
NC49
RESERVED34
HSYNC4 DE2
IDCK-56
IDCK+57
DATA1841
DATA1940
DATA2039
DATA2138
DATA1643
DATA1742
DATA1346
DATA1544
DATA063
DATA162
DATA261
DATA360
DATA459
DATA558
DATA655
DATA754
DATA853
DATA952
DATA1051
DATA1150
DATA1247
DATA1445
DATA2237
DATA2336
TX0+25
TX0-24
PGND17DGND264DGND148
TXC-21
BSEL/SCL15
DVDD112DVDD01
VSYNC5
CTL3/A3/DK36
CTL2/A2/DK27
CTL1/A1/DK18
ISEL/RST13
VREF3
PD10
DSEL/SDA14
EDGE/HTPLG9
DKEN35
DGND016
TVDD129TVDD023
PVDD18
DVDD233
MSEN/PO111TFADJ19
EX_PAD65
C207
0.1UF
R30180
U25
TFP410PAP
TGND232
TGND126
TGND020
TXC+22
TX2-30TX2+31
TX1+28
TX1-27
NC49
RESERVED34
HSYNC4 DE2
IDCK-56
IDCK+57
DATA1841
DATA1940
DATA2039
DATA2138
DATA1643
DATA1742
DATA1346
DATA1544
DATA063
DATA162
DATA261
DATA360
DATA459
DATA558
DATA655
DATA754
DATA853
DATA952
DATA1051
DATA1150
DATA1247
DATA1445
DATA2237
DATA2336
TX0+25
TX0-24
PGND17DGND264DGND148
TXC-21
BSEL/SCL15
DVDD112DVDD01
VSYNC5
CTL3/A3/DK36
CTL2/A2/DK27
CTL1/A1/DK18
ISEL/RST13
VREF3
PD10
DSEL/SDA14
EDGE/HTPLG9
DKEN35
DGND016
TVDD129TVDD023
PVDD18
DVDD233
MSEN/PO111TFADJ19
EX_PAD65
J44
CONN FPC/FFC 40
123456789
10111213141516171819202122232425262728293031323334353637383940
SH10 0
R106
51.1K
R109 10.0K
J45
CON 1X4
11
22
33
44
GND1M1
GND2M2
DV
I-I
P11
DVI-I_Dual_29
analog BLUEC3
analog GRNC2
analog REDC1
analog H-SYNCC4
TX2-1
SHELL1S1
SHELL2S2
analog RTN2C5_2
TX2+2 TX2/4 Shld3 TX4-4 TX4+5 DDC CLK6 DDC DATA7 analog V-SYNC8 TX1-9 TX1+
10 TX1/3 Shld11 TX3-12 TX3+13 +5V14 GND15 HP detect16 TX0-17 TX0+18 TX0/5 Shld19 TX5-20 TX5+21 TXC Shld22 TXC+23 TXC-24
analog RTN1C5_1
TP21
1
C214
0.1UF
J14
HDR 2X3
DVI ENABLE
1 23 4
65
SH7 0
P9
HDR_2X19_F
DCU
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
3131
3232
3333
3434
3535
3636
3737
3838
G341
G442
G543
G139
G240
+
C215
100uF
TP29
J42
CON FPC/FFC 4
1234
J46
CON 1X4
11
22
33
44
GND1M1
GND2M2
C216
0.1uF
R53 10.0K
SH8 0
R35 0
C213
0.1UF
SH11
0
P8
HDR_2X19_F
DCULITE
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
3131
3232
3333
3434
3535
3636
3737
3838
G341
G442
G543
G139
G240
SH5 0
J41
CON FPC/FFC 4
1234
R34 0
C211
0.1UF
C204
0.1UF
R115 10.0K
R36 560
R114 10.0K
C208
0.1UF
R43560
R111 10.0K
C209
0.1UF
C205
0.1UF
U17
MC33063ADG
COMP5
TCAP3
VCC6
GN
D4
DRVC8
IPK7
SWC1
SWE2
TP30
SH12
0
SH9 0
SW5
SW_DIP-4/SM
1234 5
876
TP24
C33
1500PF
L10
270UH
12
C37
0.1UF
R38 0
R31
1.5 OHM
R112 10.0KR33 560
R1072.21K
C203
0.1UF
R37 560
SH6 0
TP25
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
To QuadSPI0
To QuadSPI1
(CS)
(IO2)
(IO3)
(IO0)
(IO1)
(CLK)
(CS)
(IO3)
(IO0)
(IO1)
(CLK)
Place all resistors close to MCU
Place all resistors close to MCU
Ensure length ofeach address andcontrol line is thesame after thetrace split
Place capacitors close to corners of DRAM
Place all resistors close to MCU
Pull downrecommended for1st silicon
(IO2)
A0A1A2A3A4A5A6A7A8A9A10A11A12
A0A1A2A3A4A5A6A7A8A9A10A11A12
A[0..12]
BA0BA1
D0D1D2D3D4D5D6D7D8D9D10D11D12
D16D17D18D19D20D21D22D23D24D25D26D27D28
D13D14D15
D29D30D31
D[0..31]
DR_CLK_PDR_CLK_N
DR_CSDR_RASDR_CASDR_WEBDR_CKEDR_DM1DR_DM0
DR_DM3DR_DM2DR_DQ3DR_DQ2
PF5PF6
PF10PF11PF12PF13PF14PF15
PJ14PJ15
PJ13
PF13PF14PF11PF12
PF10PF15
DR_DQ1
D0 R_D0D1 R_D1D2 R_D2D3 R_D3D4 R_D4D5 R_D5D6 R_D6D7 R_D7D8 R_D8D9 R_D9D10 R_D10D11 R_D11D12 R_D12D13 R_D13D14 R_D14D15 R_D15D16 R_D16D17 R_D17D18 R_D18D19 R_D19D20 R_D20D21 R_D21D22 R_D22D23 R_D23D24 R_D24D25 R_D25D26 R_D26D27 R_D27D28 R_D28D29 R_D29D30 R_D30D31 R_D31
DR_CASDR_WEBDR_CKE
BA0BA1
DR_CLK_PDR_CLK_N
DR_CSDR_RAS
DR_DQ0
A0A1A2A3A4A5A6A7A8A9A10A11A12
R_A4
R_A9
R_A6
R_A1
R_A12
R_A8
R_A3
R_A5
R_A0
R_A10R_A11
R_A7
R_A2
BA0BA1
DR_DQ1DR_DQ2
DR_DM3
DR_DQ0
DR_DM2
DR_DM0DR_DM1
DR_DQ3
DR_RASDR_WEB
DR_CS
DR_CAS
DR_CKE
DR_CLK_P
DR_CLK_N
PF6PF5PK1PJ15
PJ13PJ14
DM_VTT_SD_B
BCP68_BASEVRC_CTRL
VPP
PJ1PJ2
PJ4PJ3
PJ6
PJ8PJ7
PJ5
PJ10
PJ12PJ11
PJ9
PJ0
PK1
GND
1.8V_SR
GND
1.8V_SR
GND
1.8V_SR
GND
1.8V_SR
GND
1.8V_SR
GND
1.8V_SR
GND
GND
3.3V_SR
GND
DM_VTT_DDR2
DM_VREF
GND
3.3V_SR
GND
1.8V_SR
3.3V_SR
DM_VREF
GNDGNDGND GND GND
DM_VTT_DDR2
VDD12
V_REG
GND
GND
GND GND
GNDGND
DM_VTT_DDR2
GND
PF[0..15]{6,9,11,12}
PJ[0..15]{6,7,11,12}
PK[0..11]{6,7,11,12}
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-27293 PDF: SPF-27293 B
MPC5645S-DEMO-V2
C
Friday, January 11, 2013
Memory
8 12
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-27293 PDF: SPF-27293 B
MPC5645S-DEMO-V2
C
Friday, January 11, 2013
Memory
8 12
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-27293 PDF: SPF-27293 B
MPC5645S-DEMO-V2
C
Friday, January 11, 2013
Memory
8 12
___ ___X
C195
0.047UF
R16 20
RN3E 225 12
RN1E 225 12
C73
0.1UF
R69 20
C72
0.1UF
R73 20
RN3C 223 14
MPC5645S 416BGADDRSIGNALS
U14A
MPC5645S-416PKG
DDR_DQ[26]A1
DDR_ADDRESS[0]A10
DDR_ADDRESS[1]B10
DDR_ADDRESS[10]C13
DDR_ADDRESS[11]D13
DDR_ADDRESS[12]A14
DDR_ADDRESS[13]D14
DDR_ADDRESS[14]D15
DDR_ADDRESS[15]B15
DDR_ADDRESS[2]C10
DDR_ADDRESS[3]D10
DDR_ADDRESS[4]A11
DDR_ADDRESS[5]D11
DDR_ADDRESS[6]A12
DDR_ADDRESS[7]B12
DDR_ADDRESS[8]A13
DDR_ADDRESS[9]B13
DDR_BA[0]A7
DDR_BA[1]A8
DDR_BA[2]A9
DDR_CASB6
DDR_CKED8
DDR_CSD9
DDR_DM[0]P3
DDR_DM[1]K3
DDR_DM[2]G3
DDR_DM[3]B4
DDR_DQ[0]R1
DDR_DQ[1]P1
DDR_DQ[10]K4
DDR_DQ[11]J1
DDR_DQ[12]H4
DDR_DQ[13]H1
DDR_DQ[14]G4
DDR_DQ[15]G1
DDR_DQ[16]F1
DDR_DQ[17]E1
DDR_DQ[18]E4
DDR_DQ[19]D1
DDR_DQ[2]P4
DDR_DQ[20]D2
DDR_DQ[21]D3
DDR_DQ[22]D4
DDR_DQ[23]C1
DDR_DQ[24]C4
DDR_DQ[25]B1
DDR_DQ[27]A2
DDR_DQ[28]A3
DDR_DQ[29]A4
DDR_DQ[3]N1
DDR_DQ[30]A5
DDR_DQ[31]A6
DDR_DQ[4]N4
DDR_DQ[5]M1
DDR_DQ[6]M4
DDR_DQ[7]L4
DDR_DQ[8]L1
DDR_DQ[9]K1
DDR_DQS[0]N2
DDR_DQS[1]K2
DDR_DQS[2]G2
DDR_DQS[3]B3
DDR_DRAM_CLKC7
DDR_DRAM_CLKD7
DDR_ODTD5
DDR_RASB7
DDR_WEB9
MVREFJ4
MVTT0R2
MVTT1M2
MVTT2J2
MVTT3F2
VRC_CTRLAA3
VREF_RSDS1J24
VREF_RSDS2D24
VREG_BYPASSAA2
VSUP_TESTAC1
C78
0.1UF
+
C183
220uF
C83
3300PF
C220
0.1UF
R74 20
RN3A 221 16
C68
0.1UF
C76
0.1UF
RN2H 228 9
C218
0.1UF
R13 20
RN1D 224 13
R19 20
RN4G 227 10
RN1H 228 9
R62
10.0K
RN4E 225 12
R128 22
R125 22
R122 22
R119 22
C70
0.1UF
C198
0.01uF
R129 22
R126 22
R123 22
R120 22
S25FL064P
U21
HOLD/IO31
CS7
SO/IO18
W/ACC/IO29
SI/IO015
SCK16
DNC33
DNC44
DNC55
DNC66
DNC1111
DNC1212
DNC1313
DNC1414
VC
C2
GN
D10
RN2F 226 11
R130 22
R127 22
R124 22
R121 22
R118 22
RN2D 224 13
RN4C 223 14
R80 0.51%
C62
0.1UF
RN2B 222 15
RN4A 221 16
C75
0.1UF
C91
0.1UF
RN1C 223 14
R18 20
U23
LP2997MR
Vref4
Vtt8
GN
D1
1
Vddq5
PVin7 Vsense
3
SD2
AVin6
GN
D2
9
RN3H 228 9
R12 20R11 20
RN3F 226 11
R105
10.0K
C79
0.1UF
RN1B 222 15
U7
MT46H16M16LFBF-6
CKG2
UDMF2
DQ0A8
DQ1B7
DQ2B8
DQ3C7
CSH7
A0J8
A1J9
A2K7
A3K8
A4K2
A5K3
A6J1
A7J2
A8J3
A9H1
A10J7
CKEG1 WEG7
RASG9
CASG8
VDD_3K9
VDD_1A9
VDDQ_2B1
VDDQ_3C9
VDDQ_4D1
VDDQ_5E9
TESTD9
VSSQ_4E1VSSQ_3C1VSSQ_2B9
DQ4C8
DQ5D7
DQ6D8
DQ7E7
A11H2
A12H3
BA0H8
BA1H9
VDD_2F9
VSS_1A1
VSS_2F1
VSS_3K1
DQ8E3
DQ9D2
DQ10D3
DQ11C2
DQ12C3
DQ13B2
DQ14B3
DQ15A2
LDMF8
NC_1F3
CKG3
VDDQ_1A7
VSSQ_1A3
UDQSE2
LDQSE8
NC_2F7
RN3D 224 13
R75 20
C139
0.1UF
RN3B 222 15
C63
0.1UF
R17 20
RN1G 227 10
C219
0.1UF
RN4H 228 9
RN4F 226 11
RN1A 221 16
C194
0.047UF
C69
0.1UF
RN2G 227 10
C217
0.1UF
C74
0.1UF
R70 20
RN4D 224 13
U8
MT46H16M16LFBF-6
CKG2
UDMF2
DQ0A8
DQ1B7
DQ2B8
DQ3C7
CSH7
A0J8
A1J9
A2K7
A3K8
A4K2
A5K3
A6J1
A7J2
A8J3
A9H1
A10J7
CKEG1 WEG7
RASG9
CASG8
VDD_3K9
VDD_1A9
VDDQ_2B1
VDDQ_3C9
VDDQ_4D1
VDDQ_5E9
TESTD9
VSSQ_4E1VSSQ_3C1VSSQ_2B9
DQ4C8
DQ5D7
DQ6D8
DQ7E7
A11H2
A12H3
BA0H8
BA1H9
VDD_2F9
VSS_1A1
VSS_2F1
VSS_3K1
DQ8E3
DQ9D2
DQ10D3
DQ11C2
DQ12C3
DQ13B2
DQ14B3
DQ15A2
LDMF8
NC_1F3
CKG3
VDDQ_1A7
VSSQ_1A3
UDQSE2
LDQSE8
NC_2F7
C66
0.1UF
C80
0.1UF
R81
0
RN2E 225 12
RN2C 223 14
RN4B 222 15
RN1F 226 11
R82
0
R20
100
EB
CQ1BCP68
1
32 4
S25FL064P
U18
HOLD/IO31
CS7
SO/IO18
W/ACC/IO29
SI/IO015
SCK16
DNC33
DNC44
DNC55
DNC66
DNC1111
DNC1212
DNC1313
DNC1414
VC
C2
GN
D10
RN2A 221 16
C77
0.1UF
C81
0.1UF
RN3G 227 10
R14 20
R72 20
C197
0.1UF
+C185
47UF
R71 20
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
(M0C0M)
(M0C0P)
(M0C1M)
(M0C1P)
(M1C0M)
(M1C0P)
(M1C1M)
(M1C1P)
(M2C0M)
(M2C0P)
(M2C1M)
(M2C1P)
(M3C0M)
(M3C0P)
(M3C1M)
(M3C1P)
(SCK)
(DO)
(FS)
(M0C1P)
(M0C1M)
(M0C0P)
(M0C0M)
(M1C0M)
(M1C0P)
(M1C1M)
(M1C1P)
(M2C1P)
(M2C1M)
(M2C0P)
(M2C0M) (M3C0M)
(M3C0P)
(M3C1M)
(M3C1P)
External amplifier connection
Star wire grounds to singlethen connect to plane
(SDA_1)
(SCL_1)
Headphone connection
Place jack connectorsbeside each other
(DO)
Decapfor U20
Decapfor U22
I2S_DIN
PD0PD1PD2PD3PD4PD5PD6PD7PD8PD9PD10PD11PD12PD13PD14PD15
PB[0..13]
PB7
PB9
PD3PD2PD1PD0
PD4PD5PD6PD7
PD11PD10PD9PD8 PD12
PD13PD14PD15
PC12PC11PC10
PC13
PC10
PC11
PC12
PC13
PL0
PL1
PL3
PL2
HP_VGND
PB8
PB11
PB10
PL0PL1PL2PL3
PB0PB1PB2PB3PB4PB5
PB12PB6
PB13
PF[0..15]
PF1PF2PF3PF5PF6PF8
PF10PF9
PF13PF12PF11
PF14PF15
PF4
PF7
GND
5.0V_SR
5.0V_SR
GND
GND
3.3V_SR 3.3V_SR
GNDGND
GNDGNDGNDGNDGNDGND
V_AN
GND
V_AN
GND
GND
V_AN
GND
V_AN
GND
3.3V_SR
PD[0..15]{6}
PC[0..13]{6,7,12}
PF[0..15]{6,8,9,11,12}
PB[0..13]{6,9,10,12}
PL[0..13]{6,11,12}
PB[0..13]{6,9,10,12}
PF[0..15]{6,8,9,11,12}
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-27293 PDF: SPF-27293 B
MPC5645S-DEMO-V2
C
Friday, January 11, 2013
Audio and Motors
9 12
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-27293 PDF: SPF-27293 B
MPC5645S-DEMO-V2
C
Friday, January 11, 2013
Audio and Motors
9 12
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-27293 PDF: SPF-27293 B
MPC5645S-DEMO-V2
C
Friday, January 11, 2013
Audio and Motors
9 12
___ ___X
R99 15.4K
U20
LMH6645MF
+IN3
-IN4
VOUT1
V-
2V
+5
R98
43K
R
L
J30
AUD 4
AUDIO OUT
1
2
3
4
C131
0.1UF
R116 4.70K DNP
R93 27K
U11
SGTL5000 32QFN
I2S_SCLK24
NC522
LINEIN_L14
CPFILT18
VD
DIO
20
NC419
SYS_MCLK21
I2S_DOUT25
I2S_DIN26
HP_L6
CTRL_DATA27
NC628
CTRL_CLK29
GN
D1
1
NC18
HP_R2
GN
D2
3
VD
DA
5
LINEOUT_L12
LINEOUT_R11
MIC15
NC317
LINEIN_R13
AG
ND
7
I2S_LRCLK23
VD
DD
30
CT
RL_A
DR
0_C
S31
CT
RL_M
OD
E32
HP_VGND4
NC29
VAG10
MIC_BIAS16
GN
D3-P
AD
33
C133
0.1UF
R
L
J34
AUD 4
LINE OUT
1
2
3
4
R92
12.1K
R95
19.6K
C156
1000PF
C157
1000PF
C142 1UF
R97
10.0K
R104
1.0K
C181 10nF
C222
0.1UF
C143
0.1UF
R90 32.4K
C167 1UF
R96 15.8K
C146
1000PF
R91
1.0K
P5
CON_2X7
1 23 4
657 89 10
11 1213 14
R100 15.4K
P6
CON_2X7
1 23 4
657 89 10
11 1213 14
U22
LMH6645MF
+IN3
-IN4
VOUT1
V-
2V
+5
R94 27K
C148 10nF
C223
0.1UF
R117 4.70K DNP
C147
1000PF
R101
1.62K
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CAN, LIN, UART, USB/SPIUART PK7, PK8
(RXD_0)
(RXD_1)
CAN0
(CANTX_0)
(CANRX_0)
LIN Molex Connector
(RXD_1)
One cap per power pin
(CANTX_0)
(CANRX_0)
(TXD_0)
(TXD_1)
(TXD_1)
PB3PB2
CAN0-CANH
C0_EN
C0_STBC0_WAKE
CAN0-CANL
C0_INHC0_ERR_B
PB0PB1
PB12
USB_RNUSB_P USB_RP
USB_RXD_0USB_TXD_0CLK_XTIN_6M
CLK_XTOUT_6M
USB_N
USB_RXD_0 USB_TXD_0
DBG_RXD_0
DBG_TXD_0
PB0PB1PB12PB13
PM3PM4
PM4
BUS0BUS1BUS2BUS3BUS4BUS5
PM3
PB13
GND
CAN-12V
P12V
GND
GND
GND
GND
GND
5.0V_SR
GND
GND
GND
GND
3.3V_SR
GND
GND
5.0V_SR
GND GND
3.3V_SR
3.3V_SR
GND
GND
GND
5.0V_SR
5.0V_SR
3.3V_SR
GND
GND
GND
GND
3.3V_SR
3.3V_SR
GND
GND
GND
PB[0..13]{6,9,12}
DBG_RXD_0{12}
DBG_TXD_0{12}
PM3{6}PM4{6}
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-27293 PDF: SPF-27293 B
MPC5645S-DEMO-V2
C
Friday, January 11, 2013
Serial Interface
10 12
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-27293 PDF: SPF-27293 B
MPC5645S-DEMO-V2
C
Friday, January 11, 2013
Serial Interface
10 12
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-27293 PDF: SPF-27293 B
MPC5645S-DEMO-V2
C
Friday, January 11, 2013
Serial Interface
10 12
___ ___X
U2
TJA1041T
INH7
WAKE9
STB14
EN6
TXD1
ERR8
RXD4
GN
D2
SPLIT11
CANH13
CANL12
VI/O
5
VB
AT
10
VC
C3
C48
0.1UF
C43
1000PF
C59
0.1UFC64
0.1UF
C55 0.033UF
U5
FT2232D
ADBUS024
ADBUS123
ADBUS222
ADBUS321
ADBUS420
ADBUS519
ADBUS617
ADBUS716
ACBUS015
ACBUS113
ACBUS212
ACBUS311
SI/WUA10
BCBUS030
BCBUS129
BCBUS228
BCBUS327
SI/WUB26
PWREN#41
3V3OUT6
USBDM8
USBDP7
RSTOUT#5
RESET#4
XTIN43
XTOUT44
EECS48
EESK1
EEDATA2
TEST47
AV
CC
46
VC
C1
3
VC
C2
42
VC
CIO
A14
VC
CIO
B31
GN
D1
9
GN
D2
18
GN
D3
25
GN
D4
34
AG
ND
45
BDBUS040
BDBUS139
BDBUS238
BDBUS337
BDBUS436
BDBUS535
BDBUS633
BDBUS732
L1470OHMDNP
12
X16 MHZ
13
2
J5
DB9
CAN_0
594837261
M2
M1R8 27
J17
HDR 2X3
1 23 4
65
R7 27
R42
60.4
C50
0.1UF
R2
4.70K
R47
1.5K
J6
HDR 2X3
1 23 4
65
C56
1000PF
C38
47PFDNP
R9
1.0
M
U4
TJA1020T
RXD1
SLP2
WAKE3
TXD4
GN
D5
LIN6
BA
T7
INH8
R10 10.0K
J3
CON PLUG 4
LIN_1
1234
C49
0.1UF
R49
10.0K
J20
HDR 1X2
CAN_12V
1 2
C36
0.01uF
J7
HDR 1X2Master Mode Pullup
1 2
C39
47PFDNP
C51
1000PF
C57
0.1UF
R45
60.4
R46 10.0K
12 3
4
+D
-D
G
V
J1
USB_TYPE_B
USB/Serial Interface
1
234
S1
S2
R48 10.0K
J13
HDR 2X3
1 23 4
65
C41
0.1UFD2
D3D4
D1
D3
BGX50A
1
2
3
4
R15
10.0K
C58
0.1UF
R40 1.0K
C54
0.1UF
J16
HDR 1X2 12
R1
10.0K
+
C44
10UF
L3470OHMDNP
12
D1
GF1A
A C
C45
1000PF
R50
470
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
KEEP VREFN AND VREFP CAPACITORS AS CLOSEASPOSSIBLE TO THE ADV7180 AND ON THE SAMESIDEOF THE PCB AS THE ADV7180
KEEP CLOSE TO THEADV7180 AND ONTHE SAMESIDE OF PCB AS THEADV7180.
V_RESET
V_PWR
(SCL_0)
(SDA_0)
(VIU9)
(VIU0)
(VIU1)
(VIU2)
(VIU3)
(VIU4)
(VIU5)
(VIU6)
(VIU7)
(PDI0)
(PDI1)
(PDI2)
(PDI3)
(PDI4)
(VIU CLK)
(PDI5)
(PDI6)
(PDI7)
(PDI_CLK)
(PDI DE)
Place close to MCU
(PDI HSYNC/VIU9)
(PDI VSYNC/VIU8)
(VIU8)
(SCL_0)
(SDA_0)
V_CLK
V_CLK
V_RESET
V_PWR
PF9PF8
COMP_IN
PF9_RPF8_R
PJ3
PK4PK5PK6PL4
PL7PL8
PL5PL6PM1
PM0
PM0PM1
PJ3
VIN_FVIN_VSVIN_HS
PL8
PK2PK3PK4PK5PK6PL4PL5PL6
PJ4PJ5PJ6PJ7PJ8
PJ3
PJ9PJ10PJ11
PL9PG12PJ1
PJ2
PL7
PF9
PF2PF2PF8PF9
PF8
GND
GND
GND
GND
GND
3.3V_SR
GND GNDGND GND
GND GND GND GND GND GND
GND GND
GNDGND
GNDGNDGNDGNDGND
GND
1.8V_SR
1.8V_SR
GNDGND
3.3V_SR3.3V_SR
5.0V_SR5.0V_SR
P12VP12V
3.3V_SR
PJ[0..15] {6,7,8,12}
PM0{6}PM1{6}
PK[0..11] {6,7,8,12}
PL[0..13] {6,9,12}
PG[0..12] {6,7}
PF[0..15] {6,8,9,12}
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-27293 PDF: SPF-27293 B
MPC5645S-DEMO-V2
C
Friday, January 11, 2013
Video Input
11 12
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-27293 PDF: SPF-27293 B
MPC5645S-DEMO-V2
C
Friday, January 11, 2013
Video Input
11 12
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-27293 PDF: SPF-27293 B
MPC5645S-DEMO-V2
C
Friday, January 11, 2013
Video Input
11 12
___ ___X
R25 4.70K DNP
C20
10nF
R76 33
C8
10nF
P4
HDR_2X19_F
Camera input port
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
3131
3232
3333
3434
3535
3636
3737
3838
G341
G442
G543
G139
G240
TVS10402ESDA-MLP
12
R65 10.0K
C108 47PF
R22
1.0M
R61 36
C9
0.1UF
R66 10.0K
J31
HDR TH 1X3
DNP123
GN
D2
GN
D1
Y1
28.63636MHZ
12 3
4
R85 33
C85 0.1UF
R67
39.0
J24
CONN RCA 4
VIDEO IN
2
1_11_21_3
C11
0.082UF
R44 4.70K DNP
C6
0.1UF
R68 10.0K
TP12
C10 0.1UF
C12
10nF
C90 47PF
C14
10nF
C19
10nF
R79 33
R77
10.0K
C16
0.1UF
C13
10nF
U9
ADV7180
AIN135
AIN236
AIN346
AIN447
AIN548
AIN649
SDATA53
SCLK54
ALSB52
ELPF30
SFL9
LLC20
XTAL122
XTAL221
NC127
NC228
NC333
NC441
NC542
NC644
NC745
NC850
AGND132
AGND237
AGND343
TEST_034
DGND13
DGND210
DGND324
DGND457
P026
P125
P219
P318
P417
P516
P615
P714
P88
P97
P106
P115
P1262
P1361
P1460
HS2
VS64
FIELD63
INTRQ_B1
GPO013
GPO112
GPO256
GPO355
VREFP38
VREFN39
PVDD31
AVDD40
DVDD123
DVDD258
DVDDIO211DVDDIO14
P1559
PWRDWN_B29
RESET_B51
TP11
R63 10.0K
R78
10.0K
R21
1.69K
R83 33
C15
0.1UF
C18
0.1UF
C17
0.1UF
R64 10.0K
C7
0.1UF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
(Tool I/O 3)
(Vendor I/O 2)
UBATT
VALTREF
UBATT
(Tool I/O 0)
(RDY)
(CLKOUT)
VREF
(RDY)
G1..G5 = MICTORCentre Ground Pins
(Tool I/O 2)
(Tool I/O 1)
Place CAPS as close toconnector pins
NEXUS Conenctor (MICTOR)
(TRST)
(N/C)
(VSS)
(VSS)
(VSS)
(VSS)TDI
TDO
TCK
TMS
TDO
TCK
TMS
TDI
TMS
eMIOS1[18]eMIOS1[19]
EIF8
TDO pull up
(PF15 CLKOUT)Driver MUST keep USBVREN bit OFF
LINFlex3 to USB
USB Debug Interface
MSEO[1]
MSEO[0]
Jog Encoder
WKUP10
(M4C0M)
(M4C0P)
(M4C1M)
(M4C1P)
(M5C0M)
(M5C0P)
(M5C1M)
(M5C1P)
Jog Encoder
External Debugger Interface
General Purpose I/O Interfaces
Decapfor U19
MDO1MDO2MDO3MDO4MDO5MDO6MDO7
PF15
MDO10
MDO8
PH3
EVTI_B
MDO9
PH1
EVTI_B
JCOMP
JCOMP
RESET_B
MCKOEVTO_B
MDO11
RESET_B
MDO0
DBG_RXD_0DBG_TXD_0
JM60_EXTAL
JM60_XTAL
JM_USB_RN
BRD_ID1
BRD_REV0
JM_USB_RP
BRD_REV1
JM_EN
JM_TCK1JM_TDOJM_TDIJM_TCK2
JM_TMS
JM_RSTOUT
JM_RSTIN
JM_TCK2JM_TCK1
JM_TDIJM_TMS
PH2 JM_TDOPH1PH3PH0
JM_RSTOUTRESET_B
SW_PF1SW_PF0SW_PK0
DBG_RXD_0
DBG_TXD_0
SW_PF3
PK0
PF0PF1PF3
PL11PL12PL13
PL10 SW_PL10SW_PL11
PH4PJ12
PK7PK8PK9PB4PB5PB6
SW_PK7SW_PK8SW_PK9
PE0PE1PE2PE3PE4PE5PE6PE7
PC8
PC9
SW_PJ12
SW_PL12SW_PL13
JM_EN
JM_RSTINJM_RST_B
PH2PH0
JM_USB_PJM_USB_N
BRD_REV2
BRD_ID0
GND
3.3V_SR3.3V_SR
P12V_R
GND
GNDGND
3.3V_SR
GND
3.3V_SR 3.3V_SR
3.3V_SR
GNDGND
3.3V_SR
GND
GND
GND
3.3V_SR
GND
3.3V_SR
GND
GND
5.0V_SR
GND
3.3V_SR
GND
3.3V_SR
3.3V_SR
GND
GND
3.3V_SRGND
GND
GND
3.3V_SR
GND
GNDGND
3.3V_SR3.3V_SR
GNDGND
EVTI_B {6}EVTO_B {6}MCKO {6}MSEO2_B {6}
MDO[0..11] {6}
MSEO_B {6}
PH[0..4]{6,12}
RESET_B{6}
PF[0..15]{6,8,9,11,12}
PK[0..11]{6,7,8,11}
PF[0..15] {6,8,9,11,12}
DBG_RXD_0{10}
DBG_TXD_0{10}
PL[0..13]{6,9,11}
PH[0..4]{6,12}
PJ[0..15]{6,7,8,11}
PB[0..13]{6,9,10}
PE[0..7]{6}
PC[0..13]{6,7,9}
JM_RST_B {6}
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-27293 PDF: SPF-27293 B
MPC5645S-DEMO-V2
C
Friday, January 11, 2013
Debug
12 12
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-27293 PDF: SPF-27293 B
MPC5645S-DEMO-V2
C
Friday, January 11, 2013
Debug
12 12
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-27293 PDF: SPF-27293 B
MPC5645S-DEMO-V2
C
Friday, January 11, 2013
Debug
12 12
___ ___X
R6010M
U19
MC74HC245ADT
A02
A24
A46
A68
B711
B513
B315
B117
DIR1
OE19
B018
B216
B414
B612
A79
A57
A35
A13
VCC20
GND10
L2470OHMDNP
12
R56
10.0K
12 3
4
+D
-D
G
V
J2
USB_TYPE_B
USB_OSBDM
1
234
S1
S2
Y4XTAL 4MHZ HCM49
12
TP4
C221
0.1UF
R57
10.0K
J23
HDR_2X8
1 23 4
657 89 10
11 1213 1415 16
P3
HDR_2X19_F
NEXUS
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
3131
3232
3333
3434
3535
3636
3737
3838
G341
G442
G543
G139
G240
J48
HDR TH 1X3
123
C35 47PF
DNP
D2
D3D4
D1
D4
BGX50A
1
2
3
4
TP7
R51 10.0K
R87 4.70K
C34 47PF
DNP
R5
15.4K
D6
LED RED
AC
U6
MC9S08JM60CLD
PTC41
IRQ/TPMCLK2
RESET3
PTF0/TPM1CH24
PTF1/TPM1CH35
PTF4/TPM2CH06
PTF5/TPM2CH17
PTE0/TxD18
PTE1/RxD19
PTE2/TPM1CH010
PTE3/TPM1CH111
PTE4/MISO112
PTE5/MOSI113
PTE6/SPSCK114
PTE7/SS115
VD
D1
16
VS
S1
17
USBDN18
USBDP19
VUSB3320
PTG0/KBIP021
PTG1/KBIP122
PTB0/MISO2/ADP023
PTB1/MOSI2/ADP124
PTB2/SPSCK2/ADP225
PTB3/SS2/ADP326
PTB4/KBIP4/ADP427
PTB5/KBIP5/ADP528
PTD0/ADP8/ACMP+29
PTD1/ADP9/ACMP-30
VD
DA
D/V
RE
FH
31
VS
SA
D/V
RE
FL
32
PTD2/KBIP2/ACMPO33
PTG2/KBIP634
PTG3/KBIP735
BKGD/MS36
PTG4/XTAL37
PTG5/EXTAL38
VS
SO
SC
39
PTC0/SCL40
PTC1/SDA41
PTC242
PTC3/TxD243
PTC5/RxD244
R133
0
R3 27
SW8
EVQ-WKA001
SW1_55
B2
SW13
SW24
NC11
COM6
A7
NC28
R6 10.0K
TP8
J47
HDR_2X8
1 23 4
657 89 10
11 1213 1415 16
TP5
C42
47PFDNP
J8
HDR 1X2
12
J32
HDR_2X8
1 23 4
657 89 10
11 1213 1415 16
R52
10.0K
R84
100
J10
HDR 2X3
JM60_BDM
1 23 4
65
R88
10.0K
R55
10.0K
R131
10.0K
SW9
EVQ-WKA001
SW1_55
B2
SW13
SW24
NC11
COM6
A7
NC28
R54
10.0K
SW4
SW_DIP-4/SM
1234 5
876
R134
18K
C71
0.1UF
P1
CON_2X7
JTAG
1 23 4
657 89 10
11 1213 14
TP6
TP10
J12
HDR 2X3
1 23 4
65
C60
0.1UF
C61
10nF
R86
100
R58
10.0K
D7
LED GREEN
AC
R4 27
C87 18pF
R132
10.0K
C88 18pF
C40
47PFDNP
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Document Number: MPC5645SDEMOUGRev. 0,09/2012
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