owned by dipl. ing. mario blunk buchfinkenweg 3 99097 ... · agenda day #1 schematic capture...
TRANSCRIPT
Owned by Dipl. Ing. Mario Blunk
Buchfinkenweg 399097 Erfurt / Germany
Phone +49 (0)361 6022 5184
Email [email protected]
Internet www.blunk-electronic.de
Doc. Vers. 2017-08-10
Design Reviews Surveys Consulting
HW/SW Engineering (Eagle, KiCad, VHDL, Verilog, Ada, Linux)
Agenda
Day #1● schematic capture● defining net classes● electrical rule check
(ERC)● schematic structure● exercises & consulting● preparing PCB layout● outlines of the board● fiducials, mounting holes
Day #2● part placement● texts in copper● silk screen● design rules (DRC)● layer setup, via types● routing● communication with
suppliers and assembly houses
Day #3● creating/editing parts in
the library● symbols, packages,
devices● library structure● naming conventions● resource management● CAM processor● Gerber/drill data● exercises & consulting
Day #4● project & schematic structure● practicing with modular and hierarchic designs● naming conventions / style guides● introduction to agile HW development● design for test & manufacturing (DFT/DFM)● scripting & automation
Create Project
right-click / new project
Create Schematic #1
right-click onproject name / new schematic
Create Schematic #2
Schematic Framecommand ADD
Schematic Capture #1
commands ADD, USE, MOVE, DELETE, GROUP, NAME, VALUE, CHANGE, SMASH
Schematic Capture #2
commands NET, NAME, LABEL, SPLIT, JUNCTION, SHOW
command INVOKE or across sheets use INVOKE V1
Schematic Capture #3
Nets
commands LABEL, MOVE, DELETE
Gate Swap
command GATESWAP
before after
Busses
commands BUS, NAME, LABEL, SPLIT
Schematic Structure
Schematic Layers
commands DISPLAY, LAYER, CHANGE LAYER
Documentation #1
Documentation #2
Drawing Grid
command GRID
alternative grid:
Ctrl+Alt
Schematic Sheets
command EDIT .s2
reordering by EDIT .s2 .s1
Net Classes #1
track with via drills clearance between tracks
define minimum constraints:
commandCLASS
Net Classes #2
commandsINFO,CHANGE CLASS
Texts #1
commands TEXT, INFO
Texts #2
command TEXT >PROJECT
Part Numbering
Assembly Variants #1
command VARIANT
Assembly Variants #2
ERC
commands ERC, ERROR
SCRIPTING #1
SCRIPTING #2
1. 2.
Executes automatically on EAGLE start !https://github.com/Blunk-electronic/lbr_eagle/blob/master/scr/eagle.scr
SCRIPTING #3
More on EAGLE scripting here :
Scripting Tutorial
SCRIPTING #4
http://www.blunk-electronic.de/pdf/Scripting_de.pdf
PCB / PCBA
Thanks to: Key Design Electronics Ltd. http://www.kdel.co.uk26 Lancaster Way, Scalby, Scarborough, YO13 0QH, England+44 (0) 1723 341809
Create Board
commandBoard
Board Outline
$ / €
commands MOVE, WIRE, SPLIT, DELETE, CIR, ARC
grid metric / inch ?
Metrisch vs. Inch
0.1 inch=100mil
0.1inch2.54mm
=x inchwantedymm given
Mounting Holes #1
commands
ADD, DELETE, MOVE
commands
COPY, DELETE, MOVE,LOCK grid
metric / inch ?
Mounting Holes #2
Fiducials #1command ADD
Fiducials #2
commands MOVE, DELETE, COPY, LOCK
Contact PCB- assembly house !
Fiducials #3
Contact PCB- assembly house !
Measuring #1
commands MARK, MARK;
Measuring #2
command DIM
Part Placement #1
commands LOCK, MOVE R77, GROUP, CHANGE, ROTATE R-45, MIRROR, RATSNET
Part Placement #2
mirrored !
keep out
Texts #1
commands TEXT, CHANGE - TEXT - SIZE - RATIO - LAYER
Texts #2
Texts #3
Board Layer
commands DISPLAY, LAYERCHANGE LAYER
Restricted Areas #1
commands
WIRE, POLY,DELETE,MOVE,SPLIT,GROUP
Restricted Areas #2
commands
WIRE, DELETE,MOVE,SPLIT,GROUP
Restricted Areas #3
commands POLY,DELETE,MOVE,GROUP
Routing #1
commands ROUTE,WIRE,SPLIT,RIPUP,RATSNET,MOVE VIA,CHANGE
Routing #2
commands WIRE,VIANAME,RATSNET,...
Via Properties
commands INFO, CHANGE SHAPE / DIA / DRILL
Ripup
Ripup all nets:RIPUP (not reasonable !)
Ripup all nets except:RIPUP ! GND +5V
Ripup selected nets:RIPUP GPIO_* JTAG_TCK
Polygons #1
Polygons #2
command POLY, RATSNEST
Polygons #3
command RATSNET, NAME, RIP @ yxz;
Polygons #4command CHANGE ISO / THERMAL / ORPHAN / POUR / WIDTH, RIP @ xyz
Track Length Trimming
command MAEANDER 50
settings for max. deviation & gap in : DRC/MISC
ULP: length
Autorouter #1
An Autorouter needs preparation and constraints for useful results !
route all nets:AUTO (not reasonable)
route all except:AUTO ! GND +5V
route only:AUTO GPIO_*
Use restricted areas !
Autorouter #2
Not nice, but fast !
DRC #1commandDRC
https://github.com/Blunk-electronic/lbr_eagle/tree/master/dru
DRC #2commandDRC
DRC #3commandDRC
DRC #4commandDRC
DRC #5commandDRC
Via drills greater 0.3mm without solder stop !
DRC #6
exposed via inside an SMD-pad
CAUTION: - DRC-setting clearance/same signals SMD-Via=0 required !- Contact assembly house ! Solder may drain into via !
Solder Stop vs. Vias
exposed via
covered via
Do not use as test pad for ICT or FPT geeignet ! Contact assembly house !
1. Need of multilayer PCB ?
2. Assignment of supply and signal layers ?
3. Layer Setup
4. Vias
5. Contact PCB manufacturer !
Multilayer PCBs
Layer Assignment #1
GND
VCC
+ decoupling + signal access + crosstalk
- radiation & shielding - impedance PWR/GND
signals
signals
Layer Assignment #2
GND
VCC
+ radiation & shielding + impedance PWR/GND
- decoupling - signal access - crosstalk
signals
signals
Layer Assigment #3
GND
VCC
+ decoupling + crosstalk + radiation & shielding + impedance PWR/GND
- signal access
signals
GND
GND
signals
Layer Setup #1command DRC
core
prepreg
Layer Setup #2
- 4 layers - 1 x core- 2 x prepreg
1+2*15+16
- 6 layers - 2 x core- 3 x prepreg
1+2*3+14*15+16
prepreg
prepreg
core
core
core
Vias
through
(1+2*15+16)
blind
[15:1+2*15+16]
buried
1+(2*15)+16
micro(connects outer layer and adjacent inner layer only)
[1+2*15+16:15]
Routing Inner Layers
Blind-Via from topto layer 2
Through-Via
Buried-Via from layer 2to layer 15
Blind-Via from layer 15to layer 16
Test Pads for ICT, FPT, … ?
http://www.blunk-electronic.de/pdf/Design_Checklist_en.pdf
Layer 21/22 and 51/52
commands:SMASH,MOVE,GROUP,CHANGE- SIZE- RATIO
before:
after:
Documentation #1
Documentation #2Layer 51/52 (tDocu / bDocu)
commands: TEXT, WIRE, MOVE, GROUP, CHANGE TEXT / SIZE / RATIO
Documentation #3
Layer 21/22 (tPlace / bPlace)
Documentation #4
Drawing Frame
commands: ADD,MOVE,GROUP
Layer 48 (Document)
Bill of Material (BOM) & Netlist ...
File/Export/Import/...
RUN bomRUN export-ict-netlist-pad-coordinatesRUN ipc-d-356
RUN statistic-brd
- assembly variants- export from BRD/SCH- special characters
Library Structure #1
https://github.com/Blunk-electronic/lbr_eagle
Library Structure #2
Library Structure #3
Edit Symbols
commands: WIRE, PIN,TEXT,CHANGE- DIR- FONT- SIZE
Edit Packages/Footprints
commands:
LAYER,PAD,SMD,WIRE,MOVE,GROUP,DEL,NAME,CHANGE
Slitted Holes #1commands:
PAD,WIRE,NAME
Layer Millings
Notify PCB manufacturer !!!
Slitted Holes #2
Notify PCB manufacturer !
!!! MIND INNER LAYERS !!!
Create Device commands: ADD, PAC, CON, PRE, ATTR, VAL ON/OFF
http://www.blunk-electronic.de/pdf/library_tutorial.pdf
EMS
TechnikronOwned by Ronald Nehring12627 Berlin / GermanyTel. +49 (0) 30 8631 7631
Jenaer Leiterplatten GmbHPrüssingstraße 3107745 Jena / Germany
www.jlp.de
CAM Processor #1
https://github.com/Blunk-electronic/lbr_eagle/tree/master/cam
CAM Processor #2
CAM Processor #3
CAM Processor #4
CAM Processor #5[EXCELLON]
Type = DrillStationLong = "Excellon drill station, coordinate format 2.5 inch"Init = "%%\nM48\nM72\n"Reset = "M30\n"ResX = 10000ResY = 10000;Rack = ""DrillSize = "%sC%0.5f\n" ; (Tool code, tool size)AutoDrill = "T%02d" ; (Tool number)FirstDrill = 1BeginData = "%%\n"Units = InchSelect = "%s\n" ; (Drill code)Drill = "X%1.0fY%1.0f\n" ; (x, y)Info = "Drill File Info:\n"\ "\n"\ " Data Mode : Absolute\n"\ " Units : 1/10000 Inch\n"\ "\n"
Edit fileeagle.def(Version 7.x)
PentaLogix ViewMate
Helmut MendritzkiSoftware-Beratung-VertriebDahlienhof 125462 RELLINGEN / GERMANYTel.: +49 (0) 4101 - 20 60 51Fax: +49 (0) 4101 - 20 60 53 Mobile: +49 (0) 171 - 2155852Email: [email protected]: www.pentalogix.com
Literature #1
Printed Circuit Board Design Techniques for EMC
Compliance: A Handbook for Designers
(IEEE Press Series on Electronics Technology)
Literature #2
Joachim FranzEMV
Störungssicherer Aufbauelektronischer Schaltungen
(German)
ISBN 3-519-10397-4
Boundary Scan System M-1
Detect manufacturing faults, bring-up and test of prototypes and systems ?
OpenSource Boundary Scan / JTAG
http://blunk-electronic.de/products.html
What is Boundary Scan ?
LinksPCB Manufacturing:
www.q-print.de (prototypes)
www.jlp.de (high volume)
Distributors and EMS:
www.ax-electronic.de
www.blunk-electronic.de
www.technikron.de
Thanks for your attention !