Upload File

or25vsd-low power vlsi circuits

1
Code No. OR-25/VSD JAWAHARLAL NEHRU TECHNOLOGY UNIVERSITY, HYDERABAD OR M.Tech II Semester Supplementary Examinations, March 2009. LOW POWER VLSI CIRCUITS (VLSI System Design) Time: 3 hours Max. Marks.60 Answer any Five questions All questions carry equal marks --- 1.a] Compare 5 µ and 0.1 µ Technologies in all respects. b] With the help of neat sketches explain about shallow trench isolation. c] Explain about hot corner effects. 2.a] Explain how modeling of BJ is done in SPICE. b] Explain how the structure of BJT can be modeled to get the required characteristics. 3.a] Assuming typical values for various parameters of a logic circuit , design an inverter lagic circuit internal to the device , to drive large capacitive load . b] Explain about low power CMOS circuit design techniques. 4.a] Explain about BICMOS dynamic logic circuits. b] What are the issues involved in charge sharing? How are they addressed? c] Explain about Novse problems in dynamic logic circuits. 5.a] Compare SRAMs and ∆ RAMs b] Give the structure and critically analyses the SOI memory devices. 6. Draw the carry-skip CLA circuit and explain its operation. 7. Explain about various steps in low power physical design. 8. Write notes on any TWO: a] Architectural level design b] PLAs c] Narrow channel effects. --o0o--

Upload: ramanaidu1

Post on 18-Nov-2014

65 views

Category:

Documents


0 download

Report

TRANSCRIPT

Page 1: Or25vsd-Low Power Vlsi Circuits

Code No. OR-25/VSD JAWAHARLAL NEHRU TECHNOLOGY UNIVERSITY, HYDER

R M.Tech II Semester Supplementary Examinations, Marc

LOW POWER VLSI CIRCUITS (VLSI System Design)

Time: 3 hours Max. Marks.Answer any Five questions

All questions carry equal marks ---

1.a] Compare 5µ and 0.1 µ Technologies in all respects. b] With the help of neat sketches explain about shallow trench isolation c] Explain about hot corner effects. 2.a] Explain how modeling of BJ is done in SPICE.

b] Explain how the structure of BJT can be modeled to get characteristics.

3.a] Assuming typical values for various parameters of a logic circu

inverter lagic circuit internal to the device , to drive large capacitive b] Explain about low power CMOS circuit design techniques. 4.a] Explain about BICMOS dynamic logic circuits. b] What are the issues involved in charge sharing? How are they addres c] Explain about Novse problems in dynamic logic circuits. 5.a] Compare SRAMs and ∆ RAMs b] Give the structure and critically analyses the SOI memory devices. 6. Draw the carry-skip CLA circuit and explain its operation.

7. Explain about various steps in low power physical design. 8. Write notes on any TWO: a] Architectural level design b] PLAs c] Narrow channel effects.

--o0o--

O

ABAD h 2009.

60

.

the required

it , design an load .

sed?

werTesting of Vlsi Circuits

Low Power VLSI Circuits and Systems Prof. Ajit Pal …textofvideo.nptel.ac.in/106105034/lec12.pdf · Low Power VLSI Circuits and Systems . Prof. Ajit Pal . Department of Computer

Low Power VLSI Circuits and Systems Prof. Ajit Pal ...textofvideo.nptel.ac.in/106105034/lec1.pdf · Low Power VLSI Circuits and Systems . ... and welcome to this course on low-power

Analog VLSI Neural Circuits

static and dyanmic circuits-VLSI

GELE5340 Circuits ITGÉ (VLSI)

Mixed Signal VLSI Design: Advanced Digital and ... · PDF fileNeuromorphic Circuits ... Information Technology Endowed Chair for Neural Circuits and Parallel VLSI-Systems Low Power

Low Power Digital VLSI Design - Circuits and Systems - Abdellatif Bellaouar, Mohamed I Elmasry

Introduction to VLSI Circuits and Systems

VLSI Circuits and Systems Letter - IEEE Computer Society...VLSI Circuits and Systems Letter Volume 2 – Issue 1 April 2016 Editorial The VLSI Circuits and Systems Letter is affiliated

An Adaptive Body-Bias Generator for Low Voltage CMOS VLSI ...downloads.hindawi.com/journals/ijdsn/2008/686010.pdf · An Adaptive Body-Bias Generator for Low Voltage CMOS VLSI Circuits

Testing of VLSI Circuits

VLSI Programming of Asynchronous circuits for Low Power

Low-Power VLSI Circuits and Systems - Springer978-81-322-1937-8/1.pdf · Low-Power VLSI Circuits and Systems. Ajit Pal ... VLSI circuits for graduate and senior ... The chapter ends

1: Circuits & LayoutSlide 1EE 447 VLSI Design VLSI Design Circuits & Layout

CMPEN 411 VLSI Digital Circuits

VLSI Dynamic Logic Circuits

VLSI, Sequential MOS logic circuits

VLSI, Combinational MOS Logic Circuits

EE 610 ANALOG VLSI CIRCUITS

Circuits for High-Performance Low-Power VLSI Logickrste/papers/ama-phd.pdfCircuits for High-Performance Low-Power VLSI Logic by Albert Ma Submitted to the Department of Electrical

2021 Symposium on VLSI Circuits Workshops€¦ · 2021-06-09  · 2021 Symposium on VLSI Circuits Advance Program 2021 Symposium on VLSI Circuits Workshops Live Session Sunday, June

VLSI circuits and design

VLSI Digital Circuits

ESE 570: Digital Integrated Circuits and VLSI Fundamentalsese570/spring2016/handouts/lec1.pdf · ESE 570: Digital Integrated Circuits and VLSI Fundamentals ... Analog VLSI Circuit

Analog VLSI Circuits for Attention-Based, Visual Tracking · Analog VLSI Circuits for Attention-Based, Visual Tracking ... attentional shifts have been modeled using analog VLSI circuits

VLSI Circuits & Layout

ECE407/507 VLSI Digital Circuits Lecture 01: Introductionece507/lecture_1.pdf · VLSI Digital Circuits Lecture 01: Introduction [Adapted from Rabaey’s Digital Integrated Circuits

Low Power Design of Standard Cell Digital VLSI Circuits

Analog CMOS/VLSI Circuits

LOW POWER -VLSI · 2019-01-30 · Battery-Driven System, CAD Tools for Low Power VLSI Circuits. Chapter 1 Introduction Introduction Design for low power has become nowadays one of

Design of Low Power VLSI Circuits using Energy Efficient ... · PDF fileDesign of Low Power VLSI Circuits using Energy Efficient Adiabatic Logic ... Half Adder and Full adder circuit

Analysis of Power Supply Networks in VLSI Circuits of Power Supply Networks in VLSI Circuits ... also cause circuit failure via electromigration. Metal interconnect in VLSI circuits

Low Power Testing of VLSI Circuits Using Test Vector Reordering · 2015-01-05 · Low Power Testing of VLSI Circuits Using Test Vector Reordering . A. M. Sudha . Department of Electrical

VLSI Circuits for MIMO Communication Systemsapburg/papers_documents/Dissertation_apburg.pdf · Diss.ETHNo.16427 VLSI Circuits for MIMO Communication Systems Adissertationsubmittedtothe